2 # DSP Bridge Driver Support
6 tristate "DSP Bridge driver"
10 DSP/BIOS Bridge is designed for platforms that contain a GPP and
11 one or more attached DSPs. The GPP is considered the master or
12 "host" processor, and the attached DSPs are processing resources
13 that can be utilized by applications and drivers running on the GPP.
15 This driver depends on OMAP Mailbox (OMAP_MBOX_FWK).
17 config TIDSPBRIDGE_DVFS
18 bool "Enable Bridge Dynamic Voltage and Frequency Scaling (DVFS)"
19 depends on TIDSPBRIDGE && OMAP_PM_SRF && CPU_FREQ
21 DVFS allows DSP Bridge to initiate the operating point change to
22 scale the chip voltage and frequency in order to match the
23 performance and power consumption to the current processing
26 config TIDSPBRIDGE_MEMPOOL_SIZE
27 hex "Physical memory pool size (Byte)"
28 depends on TIDSPBRIDGE
31 Allocate specified size of memory at booting time to avoid allocation
32 failure under heavy memory fragmentation after some use time.
34 config TIDSPBRIDGE_DEBUG
36 depends on TIDSPBRIDGE
38 Say Y to enable Bridge debugging capabilities
40 config TIDSPBRIDGE_RECOVERY
41 bool "Recovery Support"
42 depends on TIDSPBRIDGE
45 In case of DSP fatal error, BRIDGE driver will try to
48 config TIDSPBRIDGE_CACHE_LINE_CHECK
49 bool "Check buffers to be 128 byte aligned"
50 depends on TIDSPBRIDGE
52 When the DSP processes data, the DSP cache controller loads 128-Byte
53 chunks (lines) from SDRAM and writes the data back in 128-Byte chunks.
54 If a DMM buffer does not start and end on a 128-Byte boundary, the data
55 preceding the start address (SA) from the 128-Byte boundary to the SA
56 and the data at addresses trailing the end address (EA) from the EA to
57 the next 128-Byte boundary will be loaded and written back as well.
58 This can lead to heap corruption. Say Y, to enforce the check for 128
59 byte alignment, buffers failing this check will be rejected.
61 config TIDSPBRIDGE_WDT3
62 bool "Enable watchdog timer"
63 depends on TIDSPBRIDGE
65 WTD3 is managed by DSP and once it is enabled, DSP side bridge is in
66 charge of refreshing the timer before overflow, if the DSP hangs MPU
67 will caught the interrupt and try to recover DSP.
69 config TIDSPBRIDGE_WDT_TIMEOUT
70 int "Watchdog timer timeout (in secs)"
71 depends on TIDSPBRIDGE && TIDSPBRIDGE_WDT3
74 Watchdog timer timeout value, after that time if the watchdog timer
75 counter is not reset the wdt overflow interrupt will be triggered
77 config TIDSPBRIDGE_NTFY_PWRERR
78 bool "Notify power errors"
79 depends on TIDSPBRIDGE
81 Enable notifications to registered clients on the event of power errror
82 trying to suspend bridge driver. Say Y, to signal this event as a fatal
83 error, this will require a bridge restart to recover.
85 config TIDSPBRIDGE_BACKTRACE
86 bool "Dump backtraces on fatal errors"
87 depends on TIDSPBRIDGE
89 Enable useful information to backtrace fatal errors. Say Y if you
90 want to dump information for testing purposes.