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lib, arch: add filter argument to show_mem and fix private implementations
[linux-2.6/next.git] / arch / powerpc / kernel / cputable.c
blobc9b68d07ac4fca3cdd8996e8a43d850034efb407
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23
24 struct cpu_spec* cur_cpu_spec = NULL;
25 EXPORT_SYMBOL(cur_cpu_spec);
26
27 /* The platform string corresponding to the real PVR */
28 const char *powerpc_base_platform;
29
30 /* NOTE:
31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
32 * the responsibility of the appropriate CPU save/restore functions to
33 * eventually copy these settings over. Those save/restore aren't yet
34 * part of the cputable though. That has to be fixed for both ppc32
35 * and ppc64
36 */
37 #ifdef CONFIG_PPC32
38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
51 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
52 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
53 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
60 #endif /* CONFIG_PPC32 */
61 #ifdef CONFIG_PPC64
62 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
63 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
64 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
65 extern void __restore_cpu_pa6t(void);
66 extern void __restore_cpu_ppc970(void);
67 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
68 extern void __restore_cpu_power7(void);
69 #endif /* CONFIG_PPC64 */
70 #if defined(CONFIG_E500)
71 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
72 extern void __restore_cpu_e5500(void);
73 #endif /* CONFIG_E500 */
74
75 /* This table only contains "desktop" CPUs, it need to be filled with embedded
76 * ones as well...
77 */
78 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
79 PPC_FEATURE_HAS_MMU)
80 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
81 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
82 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
83 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
84 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
85 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
86 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
87 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
88 PPC_FEATURE_TRUE_LE | \
89 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
90 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
91 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
92 PPC_FEATURE_TRUE_LE | \
93 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
94 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
95 PPC_FEATURE_TRUE_LE | \
96 PPC_FEATURE_HAS_ALTIVEC_COMP)
97 #ifdef CONFIG_PPC_BOOK3E_64
98 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
99 #else
100 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
101 PPC_FEATURE_BOOKE)
102 #endif
103
104 static struct cpu_spec __initdata cpu_specs[] = {
105 #ifdef CONFIG_PPC_BOOK3S_64
106 { /* Power3 */
107 .pvr_mask = 0xffff0000,
108 .pvr_value = 0x00400000,
109 .cpu_name = "POWER3 (630)",
110 .cpu_features = CPU_FTRS_POWER3,
111 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
112 .mmu_features = MMU_FTR_HPTE_TABLE,
113 .icache_bsize = 128,
114 .dcache_bsize = 128,
115 .num_pmcs = 8,
116 .pmc_type = PPC_PMC_IBM,
117 .oprofile_cpu_type = "ppc64/power3",
118 .oprofile_type = PPC_OPROFILE_RS64,
119 .platform = "power3",
120 },
121 { /* Power3+ */
122 .pvr_mask = 0xffff0000,
123 .pvr_value = 0x00410000,
124 .cpu_name = "POWER3 (630+)",
125 .cpu_features = CPU_FTRS_POWER3,
126 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
127 .mmu_features = MMU_FTR_HPTE_TABLE,
128 .icache_bsize = 128,
129 .dcache_bsize = 128,
130 .num_pmcs = 8,
131 .pmc_type = PPC_PMC_IBM,
132 .oprofile_cpu_type = "ppc64/power3",
133 .oprofile_type = PPC_OPROFILE_RS64,
134 .platform = "power3",
135 },
136 { /* Northstar */
137 .pvr_mask = 0xffff0000,
138 .pvr_value = 0x00330000,
139 .cpu_name = "RS64-II (northstar)",
140 .cpu_features = CPU_FTRS_RS64,
141 .cpu_user_features = COMMON_USER_PPC64,
142 .mmu_features = MMU_FTR_HPTE_TABLE,
143 .icache_bsize = 128,
144 .dcache_bsize = 128,
145 .num_pmcs = 8,
146 .pmc_type = PPC_PMC_IBM,
147 .oprofile_cpu_type = "ppc64/rs64",
148 .oprofile_type = PPC_OPROFILE_RS64,
149 .platform = "rs64",
150 },
151 { /* Pulsar */
152 .pvr_mask = 0xffff0000,
153 .pvr_value = 0x00340000,
154 .cpu_name = "RS64-III (pulsar)",
155 .cpu_features = CPU_FTRS_RS64,
156 .cpu_user_features = COMMON_USER_PPC64,
157 .mmu_features = MMU_FTR_HPTE_TABLE,
158 .icache_bsize = 128,
159 .dcache_bsize = 128,
160 .num_pmcs = 8,
161 .pmc_type = PPC_PMC_IBM,
162 .oprofile_cpu_type = "ppc64/rs64",
163 .oprofile_type = PPC_OPROFILE_RS64,
164 .platform = "rs64",
165 },
166 { /* I-star */
167 .pvr_mask = 0xffff0000,
168 .pvr_value = 0x00360000,
169 .cpu_name = "RS64-III (icestar)",
170 .cpu_features = CPU_FTRS_RS64,
171 .cpu_user_features = COMMON_USER_PPC64,
172 .mmu_features = MMU_FTR_HPTE_TABLE,
173 .icache_bsize = 128,
174 .dcache_bsize = 128,
175 .num_pmcs = 8,
176 .pmc_type = PPC_PMC_IBM,
177 .oprofile_cpu_type = "ppc64/rs64",
178 .oprofile_type = PPC_OPROFILE_RS64,
179 .platform = "rs64",
180 },
181 { /* S-star */
182 .pvr_mask = 0xffff0000,
183 .pvr_value = 0x00370000,
184 .cpu_name = "RS64-IV (sstar)",
185 .cpu_features = CPU_FTRS_RS64,
186 .cpu_user_features = COMMON_USER_PPC64,
187 .mmu_features = MMU_FTR_HPTE_TABLE,
188 .icache_bsize = 128,
189 .dcache_bsize = 128,
190 .num_pmcs = 8,
191 .pmc_type = PPC_PMC_IBM,
192 .oprofile_cpu_type = "ppc64/rs64",
193 .oprofile_type = PPC_OPROFILE_RS64,
194 .platform = "rs64",
195 },
196 { /* Power4 */
197 .pvr_mask = 0xffff0000,
198 .pvr_value = 0x00350000,
199 .cpu_name = "POWER4 (gp)",
200 .cpu_features = CPU_FTRS_POWER4,
201 .cpu_user_features = COMMON_USER_POWER4,
202 .mmu_features = MMU_FTR_HPTE_TABLE,
203 .icache_bsize = 128,
204 .dcache_bsize = 128,
205 .num_pmcs = 8,
206 .pmc_type = PPC_PMC_IBM,
207 .oprofile_cpu_type = "ppc64/power4",
208 .oprofile_type = PPC_OPROFILE_POWER4,
209 .platform = "power4",
210 },
211 { /* Power4+ */
212 .pvr_mask = 0xffff0000,
213 .pvr_value = 0x00380000,
214 .cpu_name = "POWER4+ (gq)",
215 .cpu_features = CPU_FTRS_POWER4,
216 .cpu_user_features = COMMON_USER_POWER4,
217 .mmu_features = MMU_FTR_HPTE_TABLE,
218 .icache_bsize = 128,
219 .dcache_bsize = 128,
220 .num_pmcs = 8,
221 .pmc_type = PPC_PMC_IBM,
222 .oprofile_cpu_type = "ppc64/power4",
223 .oprofile_type = PPC_OPROFILE_POWER4,
224 .platform = "power4",
225 },
226 { /* PPC970 */
227 .pvr_mask = 0xffff0000,
228 .pvr_value = 0x00390000,
229 .cpu_name = "PPC970",
230 .cpu_features = CPU_FTRS_PPC970,
231 .cpu_user_features = COMMON_USER_POWER4 |
232 PPC_FEATURE_HAS_ALTIVEC_COMP,
233 .mmu_features = MMU_FTR_HPTE_TABLE,
234 .icache_bsize = 128,
235 .dcache_bsize = 128,
236 .num_pmcs = 8,
237 .pmc_type = PPC_PMC_IBM,
238 .cpu_setup = __setup_cpu_ppc970,
239 .cpu_restore = __restore_cpu_ppc970,
240 .oprofile_cpu_type = "ppc64/970",
241 .oprofile_type = PPC_OPROFILE_POWER4,
242 .platform = "ppc970",
243 },
244 { /* PPC970FX */
245 .pvr_mask = 0xffff0000,
246 .pvr_value = 0x003c0000,
247 .cpu_name = "PPC970FX",
248 .cpu_features = CPU_FTRS_PPC970,
249 .cpu_user_features = COMMON_USER_POWER4 |
250 PPC_FEATURE_HAS_ALTIVEC_COMP,
251 .mmu_features = MMU_FTR_HPTE_TABLE,
252 .icache_bsize = 128,
253 .dcache_bsize = 128,
254 .num_pmcs = 8,
255 .pmc_type = PPC_PMC_IBM,
256 .cpu_setup = __setup_cpu_ppc970,
257 .cpu_restore = __restore_cpu_ppc970,
258 .oprofile_cpu_type = "ppc64/970",
259 .oprofile_type = PPC_OPROFILE_POWER4,
260 .platform = "ppc970",
261 },
262 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
263 .pvr_mask = 0xffffffff,
264 .pvr_value = 0x00440100,
265 .cpu_name = "PPC970MP",
266 .cpu_features = CPU_FTRS_PPC970,
267 .cpu_user_features = COMMON_USER_POWER4 |
268 PPC_FEATURE_HAS_ALTIVEC_COMP,
269 .mmu_features = MMU_FTR_HPTE_TABLE,
270 .icache_bsize = 128,
271 .dcache_bsize = 128,
272 .num_pmcs = 8,
273 .pmc_type = PPC_PMC_IBM,
274 .cpu_setup = __setup_cpu_ppc970,
275 .cpu_restore = __restore_cpu_ppc970,
276 .oprofile_cpu_type = "ppc64/970MP",
277 .oprofile_type = PPC_OPROFILE_POWER4,
278 .platform = "ppc970",
279 },
280 { /* PPC970MP */
281 .pvr_mask = 0xffff0000,
282 .pvr_value = 0x00440000,
283 .cpu_name = "PPC970MP",
284 .cpu_features = CPU_FTRS_PPC970,
285 .cpu_user_features = COMMON_USER_POWER4 |
286 PPC_FEATURE_HAS_ALTIVEC_COMP,
287 .mmu_features = MMU_FTR_HPTE_TABLE,
288 .icache_bsize = 128,
289 .dcache_bsize = 128,
290 .num_pmcs = 8,
291 .pmc_type = PPC_PMC_IBM,
292 .cpu_setup = __setup_cpu_ppc970MP,
293 .cpu_restore = __restore_cpu_ppc970,
294 .oprofile_cpu_type = "ppc64/970MP",
295 .oprofile_type = PPC_OPROFILE_POWER4,
296 .platform = "ppc970",
297 },
298 { /* PPC970GX */
299 .pvr_mask = 0xffff0000,
300 .pvr_value = 0x00450000,
301 .cpu_name = "PPC970GX",
302 .cpu_features = CPU_FTRS_PPC970,
303 .cpu_user_features = COMMON_USER_POWER4 |
304 PPC_FEATURE_HAS_ALTIVEC_COMP,
305 .mmu_features = MMU_FTR_HPTE_TABLE,
306 .icache_bsize = 128,
307 .dcache_bsize = 128,
308 .num_pmcs = 8,
309 .pmc_type = PPC_PMC_IBM,
310 .cpu_setup = __setup_cpu_ppc970,
311 .oprofile_cpu_type = "ppc64/970",
312 .oprofile_type = PPC_OPROFILE_POWER4,
313 .platform = "ppc970",
314 },
315 { /* Power5 GR */
316 .pvr_mask = 0xffff0000,
317 .pvr_value = 0x003a0000,
318 .cpu_name = "POWER5 (gr)",
319 .cpu_features = CPU_FTRS_POWER5,
320 .cpu_user_features = COMMON_USER_POWER5,
321 .mmu_features = MMU_FTR_HPTE_TABLE,
322 .icache_bsize = 128,
323 .dcache_bsize = 128,
324 .num_pmcs = 6,
325 .pmc_type = PPC_PMC_IBM,
326 .oprofile_cpu_type = "ppc64/power5",
327 .oprofile_type = PPC_OPROFILE_POWER4,
328 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
329 * and above but only works on POWER5 and above
330 */
331 .oprofile_mmcra_sihv = MMCRA_SIHV,
332 .oprofile_mmcra_sipr = MMCRA_SIPR,
333 .platform = "power5",
334 },
335 { /* Power5++ */
336 .pvr_mask = 0xffffff00,
337 .pvr_value = 0x003b0300,
338 .cpu_name = "POWER5+ (gs)",
339 .cpu_features = CPU_FTRS_POWER5,
340 .cpu_user_features = COMMON_USER_POWER5_PLUS,
341 .mmu_features = MMU_FTR_HPTE_TABLE,
342 .icache_bsize = 128,
343 .dcache_bsize = 128,
344 .num_pmcs = 6,
345 .oprofile_cpu_type = "ppc64/power5++",
346 .oprofile_type = PPC_OPROFILE_POWER4,
347 .oprofile_mmcra_sihv = MMCRA_SIHV,
348 .oprofile_mmcra_sipr = MMCRA_SIPR,
349 .platform = "power5+",
350 },
351 { /* Power5 GS */
352 .pvr_mask = 0xffff0000,
353 .pvr_value = 0x003b0000,
354 .cpu_name = "POWER5+ (gs)",
355 .cpu_features = CPU_FTRS_POWER5,
356 .cpu_user_features = COMMON_USER_POWER5_PLUS,
357 .mmu_features = MMU_FTR_HPTE_TABLE,
358 .icache_bsize = 128,
359 .dcache_bsize = 128,
360 .num_pmcs = 6,
361 .pmc_type = PPC_PMC_IBM,
362 .oprofile_cpu_type = "ppc64/power5+",
363 .oprofile_type = PPC_OPROFILE_POWER4,
364 .oprofile_mmcra_sihv = MMCRA_SIHV,
365 .oprofile_mmcra_sipr = MMCRA_SIPR,
366 .platform = "power5+",
367 },
368 { /* POWER6 in P5+ mode; 2.04-compliant processor */
369 .pvr_mask = 0xffffffff,
370 .pvr_value = 0x0f000001,
371 .cpu_name = "POWER5+",
372 .cpu_features = CPU_FTRS_POWER5,
373 .cpu_user_features = COMMON_USER_POWER5_PLUS,
374 .mmu_features = MMU_FTR_HPTE_TABLE,
375 .icache_bsize = 128,
376 .dcache_bsize = 128,
377 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
378 .oprofile_type = PPC_OPROFILE_POWER4,
379 .platform = "power5+",
380 },
381 { /* Power6 */
382 .pvr_mask = 0xffff0000,
383 .pvr_value = 0x003e0000,
384 .cpu_name = "POWER6 (raw)",
385 .cpu_features = CPU_FTRS_POWER6,
386 .cpu_user_features = COMMON_USER_POWER6 |
387 PPC_FEATURE_POWER6_EXT,
388 .mmu_features = MMU_FTR_HPTE_TABLE,
389 .icache_bsize = 128,
390 .dcache_bsize = 128,
391 .num_pmcs = 6,
392 .pmc_type = PPC_PMC_IBM,
393 .oprofile_cpu_type = "ppc64/power6",
394 .oprofile_type = PPC_OPROFILE_POWER4,
395 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
396 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
397 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
398 POWER6_MMCRA_OTHER,
399 .platform = "power6x",
400 },
401 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
402 .pvr_mask = 0xffffffff,
403 .pvr_value = 0x0f000002,
404 .cpu_name = "POWER6 (architected)",
405 .cpu_features = CPU_FTRS_POWER6,
406 .cpu_user_features = COMMON_USER_POWER6,
407 .mmu_features = MMU_FTR_HPTE_TABLE,
408 .icache_bsize = 128,
409 .dcache_bsize = 128,
410 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
411 .oprofile_type = PPC_OPROFILE_POWER4,
412 .platform = "power6",
413 },
414 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
415 .pvr_mask = 0xffffffff,
416 .pvr_value = 0x0f000003,
417 .cpu_name = "POWER7 (architected)",
418 .cpu_features = CPU_FTRS_POWER7,
419 .cpu_user_features = COMMON_USER_POWER7,
420 .mmu_features = MMU_FTR_HPTE_TABLE |
421 MMU_FTR_TLBIE_206,
422 .icache_bsize = 128,
423 .dcache_bsize = 128,
424 .oprofile_type = PPC_OPROFILE_POWER4,
425 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
426 .platform = "power7",
427 },
428 { /* Power7 */
429 .pvr_mask = 0xffff0000,
430 .pvr_value = 0x003f0000,
431 .cpu_name = "POWER7 (raw)",
432 .cpu_features = CPU_FTRS_POWER7,
433 .cpu_user_features = COMMON_USER_POWER7,
434 .mmu_features = MMU_FTR_HPTE_TABLE |
435 MMU_FTR_TLBIE_206,
436 .icache_bsize = 128,
437 .dcache_bsize = 128,
438 .num_pmcs = 6,
439 .pmc_type = PPC_PMC_IBM,
440 .oprofile_cpu_type = "ppc64/power7",
441 .oprofile_type = PPC_OPROFILE_POWER4,
442 .platform = "power7",
443 },
444 { /* Power7+ */
445 .pvr_mask = 0xffff0000,
446 .pvr_value = 0x004A0000,
447 .cpu_name = "POWER7+ (raw)",
448 .cpu_features = CPU_FTRS_POWER7,
449 .cpu_user_features = COMMON_USER_POWER7,
450 .mmu_features = MMU_FTR_HPTE_TABLE |
451 MMU_FTR_TLBIE_206,
452 .icache_bsize = 128,
453 .dcache_bsize = 128,
454 .num_pmcs = 6,
455 .pmc_type = PPC_PMC_IBM,
456 .oprofile_cpu_type = "ppc64/power7",
457 .oprofile_type = PPC_OPROFILE_POWER4,
458 .platform = "power7+",
459 },
460 { /* Cell Broadband Engine */
461 .pvr_mask = 0xffff0000,
462 .pvr_value = 0x00700000,
463 .cpu_name = "Cell Broadband Engine",
464 .cpu_features = CPU_FTRS_CELL,
465 .cpu_user_features = COMMON_USER_PPC64 |
466 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
467 PPC_FEATURE_SMT,
468 .mmu_features = MMU_FTR_HPTE_TABLE,
469 .icache_bsize = 128,
470 .dcache_bsize = 128,
471 .num_pmcs = 4,
472 .pmc_type = PPC_PMC_IBM,
473 .oprofile_cpu_type = "ppc64/cell-be",
474 .oprofile_type = PPC_OPROFILE_CELL,
475 .platform = "ppc-cell-be",
476 },
477 { /* PA Semi PA6T */
478 .pvr_mask = 0x7fff0000,
479 .pvr_value = 0x00900000,
480 .cpu_name = "PA6T",
481 .cpu_features = CPU_FTRS_PA6T,
482 .cpu_user_features = COMMON_USER_PA6T,
483 .mmu_features = MMU_FTR_HPTE_TABLE,
484 .icache_bsize = 64,
485 .dcache_bsize = 64,
486 .num_pmcs = 6,
487 .pmc_type = PPC_PMC_PA6T,
488 .cpu_setup = __setup_cpu_pa6t,
489 .cpu_restore = __restore_cpu_pa6t,
490 .oprofile_cpu_type = "ppc64/pa6t",
491 .oprofile_type = PPC_OPROFILE_PA6T,
492 .platform = "pa6t",
493 },
494 { /* default match */
495 .pvr_mask = 0x00000000,
496 .pvr_value = 0x00000000,
497 .cpu_name = "POWER4 (compatible)",
498 .cpu_features = CPU_FTRS_COMPATIBLE,
499 .cpu_user_features = COMMON_USER_PPC64,
500 .mmu_features = MMU_FTR_HPTE_TABLE,
501 .icache_bsize = 128,
502 .dcache_bsize = 128,
503 .num_pmcs = 6,
504 .pmc_type = PPC_PMC_IBM,
505 .platform = "power4",
506 }
507 #endif /* CONFIG_PPC_BOOK3S_64 */
508
509 #ifdef CONFIG_PPC32
510 #if CLASSIC_PPC
511 { /* 601 */
512 .pvr_mask = 0xffff0000,
513 .pvr_value = 0x00010000,
514 .cpu_name = "601",
515 .cpu_features = CPU_FTRS_PPC601,
516 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
517 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
518 .mmu_features = MMU_FTR_HPTE_TABLE,
519 .icache_bsize = 32,
520 .dcache_bsize = 32,
521 .machine_check = machine_check_generic,
522 .platform = "ppc601",
523 },
524 { /* 603 */
525 .pvr_mask = 0xffff0000,
526 .pvr_value = 0x00030000,
527 .cpu_name = "603",
528 .cpu_features = CPU_FTRS_603,
529 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
530 .mmu_features = 0,
531 .icache_bsize = 32,
532 .dcache_bsize = 32,
533 .cpu_setup = __setup_cpu_603,
534 .machine_check = machine_check_generic,
535 .platform = "ppc603",
536 },
537 { /* 603e */
538 .pvr_mask = 0xffff0000,
539 .pvr_value = 0x00060000,
540 .cpu_name = "603e",
541 .cpu_features = CPU_FTRS_603,
542 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
543 .mmu_features = 0,
544 .icache_bsize = 32,
545 .dcache_bsize = 32,
546 .cpu_setup = __setup_cpu_603,
547 .machine_check = machine_check_generic,
548 .platform = "ppc603",
549 },
550 { /* 603ev */
551 .pvr_mask = 0xffff0000,
552 .pvr_value = 0x00070000,
553 .cpu_name = "603ev",
554 .cpu_features = CPU_FTRS_603,
555 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
556 .mmu_features = 0,
557 .icache_bsize = 32,
558 .dcache_bsize = 32,
559 .cpu_setup = __setup_cpu_603,
560 .machine_check = machine_check_generic,
561 .platform = "ppc603",
562 },
563 { /* 604 */
564 .pvr_mask = 0xffff0000,
565 .pvr_value = 0x00040000,
566 .cpu_name = "604",
567 .cpu_features = CPU_FTRS_604,
568 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
569 .mmu_features = MMU_FTR_HPTE_TABLE,
570 .icache_bsize = 32,
571 .dcache_bsize = 32,
572 .num_pmcs = 2,
573 .cpu_setup = __setup_cpu_604,
574 .machine_check = machine_check_generic,
575 .platform = "ppc604",
576 },
577 { /* 604e */
578 .pvr_mask = 0xfffff000,
579 .pvr_value = 0x00090000,
580 .cpu_name = "604e",
581 .cpu_features = CPU_FTRS_604,
582 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
583 .mmu_features = MMU_FTR_HPTE_TABLE,
584 .icache_bsize = 32,
585 .dcache_bsize = 32,
586 .num_pmcs = 4,
587 .cpu_setup = __setup_cpu_604,
588 .machine_check = machine_check_generic,
589 .platform = "ppc604",
590 },
591 { /* 604r */
592 .pvr_mask = 0xffff0000,
593 .pvr_value = 0x00090000,
594 .cpu_name = "604r",
595 .cpu_features = CPU_FTRS_604,
596 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
597 .mmu_features = MMU_FTR_HPTE_TABLE,
598 .icache_bsize = 32,
599 .dcache_bsize = 32,
600 .num_pmcs = 4,
601 .cpu_setup = __setup_cpu_604,
602 .machine_check = machine_check_generic,
603 .platform = "ppc604",
604 },
605 { /* 604ev */
606 .pvr_mask = 0xffff0000,
607 .pvr_value = 0x000a0000,
608 .cpu_name = "604ev",
609 .cpu_features = CPU_FTRS_604,
610 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
611 .mmu_features = MMU_FTR_HPTE_TABLE,
612 .icache_bsize = 32,
613 .dcache_bsize = 32,
614 .num_pmcs = 4,
615 .cpu_setup = __setup_cpu_604,
616 .machine_check = machine_check_generic,
617 .platform = "ppc604",
618 },
619 { /* 740/750 (0x4202, don't support TAU ?) */
620 .pvr_mask = 0xffffffff,
621 .pvr_value = 0x00084202,
622 .cpu_name = "740/750",
623 .cpu_features = CPU_FTRS_740_NOTAU,
624 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
625 .mmu_features = MMU_FTR_HPTE_TABLE,
626 .icache_bsize = 32,
627 .dcache_bsize = 32,
628 .num_pmcs = 4,
629 .cpu_setup = __setup_cpu_750,
630 .machine_check = machine_check_generic,
631 .platform = "ppc750",
632 },
633 { /* 750CX (80100 and 8010x?) */
634 .pvr_mask = 0xfffffff0,
635 .pvr_value = 0x00080100,
636 .cpu_name = "750CX",
637 .cpu_features = CPU_FTRS_750,
638 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
639 .mmu_features = MMU_FTR_HPTE_TABLE,
640 .icache_bsize = 32,
641 .dcache_bsize = 32,
642 .num_pmcs = 4,
643 .cpu_setup = __setup_cpu_750cx,
644 .machine_check = machine_check_generic,
645 .platform = "ppc750",
646 },
647 { /* 750CX (82201 and 82202) */
648 .pvr_mask = 0xfffffff0,
649 .pvr_value = 0x00082200,
650 .cpu_name = "750CX",
651 .cpu_features = CPU_FTRS_750,
652 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
653 .mmu_features = MMU_FTR_HPTE_TABLE,
654 .icache_bsize = 32,
655 .dcache_bsize = 32,
656 .num_pmcs = 4,
657 .pmc_type = PPC_PMC_IBM,
658 .cpu_setup = __setup_cpu_750cx,
659 .machine_check = machine_check_generic,
660 .platform = "ppc750",
661 },
662 { /* 750CXe (82214) */
663 .pvr_mask = 0xfffffff0,
664 .pvr_value = 0x00082210,
665 .cpu_name = "750CXe",
666 .cpu_features = CPU_FTRS_750,
667 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
668 .mmu_features = MMU_FTR_HPTE_TABLE,
669 .icache_bsize = 32,
670 .dcache_bsize = 32,
671 .num_pmcs = 4,
672 .pmc_type = PPC_PMC_IBM,
673 .cpu_setup = __setup_cpu_750cx,
674 .machine_check = machine_check_generic,
675 .platform = "ppc750",
676 },
677 { /* 750CXe "Gekko" (83214) */
678 .pvr_mask = 0xffffffff,
679 .pvr_value = 0x00083214,
680 .cpu_name = "750CXe",
681 .cpu_features = CPU_FTRS_750,
682 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
683 .mmu_features = MMU_FTR_HPTE_TABLE,
684 .icache_bsize = 32,
685 .dcache_bsize = 32,
686 .num_pmcs = 4,
687 .pmc_type = PPC_PMC_IBM,
688 .cpu_setup = __setup_cpu_750cx,
689 .machine_check = machine_check_generic,
690 .platform = "ppc750",
691 },
692 { /* 750CL (and "Broadway") */
693 .pvr_mask = 0xfffff0e0,
694 .pvr_value = 0x00087000,
695 .cpu_name = "750CL",
696 .cpu_features = CPU_FTRS_750CL,
697 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
698 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
699 .icache_bsize = 32,
700 .dcache_bsize = 32,
701 .num_pmcs = 4,
702 .pmc_type = PPC_PMC_IBM,
703 .cpu_setup = __setup_cpu_750,
704 .machine_check = machine_check_generic,
705 .platform = "ppc750",
706 .oprofile_cpu_type = "ppc/750",
707 .oprofile_type = PPC_OPROFILE_G4,
708 },
709 { /* 745/755 */
710 .pvr_mask = 0xfffff000,
711 .pvr_value = 0x00083000,
712 .cpu_name = "745/755",
713 .cpu_features = CPU_FTRS_750,
714 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
715 .mmu_features = MMU_FTR_HPTE_TABLE,
716 .icache_bsize = 32,
717 .dcache_bsize = 32,
718 .num_pmcs = 4,
719 .pmc_type = PPC_PMC_IBM,
720 .cpu_setup = __setup_cpu_750,
721 .machine_check = machine_check_generic,
722 .platform = "ppc750",
723 },
724 { /* 750FX rev 1.x */
725 .pvr_mask = 0xffffff00,
726 .pvr_value = 0x70000100,
727 .cpu_name = "750FX",
728 .cpu_features = CPU_FTRS_750FX1,
729 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
730 .mmu_features = MMU_FTR_HPTE_TABLE,
731 .icache_bsize = 32,
732 .dcache_bsize = 32,
733 .num_pmcs = 4,
734 .pmc_type = PPC_PMC_IBM,
735 .cpu_setup = __setup_cpu_750,
736 .machine_check = machine_check_generic,
737 .platform = "ppc750",
738 .oprofile_cpu_type = "ppc/750",
739 .oprofile_type = PPC_OPROFILE_G4,
740 },
741 { /* 750FX rev 2.0 must disable HID0[DPM] */
742 .pvr_mask = 0xffffffff,
743 .pvr_value = 0x70000200,
744 .cpu_name = "750FX",
745 .cpu_features = CPU_FTRS_750FX2,
746 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
747 .mmu_features = MMU_FTR_HPTE_TABLE,
748 .icache_bsize = 32,
749 .dcache_bsize = 32,
750 .num_pmcs = 4,
751 .pmc_type = PPC_PMC_IBM,
752 .cpu_setup = __setup_cpu_750,
753 .machine_check = machine_check_generic,
754 .platform = "ppc750",
755 .oprofile_cpu_type = "ppc/750",
756 .oprofile_type = PPC_OPROFILE_G4,
757 },
758 { /* 750FX (All revs except 2.0) */
759 .pvr_mask = 0xffff0000,
760 .pvr_value = 0x70000000,
761 .cpu_name = "750FX",
762 .cpu_features = CPU_FTRS_750FX,
763 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
764 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
765 .icache_bsize = 32,
766 .dcache_bsize = 32,
767 .num_pmcs = 4,
768 .pmc_type = PPC_PMC_IBM,
769 .cpu_setup = __setup_cpu_750fx,
770 .machine_check = machine_check_generic,
771 .platform = "ppc750",
772 .oprofile_cpu_type = "ppc/750",
773 .oprofile_type = PPC_OPROFILE_G4,
774 },
775 { /* 750GX */
776 .pvr_mask = 0xffff0000,
777 .pvr_value = 0x70020000,
778 .cpu_name = "750GX",
779 .cpu_features = CPU_FTRS_750GX,
780 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
781 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
782 .icache_bsize = 32,
783 .dcache_bsize = 32,
784 .num_pmcs = 4,
785 .pmc_type = PPC_PMC_IBM,
786 .cpu_setup = __setup_cpu_750fx,
787 .machine_check = machine_check_generic,
788 .platform = "ppc750",
789 .oprofile_cpu_type = "ppc/750",
790 .oprofile_type = PPC_OPROFILE_G4,
791 },
792 { /* 740/750 (L2CR bit need fixup for 740) */
793 .pvr_mask = 0xffff0000,
794 .pvr_value = 0x00080000,
795 .cpu_name = "740/750",
796 .cpu_features = CPU_FTRS_740,
797 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
798 .mmu_features = MMU_FTR_HPTE_TABLE,
799 .icache_bsize = 32,
800 .dcache_bsize = 32,
801 .num_pmcs = 4,
802 .pmc_type = PPC_PMC_IBM,
803 .cpu_setup = __setup_cpu_750,
804 .machine_check = machine_check_generic,
805 .platform = "ppc750",
806 },
807 { /* 7400 rev 1.1 ? (no TAU) */
808 .pvr_mask = 0xffffffff,
809 .pvr_value = 0x000c1101,
810 .cpu_name = "7400 (1.1)",
811 .cpu_features = CPU_FTRS_7400_NOTAU,
812 .cpu_user_features = COMMON_USER |
813 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
814 .mmu_features = MMU_FTR_HPTE_TABLE,
815 .icache_bsize = 32,
816 .dcache_bsize = 32,
817 .num_pmcs = 4,
818 .pmc_type = PPC_PMC_G4,
819 .cpu_setup = __setup_cpu_7400,
820 .machine_check = machine_check_generic,
821 .platform = "ppc7400",
822 },
823 { /* 7400 */
824 .pvr_mask = 0xffff0000,
825 .pvr_value = 0x000c0000,
826 .cpu_name = "7400",
827 .cpu_features = CPU_FTRS_7400,
828 .cpu_user_features = COMMON_USER |
829 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
830 .mmu_features = MMU_FTR_HPTE_TABLE,
831 .icache_bsize = 32,
832 .dcache_bsize = 32,
833 .num_pmcs = 4,
834 .pmc_type = PPC_PMC_G4,
835 .cpu_setup = __setup_cpu_7400,
836 .machine_check = machine_check_generic,
837 .platform = "ppc7400",
838 },
839 { /* 7410 */
840 .pvr_mask = 0xffff0000,
841 .pvr_value = 0x800c0000,
842 .cpu_name = "7410",
843 .cpu_features = CPU_FTRS_7400,
844 .cpu_user_features = COMMON_USER |
845 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
846 .mmu_features = MMU_FTR_HPTE_TABLE,
847 .icache_bsize = 32,
848 .dcache_bsize = 32,
849 .num_pmcs = 4,
850 .pmc_type = PPC_PMC_G4,
851 .cpu_setup = __setup_cpu_7410,
852 .machine_check = machine_check_generic,
853 .platform = "ppc7400",
854 },
855 { /* 7450 2.0 - no doze/nap */
856 .pvr_mask = 0xffffffff,
857 .pvr_value = 0x80000200,
858 .cpu_name = "7450",
859 .cpu_features = CPU_FTRS_7450_20,
860 .cpu_user_features = COMMON_USER |
861 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
862 .mmu_features = MMU_FTR_HPTE_TABLE,
863 .icache_bsize = 32,
864 .dcache_bsize = 32,
865 .num_pmcs = 6,
866 .pmc_type = PPC_PMC_G4,
867 .cpu_setup = __setup_cpu_745x,
868 .oprofile_cpu_type = "ppc/7450",
869 .oprofile_type = PPC_OPROFILE_G4,
870 .machine_check = machine_check_generic,
871 .platform = "ppc7450",
872 },
873 { /* 7450 2.1 */
874 .pvr_mask = 0xffffffff,
875 .pvr_value = 0x80000201,
876 .cpu_name = "7450",
877 .cpu_features = CPU_FTRS_7450_21,
878 .cpu_user_features = COMMON_USER |
879 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
880 .mmu_features = MMU_FTR_HPTE_TABLE,
881 .icache_bsize = 32,
882 .dcache_bsize = 32,
883 .num_pmcs = 6,
884 .pmc_type = PPC_PMC_G4,
885 .cpu_setup = __setup_cpu_745x,
886 .oprofile_cpu_type = "ppc/7450",
887 .oprofile_type = PPC_OPROFILE_G4,
888 .machine_check = machine_check_generic,
889 .platform = "ppc7450",
890 },
891 { /* 7450 2.3 and newer */
892 .pvr_mask = 0xffff0000,
893 .pvr_value = 0x80000000,
894 .cpu_name = "7450",
895 .cpu_features = CPU_FTRS_7450_23,
896 .cpu_user_features = COMMON_USER |
897 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
898 .mmu_features = MMU_FTR_HPTE_TABLE,
899 .icache_bsize = 32,
900 .dcache_bsize = 32,
901 .num_pmcs = 6,
902 .pmc_type = PPC_PMC_G4,
903 .cpu_setup = __setup_cpu_745x,
904 .oprofile_cpu_type = "ppc/7450",
905 .oprofile_type = PPC_OPROFILE_G4,
906 .machine_check = machine_check_generic,
907 .platform = "ppc7450",
908 },
909 { /* 7455 rev 1.x */
910 .pvr_mask = 0xffffff00,
911 .pvr_value = 0x80010100,
912 .cpu_name = "7455",
913 .cpu_features = CPU_FTRS_7455_1,
914 .cpu_user_features = COMMON_USER |
915 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
916 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
917 .icache_bsize = 32,
918 .dcache_bsize = 32,
919 .num_pmcs = 6,
920 .pmc_type = PPC_PMC_G4,
921 .cpu_setup = __setup_cpu_745x,
922 .oprofile_cpu_type = "ppc/7450",
923 .oprofile_type = PPC_OPROFILE_G4,
924 .machine_check = machine_check_generic,
925 .platform = "ppc7450",
926 },
927 { /* 7455 rev 2.0 */
928 .pvr_mask = 0xffffffff,
929 .pvr_value = 0x80010200,
930 .cpu_name = "7455",
931 .cpu_features = CPU_FTRS_7455_20,
932 .cpu_user_features = COMMON_USER |
933 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
934 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
935 .icache_bsize = 32,
936 .dcache_bsize = 32,
937 .num_pmcs = 6,
938 .pmc_type = PPC_PMC_G4,
939 .cpu_setup = __setup_cpu_745x,
940 .oprofile_cpu_type = "ppc/7450",
941 .oprofile_type = PPC_OPROFILE_G4,
942 .machine_check = machine_check_generic,
943 .platform = "ppc7450",
944 },
945 { /* 7455 others */
946 .pvr_mask = 0xffff0000,
947 .pvr_value = 0x80010000,
948 .cpu_name = "7455",
949 .cpu_features = CPU_FTRS_7455,
950 .cpu_user_features = COMMON_USER |
951 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
952 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
953 .icache_bsize = 32,
954 .dcache_bsize = 32,
955 .num_pmcs = 6,
956 .pmc_type = PPC_PMC_G4,
957 .cpu_setup = __setup_cpu_745x,
958 .oprofile_cpu_type = "ppc/7450",
959 .oprofile_type = PPC_OPROFILE_G4,
960 .machine_check = machine_check_generic,
961 .platform = "ppc7450",
962 },
963 { /* 7447/7457 Rev 1.0 */
964 .pvr_mask = 0xffffffff,
965 .pvr_value = 0x80020100,
966 .cpu_name = "7447/7457",
967 .cpu_features = CPU_FTRS_7447_10,
968 .cpu_user_features = COMMON_USER |
969 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
970 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
971 .icache_bsize = 32,
972 .dcache_bsize = 32,
973 .num_pmcs = 6,
974 .pmc_type = PPC_PMC_G4,
975 .cpu_setup = __setup_cpu_745x,
976 .oprofile_cpu_type = "ppc/7450",
977 .oprofile_type = PPC_OPROFILE_G4,
978 .machine_check = machine_check_generic,
979 .platform = "ppc7450",
980 },
981 { /* 7447/7457 Rev 1.1 */
982 .pvr_mask = 0xffffffff,
983 .pvr_value = 0x80020101,
984 .cpu_name = "7447/7457",
985 .cpu_features = CPU_FTRS_7447_10,
986 .cpu_user_features = COMMON_USER |
987 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
988 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
989 .icache_bsize = 32,
990 .dcache_bsize = 32,
991 .num_pmcs = 6,
992 .pmc_type = PPC_PMC_G4,
993 .cpu_setup = __setup_cpu_745x,
994 .oprofile_cpu_type = "ppc/7450",
995 .oprofile_type = PPC_OPROFILE_G4,
996 .machine_check = machine_check_generic,
997 .platform = "ppc7450",
998 },
999 { /* 7447/7457 Rev 1.2 and later */
1000 .pvr_mask = 0xffff0000,
1001 .pvr_value = 0x80020000,
1002 .cpu_name = "7447/7457",
1003 .cpu_features = CPU_FTRS_7447,
1004 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1005 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1006 .icache_bsize = 32,
1007 .dcache_bsize = 32,
1008 .num_pmcs = 6,
1009 .pmc_type = PPC_PMC_G4,
1010 .cpu_setup = __setup_cpu_745x,
1011 .oprofile_cpu_type = "ppc/7450",
1012 .oprofile_type = PPC_OPROFILE_G4,
1013 .machine_check = machine_check_generic,
1014 .platform = "ppc7450",
1015 },
1016 { /* 7447A */
1017 .pvr_mask = 0xffff0000,
1018 .pvr_value = 0x80030000,
1019 .cpu_name = "7447A",
1020 .cpu_features = CPU_FTRS_7447A,
1021 .cpu_user_features = COMMON_USER |
1022 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1023 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1024 .icache_bsize = 32,
1025 .dcache_bsize = 32,
1026 .num_pmcs = 6,
1027 .pmc_type = PPC_PMC_G4,
1028 .cpu_setup = __setup_cpu_745x,
1029 .oprofile_cpu_type = "ppc/7450",
1030 .oprofile_type = PPC_OPROFILE_G4,
1031 .machine_check = machine_check_generic,
1032 .platform = "ppc7450",
1033 },
1034 { /* 7448 */
1035 .pvr_mask = 0xffff0000,
1036 .pvr_value = 0x80040000,
1037 .cpu_name = "7448",
1038 .cpu_features = CPU_FTRS_7448,
1039 .cpu_user_features = COMMON_USER |
1040 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1041 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1042 .icache_bsize = 32,
1043 .dcache_bsize = 32,
1044 .num_pmcs = 6,
1045 .pmc_type = PPC_PMC_G4,
1046 .cpu_setup = __setup_cpu_745x,
1047 .oprofile_cpu_type = "ppc/7450",
1048 .oprofile_type = PPC_OPROFILE_G4,
1049 .machine_check = machine_check_generic,
1050 .platform = "ppc7450",
1051 },
1052 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1053 .pvr_mask = 0x7fff0000,
1054 .pvr_value = 0x00810000,
1055 .cpu_name = "82xx",
1056 .cpu_features = CPU_FTRS_82XX,
1057 .cpu_user_features = COMMON_USER,
1058 .mmu_features = 0,
1059 .icache_bsize = 32,
1060 .dcache_bsize = 32,
1061 .cpu_setup = __setup_cpu_603,
1062 .machine_check = machine_check_generic,
1063 .platform = "ppc603",
1064 },
1065 { /* All G2_LE (603e core, plus some) have the same pvr */
1066 .pvr_mask = 0x7fff0000,
1067 .pvr_value = 0x00820000,
1068 .cpu_name = "G2_LE",
1069 .cpu_features = CPU_FTRS_G2_LE,
1070 .cpu_user_features = COMMON_USER,
1071 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1072 .icache_bsize = 32,
1073 .dcache_bsize = 32,
1074 .cpu_setup = __setup_cpu_603,
1075 .machine_check = machine_check_generic,
1076 .platform = "ppc603",
1077 },
1078 { /* e300c1 (a 603e core, plus some) on 83xx */
1079 .pvr_mask = 0x7fff0000,
1080 .pvr_value = 0x00830000,
1081 .cpu_name = "e300c1",
1082 .cpu_features = CPU_FTRS_E300,
1083 .cpu_user_features = COMMON_USER,
1084 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1085 .icache_bsize = 32,
1086 .dcache_bsize = 32,
1087 .cpu_setup = __setup_cpu_603,
1088 .machine_check = machine_check_generic,
1089 .platform = "ppc603",
1090 },
1091 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1092 .pvr_mask = 0x7fff0000,
1093 .pvr_value = 0x00840000,
1094 .cpu_name = "e300c2",
1095 .cpu_features = CPU_FTRS_E300C2,
1096 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1097 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1098 MMU_FTR_NEED_DTLB_SW_LRU,
1099 .icache_bsize = 32,
1100 .dcache_bsize = 32,
1101 .cpu_setup = __setup_cpu_603,
1102 .machine_check = machine_check_generic,
1103 .platform = "ppc603",
1104 },
1105 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1106 .pvr_mask = 0x7fff0000,
1107 .pvr_value = 0x00850000,
1108 .cpu_name = "e300c3",
1109 .cpu_features = CPU_FTRS_E300,
1110 .cpu_user_features = COMMON_USER,
1111 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1112 MMU_FTR_NEED_DTLB_SW_LRU,
1113 .icache_bsize = 32,
1114 .dcache_bsize = 32,
1115 .cpu_setup = __setup_cpu_603,
1116 .num_pmcs = 4,
1117 .oprofile_cpu_type = "ppc/e300",
1118 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1119 .platform = "ppc603",
1120 },
1121 { /* e300c4 (e300c1, plus one IU) */
1122 .pvr_mask = 0x7fff0000,
1123 .pvr_value = 0x00860000,
1124 .cpu_name = "e300c4",
1125 .cpu_features = CPU_FTRS_E300,
1126 .cpu_user_features = COMMON_USER,
1127 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1128 MMU_FTR_NEED_DTLB_SW_LRU,
1129 .icache_bsize = 32,
1130 .dcache_bsize = 32,
1131 .cpu_setup = __setup_cpu_603,
1132 .machine_check = machine_check_generic,
1133 .num_pmcs = 4,
1134 .oprofile_cpu_type = "ppc/e300",
1135 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1136 .platform = "ppc603",
1137 },
1138 { /* default match, we assume split I/D cache & TB (non-601)... */
1139 .pvr_mask = 0x00000000,
1140 .pvr_value = 0x00000000,
1141 .cpu_name = "(generic PPC)",
1142 .cpu_features = CPU_FTRS_CLASSIC32,
1143 .cpu_user_features = COMMON_USER,
1144 .mmu_features = MMU_FTR_HPTE_TABLE,
1145 .icache_bsize = 32,
1146 .dcache_bsize = 32,
1147 .machine_check = machine_check_generic,
1148 .platform = "ppc603",
1149 },
1150 #endif /* CLASSIC_PPC */
1151 #ifdef CONFIG_8xx
1152 { /* 8xx */
1153 .pvr_mask = 0xffff0000,
1154 .pvr_value = 0x00500000,
1155 .cpu_name = "8xx",
1156 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1157 * if the 8xx code is there.... */
1158 .cpu_features = CPU_FTRS_8XX,
1159 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1160 .mmu_features = MMU_FTR_TYPE_8xx,
1161 .icache_bsize = 16,
1162 .dcache_bsize = 16,
1163 .platform = "ppc823",
1164 },
1165 #endif /* CONFIG_8xx */
1166 #ifdef CONFIG_40x
1167 { /* 403GC */
1168 .pvr_mask = 0xffffff00,
1169 .pvr_value = 0x00200200,
1170 .cpu_name = "403GC",
1171 .cpu_features = CPU_FTRS_40X,
1172 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1173 .mmu_features = MMU_FTR_TYPE_40x,
1174 .icache_bsize = 16,
1175 .dcache_bsize = 16,
1176 .machine_check = machine_check_4xx,
1177 .platform = "ppc403",
1178 },
1179 { /* 403GCX */
1180 .pvr_mask = 0xffffff00,
1181 .pvr_value = 0x00201400,
1182 .cpu_name = "403GCX",
1183 .cpu_features = CPU_FTRS_40X,
1184 .cpu_user_features = PPC_FEATURE_32 |
1185 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1186 .mmu_features = MMU_FTR_TYPE_40x,
1187 .icache_bsize = 16,
1188 .dcache_bsize = 16,
1189 .machine_check = machine_check_4xx,
1190 .platform = "ppc403",
1191 },
1192 { /* 403G ?? */
1193 .pvr_mask = 0xffff0000,
1194 .pvr_value = 0x00200000,
1195 .cpu_name = "403G ??",
1196 .cpu_features = CPU_FTRS_40X,
1197 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1198 .mmu_features = MMU_FTR_TYPE_40x,
1199 .icache_bsize = 16,
1200 .dcache_bsize = 16,
1201 .machine_check = machine_check_4xx,
1202 .platform = "ppc403",
1203 },
1204 { /* 405GP */
1205 .pvr_mask = 0xffff0000,
1206 .pvr_value = 0x40110000,
1207 .cpu_name = "405GP",
1208 .cpu_features = CPU_FTRS_40X,
1209 .cpu_user_features = PPC_FEATURE_32 |
1210 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1211 .mmu_features = MMU_FTR_TYPE_40x,
1212 .icache_bsize = 32,
1213 .dcache_bsize = 32,
1214 .machine_check = machine_check_4xx,
1215 .platform = "ppc405",
1216 },
1217 { /* STB 03xxx */
1218 .pvr_mask = 0xffff0000,
1219 .pvr_value = 0x40130000,
1220 .cpu_name = "STB03xxx",
1221 .cpu_features = CPU_FTRS_40X,
1222 .cpu_user_features = PPC_FEATURE_32 |
1223 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1224 .mmu_features = MMU_FTR_TYPE_40x,
1225 .icache_bsize = 32,
1226 .dcache_bsize = 32,
1227 .machine_check = machine_check_4xx,
1228 .platform = "ppc405",
1229 },
1230 { /* STB 04xxx */
1231 .pvr_mask = 0xffff0000,
1232 .pvr_value = 0x41810000,
1233 .cpu_name = "STB04xxx",
1234 .cpu_features = CPU_FTRS_40X,
1235 .cpu_user_features = PPC_FEATURE_32 |
1236 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1237 .mmu_features = MMU_FTR_TYPE_40x,
1238 .icache_bsize = 32,
1239 .dcache_bsize = 32,
1240 .machine_check = machine_check_4xx,
1241 .platform = "ppc405",
1242 },
1243 { /* NP405L */
1244 .pvr_mask = 0xffff0000,
1245 .pvr_value = 0x41610000,
1246 .cpu_name = "NP405L",
1247 .cpu_features = CPU_FTRS_40X,
1248 .cpu_user_features = PPC_FEATURE_32 |
1249 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1250 .mmu_features = MMU_FTR_TYPE_40x,
1251 .icache_bsize = 32,
1252 .dcache_bsize = 32,
1253 .machine_check = machine_check_4xx,
1254 .platform = "ppc405",
1255 },
1256 { /* NP4GS3 */
1257 .pvr_mask = 0xffff0000,
1258 .pvr_value = 0x40B10000,
1259 .cpu_name = "NP4GS3",
1260 .cpu_features = CPU_FTRS_40X,
1261 .cpu_user_features = PPC_FEATURE_32 |
1262 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1263 .mmu_features = MMU_FTR_TYPE_40x,
1264 .icache_bsize = 32,
1265 .dcache_bsize = 32,
1266 .machine_check = machine_check_4xx,
1267 .platform = "ppc405",
1268 },
1269 { /* NP405H */
1270 .pvr_mask = 0xffff0000,
1271 .pvr_value = 0x41410000,
1272 .cpu_name = "NP405H",
1273 .cpu_features = CPU_FTRS_40X,
1274 .cpu_user_features = PPC_FEATURE_32 |
1275 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1276 .mmu_features = MMU_FTR_TYPE_40x,
1277 .icache_bsize = 32,
1278 .dcache_bsize = 32,
1279 .machine_check = machine_check_4xx,
1280 .platform = "ppc405",
1281 },
1282 { /* 405GPr */
1283 .pvr_mask = 0xffff0000,
1284 .pvr_value = 0x50910000,
1285 .cpu_name = "405GPr",
1286 .cpu_features = CPU_FTRS_40X,
1287 .cpu_user_features = PPC_FEATURE_32 |
1288 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1289 .mmu_features = MMU_FTR_TYPE_40x,
1290 .icache_bsize = 32,
1291 .dcache_bsize = 32,
1292 .machine_check = machine_check_4xx,
1293 .platform = "ppc405",
1294 },
1295 { /* STBx25xx */
1296 .pvr_mask = 0xffff0000,
1297 .pvr_value = 0x51510000,
1298 .cpu_name = "STBx25xx",
1299 .cpu_features = CPU_FTRS_40X,
1300 .cpu_user_features = PPC_FEATURE_32 |
1301 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1302 .mmu_features = MMU_FTR_TYPE_40x,
1303 .icache_bsize = 32,
1304 .dcache_bsize = 32,
1305 .machine_check = machine_check_4xx,
1306 .platform = "ppc405",
1307 },
1308 { /* 405LP */
1309 .pvr_mask = 0xffff0000,
1310 .pvr_value = 0x41F10000,
1311 .cpu_name = "405LP",
1312 .cpu_features = CPU_FTRS_40X,
1313 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1314 .mmu_features = MMU_FTR_TYPE_40x,
1315 .icache_bsize = 32,
1316 .dcache_bsize = 32,
1317 .machine_check = machine_check_4xx,
1318 .platform = "ppc405",
1319 },
1320 { /* Xilinx Virtex-II Pro */
1321 .pvr_mask = 0xfffff000,
1322 .pvr_value = 0x20010000,
1323 .cpu_name = "Virtex-II Pro",
1324 .cpu_features = CPU_FTRS_40X,
1325 .cpu_user_features = PPC_FEATURE_32 |
1326 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1327 .mmu_features = MMU_FTR_TYPE_40x,
1328 .icache_bsize = 32,
1329 .dcache_bsize = 32,
1330 .machine_check = machine_check_4xx,
1331 .platform = "ppc405",
1332 },
1333 { /* Xilinx Virtex-4 FX */
1334 .pvr_mask = 0xfffff000,
1335 .pvr_value = 0x20011000,
1336 .cpu_name = "Virtex-4 FX",
1337 .cpu_features = CPU_FTRS_40X,
1338 .cpu_user_features = PPC_FEATURE_32 |
1339 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1340 .mmu_features = MMU_FTR_TYPE_40x,
1341 .icache_bsize = 32,
1342 .dcache_bsize = 32,
1343 .machine_check = machine_check_4xx,
1344 .platform = "ppc405",
1345 },
1346 { /* 405EP */
1347 .pvr_mask = 0xffff0000,
1348 .pvr_value = 0x51210000,
1349 .cpu_name = "405EP",
1350 .cpu_features = CPU_FTRS_40X,
1351 .cpu_user_features = PPC_FEATURE_32 |
1352 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1353 .mmu_features = MMU_FTR_TYPE_40x,
1354 .icache_bsize = 32,
1355 .dcache_bsize = 32,
1356 .machine_check = machine_check_4xx,
1357 .platform = "ppc405",
1358 },
1359 { /* 405EX Rev. A/B with Security */
1360 .pvr_mask = 0xffff000f,
1361 .pvr_value = 0x12910007,
1362 .cpu_name = "405EX Rev. A/B",
1363 .cpu_features = CPU_FTRS_40X,
1364 .cpu_user_features = PPC_FEATURE_32 |
1365 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1366 .mmu_features = MMU_FTR_TYPE_40x,
1367 .icache_bsize = 32,
1368 .dcache_bsize = 32,
1369 .machine_check = machine_check_4xx,
1370 .platform = "ppc405",
1371 },
1372 { /* 405EX Rev. C without Security */
1373 .pvr_mask = 0xffff000f,
1374 .pvr_value = 0x1291000d,
1375 .cpu_name = "405EX Rev. C",
1376 .cpu_features = CPU_FTRS_40X,
1377 .cpu_user_features = PPC_FEATURE_32 |
1378 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1379 .mmu_features = MMU_FTR_TYPE_40x,
1380 .icache_bsize = 32,
1381 .dcache_bsize = 32,
1382 .machine_check = machine_check_4xx,
1383 .platform = "ppc405",
1384 },
1385 { /* 405EX Rev. C with Security */
1386 .pvr_mask = 0xffff000f,
1387 .pvr_value = 0x1291000f,
1388 .cpu_name = "405EX Rev. C",
1389 .cpu_features = CPU_FTRS_40X,
1390 .cpu_user_features = PPC_FEATURE_32 |
1391 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1392 .mmu_features = MMU_FTR_TYPE_40x,
1393 .icache_bsize = 32,
1394 .dcache_bsize = 32,
1395 .machine_check = machine_check_4xx,
1396 .platform = "ppc405",
1397 },
1398 { /* 405EX Rev. D without Security */
1399 .pvr_mask = 0xffff000f,
1400 .pvr_value = 0x12910003,
1401 .cpu_name = "405EX Rev. D",
1402 .cpu_features = CPU_FTRS_40X,
1403 .cpu_user_features = PPC_FEATURE_32 |
1404 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1405 .mmu_features = MMU_FTR_TYPE_40x,
1406 .icache_bsize = 32,
1407 .dcache_bsize = 32,
1408 .machine_check = machine_check_4xx,
1409 .platform = "ppc405",
1410 },
1411 { /* 405EX Rev. D with Security */
1412 .pvr_mask = 0xffff000f,
1413 .pvr_value = 0x12910005,
1414 .cpu_name = "405EX Rev. D",
1415 .cpu_features = CPU_FTRS_40X,
1416 .cpu_user_features = PPC_FEATURE_32 |
1417 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1418 .mmu_features = MMU_FTR_TYPE_40x,
1419 .icache_bsize = 32,
1420 .dcache_bsize = 32,
1421 .machine_check = machine_check_4xx,
1422 .platform = "ppc405",
1423 },
1424 { /* 405EXr Rev. A/B without Security */
1425 .pvr_mask = 0xffff000f,
1426 .pvr_value = 0x12910001,
1427 .cpu_name = "405EXr Rev. A/B",
1428 .cpu_features = CPU_FTRS_40X,
1429 .cpu_user_features = PPC_FEATURE_32 |
1430 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1431 .mmu_features = MMU_FTR_TYPE_40x,
1432 .icache_bsize = 32,
1433 .dcache_bsize = 32,
1434 .machine_check = machine_check_4xx,
1435 .platform = "ppc405",
1436 },
1437 { /* 405EXr Rev. C without Security */
1438 .pvr_mask = 0xffff000f,
1439 .pvr_value = 0x12910009,
1440 .cpu_name = "405EXr Rev. C",
1441 .cpu_features = CPU_FTRS_40X,
1442 .cpu_user_features = PPC_FEATURE_32 |
1443 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1444 .mmu_features = MMU_FTR_TYPE_40x,
1445 .icache_bsize = 32,
1446 .dcache_bsize = 32,
1447 .machine_check = machine_check_4xx,
1448 .platform = "ppc405",
1449 },
1450 { /* 405EXr Rev. C with Security */
1451 .pvr_mask = 0xffff000f,
1452 .pvr_value = 0x1291000b,
1453 .cpu_name = "405EXr Rev. C",
1454 .cpu_features = CPU_FTRS_40X,
1455 .cpu_user_features = PPC_FEATURE_32 |
1456 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1457 .mmu_features = MMU_FTR_TYPE_40x,
1458 .icache_bsize = 32,
1459 .dcache_bsize = 32,
1460 .machine_check = machine_check_4xx,
1461 .platform = "ppc405",
1462 },
1463 { /* 405EXr Rev. D without Security */
1464 .pvr_mask = 0xffff000f,
1465 .pvr_value = 0x12910000,
1466 .cpu_name = "405EXr Rev. D",
1467 .cpu_features = CPU_FTRS_40X,
1468 .cpu_user_features = PPC_FEATURE_32 |
1469 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1470 .mmu_features = MMU_FTR_TYPE_40x,
1471 .icache_bsize = 32,
1472 .dcache_bsize = 32,
1473 .machine_check = machine_check_4xx,
1474 .platform = "ppc405",
1475 },
1476 { /* 405EXr Rev. D with Security */
1477 .pvr_mask = 0xffff000f,
1478 .pvr_value = 0x12910002,
1479 .cpu_name = "405EXr Rev. D",
1480 .cpu_features = CPU_FTRS_40X,
1481 .cpu_user_features = PPC_FEATURE_32 |
1482 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1483 .mmu_features = MMU_FTR_TYPE_40x,
1484 .icache_bsize = 32,
1485 .dcache_bsize = 32,
1486 .machine_check = machine_check_4xx,
1487 .platform = "ppc405",
1488 },
1489 {
1490 /* 405EZ */
1491 .pvr_mask = 0xffff0000,
1492 .pvr_value = 0x41510000,
1493 .cpu_name = "405EZ",
1494 .cpu_features = CPU_FTRS_40X,
1495 .cpu_user_features = PPC_FEATURE_32 |
1496 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1497 .mmu_features = MMU_FTR_TYPE_40x,
1498 .icache_bsize = 32,
1499 .dcache_bsize = 32,
1500 .machine_check = machine_check_4xx,
1501 .platform = "ppc405",
1502 },
1503 { /* default match */
1504 .pvr_mask = 0x00000000,
1505 .pvr_value = 0x00000000,
1506 .cpu_name = "(generic 40x PPC)",
1507 .cpu_features = CPU_FTRS_40X,
1508 .cpu_user_features = PPC_FEATURE_32 |
1509 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1510 .mmu_features = MMU_FTR_TYPE_40x,
1511 .icache_bsize = 32,
1512 .dcache_bsize = 32,
1513 .machine_check = machine_check_4xx,
1514 .platform = "ppc405",
1515 }
1516
1517 #endif /* CONFIG_40x */
1518 #ifdef CONFIG_44x
1519 {
1520 .pvr_mask = 0xf0000fff,
1521 .pvr_value = 0x40000850,
1522 .cpu_name = "440GR Rev. A",
1523 .cpu_features = CPU_FTRS_44X,
1524 .cpu_user_features = COMMON_USER_BOOKE,
1525 .mmu_features = MMU_FTR_TYPE_44x,
1526 .icache_bsize = 32,
1527 .dcache_bsize = 32,
1528 .machine_check = machine_check_4xx,
1529 .platform = "ppc440",
1530 },
1531 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1532 .pvr_mask = 0xf0000fff,
1533 .pvr_value = 0x40000858,
1534 .cpu_name = "440EP Rev. A",
1535 .cpu_features = CPU_FTRS_44X,
1536 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1537 .mmu_features = MMU_FTR_TYPE_44x,
1538 .icache_bsize = 32,
1539 .dcache_bsize = 32,
1540 .cpu_setup = __setup_cpu_440ep,
1541 .machine_check = machine_check_4xx,
1542 .platform = "ppc440",
1543 },
1544 {
1545 .pvr_mask = 0xf0000fff,
1546 .pvr_value = 0x400008d3,
1547 .cpu_name = "440GR Rev. B",
1548 .cpu_features = CPU_FTRS_44X,
1549 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1550 .mmu_features = MMU_FTR_TYPE_44x,
1551 .icache_bsize = 32,
1552 .dcache_bsize = 32,
1553 .machine_check = machine_check_4xx,
1554 .platform = "ppc440",
1555 },
1556 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1557 .pvr_mask = 0xf0000ff7,
1558 .pvr_value = 0x400008d4,
1559 .cpu_name = "440EP Rev. C",
1560 .cpu_features = CPU_FTRS_44X,
1561 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1562 .mmu_features = MMU_FTR_TYPE_44x,
1563 .icache_bsize = 32,
1564 .dcache_bsize = 32,
1565 .cpu_setup = __setup_cpu_440ep,
1566 .machine_check = machine_check_4xx,
1567 .platform = "ppc440",
1568 },
1569 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1570 .pvr_mask = 0xf0000fff,
1571 .pvr_value = 0x400008db,
1572 .cpu_name = "440EP Rev. B",
1573 .cpu_features = CPU_FTRS_44X,
1574 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1575 .mmu_features = MMU_FTR_TYPE_44x,
1576 .icache_bsize = 32,
1577 .dcache_bsize = 32,
1578 .cpu_setup = __setup_cpu_440ep,
1579 .machine_check = machine_check_4xx,
1580 .platform = "ppc440",
1581 },
1582 { /* 440GRX */
1583 .pvr_mask = 0xf0000ffb,
1584 .pvr_value = 0x200008D0,
1585 .cpu_name = "440GRX",
1586 .cpu_features = CPU_FTRS_44X,
1587 .cpu_user_features = COMMON_USER_BOOKE,
1588 .mmu_features = MMU_FTR_TYPE_44x,
1589 .icache_bsize = 32,
1590 .dcache_bsize = 32,
1591 .cpu_setup = __setup_cpu_440grx,
1592 .machine_check = machine_check_440A,
1593 .platform = "ppc440",
1594 },
1595 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1596 .pvr_mask = 0xf0000ffb,
1597 .pvr_value = 0x200008D8,
1598 .cpu_name = "440EPX",
1599 .cpu_features = CPU_FTRS_44X,
1600 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1601 .mmu_features = MMU_FTR_TYPE_44x,
1602 .icache_bsize = 32,
1603 .dcache_bsize = 32,
1604 .cpu_setup = __setup_cpu_440epx,
1605 .machine_check = machine_check_440A,
1606 .platform = "ppc440",
1607 },
1608 { /* 440GP Rev. B */
1609 .pvr_mask = 0xf0000fff,
1610 .pvr_value = 0x40000440,
1611 .cpu_name = "440GP Rev. B",
1612 .cpu_features = CPU_FTRS_44X,
1613 .cpu_user_features = COMMON_USER_BOOKE,
1614 .mmu_features = MMU_FTR_TYPE_44x,
1615 .icache_bsize = 32,
1616 .dcache_bsize = 32,
1617 .machine_check = machine_check_4xx,
1618 .platform = "ppc440gp",
1619 },
1620 { /* 440GP Rev. C */
1621 .pvr_mask = 0xf0000fff,
1622 .pvr_value = 0x40000481,
1623 .cpu_name = "440GP Rev. C",
1624 .cpu_features = CPU_FTRS_44X,
1625 .cpu_user_features = COMMON_USER_BOOKE,
1626 .mmu_features = MMU_FTR_TYPE_44x,
1627 .icache_bsize = 32,
1628 .dcache_bsize = 32,
1629 .machine_check = machine_check_4xx,
1630 .platform = "ppc440gp",
1631 },
1632 { /* 440GX Rev. A */
1633 .pvr_mask = 0xf0000fff,
1634 .pvr_value = 0x50000850,
1635 .cpu_name = "440GX Rev. A",
1636 .cpu_features = CPU_FTRS_44X,
1637 .cpu_user_features = COMMON_USER_BOOKE,
1638 .mmu_features = MMU_FTR_TYPE_44x,
1639 .icache_bsize = 32,
1640 .dcache_bsize = 32,
1641 .cpu_setup = __setup_cpu_440gx,
1642 .machine_check = machine_check_440A,
1643 .platform = "ppc440",
1644 },
1645 { /* 440GX Rev. B */
1646 .pvr_mask = 0xf0000fff,
1647 .pvr_value = 0x50000851,
1648 .cpu_name = "440GX Rev. B",
1649 .cpu_features = CPU_FTRS_44X,
1650 .cpu_user_features = COMMON_USER_BOOKE,
1651 .mmu_features = MMU_FTR_TYPE_44x,
1652 .icache_bsize = 32,
1653 .dcache_bsize = 32,
1654 .cpu_setup = __setup_cpu_440gx,
1655 .machine_check = machine_check_440A,
1656 .platform = "ppc440",
1657 },
1658 { /* 440GX Rev. C */
1659 .pvr_mask = 0xf0000fff,
1660 .pvr_value = 0x50000892,
1661 .cpu_name = "440GX Rev. C",
1662 .cpu_features = CPU_FTRS_44X,
1663 .cpu_user_features = COMMON_USER_BOOKE,
1664 .mmu_features = MMU_FTR_TYPE_44x,
1665 .icache_bsize = 32,
1666 .dcache_bsize = 32,
1667 .cpu_setup = __setup_cpu_440gx,
1668 .machine_check = machine_check_440A,
1669 .platform = "ppc440",
1670 },
1671 { /* 440GX Rev. F */
1672 .pvr_mask = 0xf0000fff,
1673 .pvr_value = 0x50000894,
1674 .cpu_name = "440GX Rev. F",
1675 .cpu_features = CPU_FTRS_44X,
1676 .cpu_user_features = COMMON_USER_BOOKE,
1677 .mmu_features = MMU_FTR_TYPE_44x,
1678 .icache_bsize = 32,
1679 .dcache_bsize = 32,
1680 .cpu_setup = __setup_cpu_440gx,
1681 .machine_check = machine_check_440A,
1682 .platform = "ppc440",
1683 },
1684 { /* 440SP Rev. A */
1685 .pvr_mask = 0xfff00fff,
1686 .pvr_value = 0x53200891,
1687 .cpu_name = "440SP Rev. A",
1688 .cpu_features = CPU_FTRS_44X,
1689 .cpu_user_features = COMMON_USER_BOOKE,
1690 .mmu_features = MMU_FTR_TYPE_44x,
1691 .icache_bsize = 32,
1692 .dcache_bsize = 32,
1693 .machine_check = machine_check_4xx,
1694 .platform = "ppc440",
1695 },
1696 { /* 440SPe Rev. A */
1697 .pvr_mask = 0xfff00fff,
1698 .pvr_value = 0x53400890,
1699 .cpu_name = "440SPe Rev. A",
1700 .cpu_features = CPU_FTRS_44X,
1701 .cpu_user_features = COMMON_USER_BOOKE,
1702 .mmu_features = MMU_FTR_TYPE_44x,
1703 .icache_bsize = 32,
1704 .dcache_bsize = 32,
1705 .cpu_setup = __setup_cpu_440spe,
1706 .machine_check = machine_check_440A,
1707 .platform = "ppc440",
1708 },
1709 { /* 440SPe Rev. B */
1710 .pvr_mask = 0xfff00fff,
1711 .pvr_value = 0x53400891,
1712 .cpu_name = "440SPe Rev. B",
1713 .cpu_features = CPU_FTRS_44X,
1714 .cpu_user_features = COMMON_USER_BOOKE,
1715 .mmu_features = MMU_FTR_TYPE_44x,
1716 .icache_bsize = 32,
1717 .dcache_bsize = 32,
1718 .cpu_setup = __setup_cpu_440spe,
1719 .machine_check = machine_check_440A,
1720 .platform = "ppc440",
1721 },
1722 { /* 440 in Xilinx Virtex-5 FXT */
1723 .pvr_mask = 0xfffffff0,
1724 .pvr_value = 0x7ff21910,
1725 .cpu_name = "440 in Virtex-5 FXT",
1726 .cpu_features = CPU_FTRS_44X,
1727 .cpu_user_features = COMMON_USER_BOOKE,
1728 .mmu_features = MMU_FTR_TYPE_44x,
1729 .icache_bsize = 32,
1730 .dcache_bsize = 32,
1731 .cpu_setup = __setup_cpu_440x5,
1732 .machine_check = machine_check_440A,
1733 .platform = "ppc440",
1734 },
1735 { /* 460EX */
1736 .pvr_mask = 0xffff0006,
1737 .pvr_value = 0x13020002,
1738 .cpu_name = "460EX",
1739 .cpu_features = CPU_FTRS_440x6,
1740 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1741 .mmu_features = MMU_FTR_TYPE_44x,
1742 .icache_bsize = 32,
1743 .dcache_bsize = 32,
1744 .cpu_setup = __setup_cpu_460ex,
1745 .machine_check = machine_check_440A,
1746 .platform = "ppc440",
1747 },
1748 { /* 460EX Rev B */
1749 .pvr_mask = 0xffff0007,
1750 .pvr_value = 0x13020004,
1751 .cpu_name = "460EX Rev. B",
1752 .cpu_features = CPU_FTRS_440x6,
1753 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1754 .mmu_features = MMU_FTR_TYPE_44x,
1755 .icache_bsize = 32,
1756 .dcache_bsize = 32,
1757 .cpu_setup = __setup_cpu_460ex,
1758 .machine_check = machine_check_440A,
1759 .platform = "ppc440",
1760 },
1761 { /* 460GT */
1762 .pvr_mask = 0xffff0006,
1763 .pvr_value = 0x13020000,
1764 .cpu_name = "460GT",
1765 .cpu_features = CPU_FTRS_440x6,
1766 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1767 .mmu_features = MMU_FTR_TYPE_44x,
1768 .icache_bsize = 32,
1769 .dcache_bsize = 32,
1770 .cpu_setup = __setup_cpu_460gt,
1771 .machine_check = machine_check_440A,
1772 .platform = "ppc440",
1773 },
1774 { /* 460GT Rev B */
1775 .pvr_mask = 0xffff0007,
1776 .pvr_value = 0x13020005,
1777 .cpu_name = "460GT Rev. B",
1778 .cpu_features = CPU_FTRS_440x6,
1779 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1780 .mmu_features = MMU_FTR_TYPE_44x,
1781 .icache_bsize = 32,
1782 .dcache_bsize = 32,
1783 .cpu_setup = __setup_cpu_460gt,
1784 .machine_check = machine_check_440A,
1785 .platform = "ppc440",
1786 },
1787 { /* 460SX */
1788 .pvr_mask = 0xffffff00,
1789 .pvr_value = 0x13541800,
1790 .cpu_name = "460SX",
1791 .cpu_features = CPU_FTRS_44X,
1792 .cpu_user_features = COMMON_USER_BOOKE,
1793 .mmu_features = MMU_FTR_TYPE_44x,
1794 .icache_bsize = 32,
1795 .dcache_bsize = 32,
1796 .cpu_setup = __setup_cpu_460sx,
1797 .machine_check = machine_check_440A,
1798 .platform = "ppc440",
1799 },
1800 { /* 464 in APM821xx */
1801 .pvr_mask = 0xffffff00,
1802 .pvr_value = 0x12C41C80,
1803 .cpu_name = "APM821XX",
1804 .cpu_features = CPU_FTRS_44X,
1805 .cpu_user_features = COMMON_USER_BOOKE |
1806 PPC_FEATURE_HAS_FPU,
1807 .mmu_features = MMU_FTR_TYPE_44x,
1808 .icache_bsize = 32,
1809 .dcache_bsize = 32,
1810 .cpu_setup = __setup_cpu_apm821xx,
1811 .machine_check = machine_check_440A,
1812 .platform = "ppc440",
1813 },
1814 { /* 476 DD2 core */
1815 .pvr_mask = 0xffffffff,
1816 .pvr_value = 0x11a52080,
1817 .cpu_name = "476",
1818 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1819 .cpu_user_features = COMMON_USER_BOOKE |
1820 PPC_FEATURE_HAS_FPU,
1821 .mmu_features = MMU_FTR_TYPE_47x |
1822 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1823 .icache_bsize = 32,
1824 .dcache_bsize = 128,
1825 .machine_check = machine_check_47x,
1826 .platform = "ppc470",
1827 },
1828 { /* 476 iss */
1829 .pvr_mask = 0xffff0000,
1830 .pvr_value = 0x00050000,
1831 .cpu_name = "476",
1832 .cpu_features = CPU_FTRS_47X,
1833 .cpu_user_features = COMMON_USER_BOOKE |
1834 PPC_FEATURE_HAS_FPU,
1835 .mmu_features = MMU_FTR_TYPE_47x |
1836 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1837 .icache_bsize = 32,
1838 .dcache_bsize = 128,
1839 .machine_check = machine_check_47x,
1840 .platform = "ppc470",
1841 },
1842 { /* 476 others */
1843 .pvr_mask = 0xffff0000,
1844 .pvr_value = 0x11a50000,
1845 .cpu_name = "476",
1846 .cpu_features = CPU_FTRS_47X,
1847 .cpu_user_features = COMMON_USER_BOOKE |
1848 PPC_FEATURE_HAS_FPU,
1849 .mmu_features = MMU_FTR_TYPE_47x |
1850 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1851 .icache_bsize = 32,
1852 .dcache_bsize = 128,
1853 .machine_check = machine_check_47x,
1854 .platform = "ppc470",
1855 },
1856 { /* default match */
1857 .pvr_mask = 0x00000000,
1858 .pvr_value = 0x00000000,
1859 .cpu_name = "(generic 44x PPC)",
1860 .cpu_features = CPU_FTRS_44X,
1861 .cpu_user_features = COMMON_USER_BOOKE,
1862 .mmu_features = MMU_FTR_TYPE_44x,
1863 .icache_bsize = 32,
1864 .dcache_bsize = 32,
1865 .machine_check = machine_check_4xx,
1866 .platform = "ppc440",
1867 }
1868 #endif /* CONFIG_44x */
1869 #ifdef CONFIG_E200
1870 { /* e200z5 */
1871 .pvr_mask = 0xfff00000,
1872 .pvr_value = 0x81000000,
1873 .cpu_name = "e200z5",
1874 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1875 .cpu_features = CPU_FTRS_E200,
1876 .cpu_user_features = COMMON_USER_BOOKE |
1877 PPC_FEATURE_HAS_EFP_SINGLE |
1878 PPC_FEATURE_UNIFIED_CACHE,
1879 .mmu_features = MMU_FTR_TYPE_FSL_E,
1880 .dcache_bsize = 32,
1881 .machine_check = machine_check_e200,
1882 .platform = "ppc5554",
1883 },
1884 { /* e200z6 */
1885 .pvr_mask = 0xfff00000,
1886 .pvr_value = 0x81100000,
1887 .cpu_name = "e200z6",
1888 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1889 .cpu_features = CPU_FTRS_E200,
1890 .cpu_user_features = COMMON_USER_BOOKE |
1891 PPC_FEATURE_HAS_SPE_COMP |
1892 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1893 PPC_FEATURE_UNIFIED_CACHE,
1894 .mmu_features = MMU_FTR_TYPE_FSL_E,
1895 .dcache_bsize = 32,
1896 .machine_check = machine_check_e200,
1897 .platform = "ppc5554",
1898 },
1899 { /* default match */
1900 .pvr_mask = 0x00000000,
1901 .pvr_value = 0x00000000,
1902 .cpu_name = "(generic E200 PPC)",
1903 .cpu_features = CPU_FTRS_E200,
1904 .cpu_user_features = COMMON_USER_BOOKE |
1905 PPC_FEATURE_HAS_EFP_SINGLE |
1906 PPC_FEATURE_UNIFIED_CACHE,
1907 .mmu_features = MMU_FTR_TYPE_FSL_E,
1908 .dcache_bsize = 32,
1909 .cpu_setup = __setup_cpu_e200,
1910 .machine_check = machine_check_e200,
1911 .platform = "ppc5554",
1912 }
1913 #endif /* CONFIG_E200 */
1914 #endif /* CONFIG_PPC32 */
1915 #ifdef CONFIG_E500
1916 #ifdef CONFIG_PPC32
1917 { /* e500 */
1918 .pvr_mask = 0xffff0000,
1919 .pvr_value = 0x80200000,
1920 .cpu_name = "e500",
1921 .cpu_features = CPU_FTRS_E500,
1922 .cpu_user_features = COMMON_USER_BOOKE |
1923 PPC_FEATURE_HAS_SPE_COMP |
1924 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1925 .mmu_features = MMU_FTR_TYPE_FSL_E,
1926 .icache_bsize = 32,
1927 .dcache_bsize = 32,
1928 .num_pmcs = 4,
1929 .oprofile_cpu_type = "ppc/e500",
1930 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1931 .cpu_setup = __setup_cpu_e500v1,
1932 .machine_check = machine_check_e500,
1933 .platform = "ppc8540",
1934 },
1935 { /* e500v2 */
1936 .pvr_mask = 0xffff0000,
1937 .pvr_value = 0x80210000,
1938 .cpu_name = "e500v2",
1939 .cpu_features = CPU_FTRS_E500_2,
1940 .cpu_user_features = COMMON_USER_BOOKE |
1941 PPC_FEATURE_HAS_SPE_COMP |
1942 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1943 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1944 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1945 .icache_bsize = 32,
1946 .dcache_bsize = 32,
1947 .num_pmcs = 4,
1948 .oprofile_cpu_type = "ppc/e500",
1949 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1950 .cpu_setup = __setup_cpu_e500v2,
1951 .machine_check = machine_check_e500,
1952 .platform = "ppc8548",
1953 },
1954 { /* e500mc */
1955 .pvr_mask = 0xffff0000,
1956 .pvr_value = 0x80230000,
1957 .cpu_name = "e500mc",
1958 .cpu_features = CPU_FTRS_E500MC,
1959 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1960 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1961 MMU_FTR_USE_TLBILX,
1962 .icache_bsize = 64,
1963 .dcache_bsize = 64,
1964 .num_pmcs = 4,
1965 .oprofile_cpu_type = "ppc/e500mc",
1966 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1967 .cpu_setup = __setup_cpu_e500mc,
1968 .machine_check = machine_check_e500mc,
1969 .platform = "ppce500mc",
1970 },
1971 #endif /* CONFIG_PPC32 */
1972 { /* e5500 */
1973 .pvr_mask = 0xffff0000,
1974 .pvr_value = 0x80240000,
1975 .cpu_name = "e5500",
1976 .cpu_features = CPU_FTRS_E500MC,
1977 .cpu_user_features = COMMON_USER_BOOKE,
1978 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1979 MMU_FTR_USE_TLBILX,
1980 .icache_bsize = 64,
1981 .dcache_bsize = 64,
1982 .num_pmcs = 4,
1983 .oprofile_cpu_type = "ppc/e500mc",
1984 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1985 .cpu_setup = __setup_cpu_e5500,
1986 .cpu_restore = __restore_cpu_e5500,
1987 .machine_check = machine_check_e500mc,
1988 .platform = "ppce5500",
1989 },
1990 #ifdef CONFIG_PPC32
1991 { /* default match */
1992 .pvr_mask = 0x00000000,
1993 .pvr_value = 0x00000000,
1994 .cpu_name = "(generic E500 PPC)",
1995 .cpu_features = CPU_FTRS_E500,
1996 .cpu_user_features = COMMON_USER_BOOKE |
1997 PPC_FEATURE_HAS_SPE_COMP |
1998 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1999 .mmu_features = MMU_FTR_TYPE_FSL_E,
2000 .icache_bsize = 32,
2001 .dcache_bsize = 32,
2002 .machine_check = machine_check_e500,
2003 .platform = "powerpc",
2004 }
2005 #endif /* CONFIG_PPC32 */
2006 #endif /* CONFIG_E500 */
2007
2008 #ifdef CONFIG_PPC_BOOK3E_64
2009 { /* This is a default entry to get going, to be replaced by
2010 * a real one at some stage
2011 */
2012 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
2013 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
2014 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
2015 .pvr_mask = 0x00000000,
2016 .pvr_value = 0x00000000,
2017 .cpu_name = "Book3E",
2018 .cpu_features = CPU_FTRS_BASE_BOOK3E,
2019 .cpu_user_features = COMMON_USER_PPC64,
2020 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
2021 MMU_FTR_USE_TLBIVAX_BCAST |
2022 MMU_FTR_LOCK_BCAST_INVAL,
2023 .icache_bsize = 64,
2024 .dcache_bsize = 64,
2025 .num_pmcs = 0,
2026 .machine_check = machine_check_generic,
2027 .platform = "power6",
2028 },
2029 #endif
2030 };
2031
2032 static struct cpu_spec the_cpu_spec;
2033
2034 static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
2035 {
2036 struct cpu_spec *t = &the_cpu_spec;
2037 struct cpu_spec old;
2038
2039 t = PTRRELOC(t);
2040 old = *t;
2041
2042 /* Copy everything, then do fixups */
2043 *t = *s;
2044
2045 /*
2046 * If we are overriding a previous value derived from the real
2047 * PVR with a new value obtained using a logical PVR value,
2048 * don't modify the performance monitor fields.
2049 */
2050 if (old.num_pmcs && !s->num_pmcs) {
2051 t->num_pmcs = old.num_pmcs;
2052 t->pmc_type = old.pmc_type;
2053 t->oprofile_type = old.oprofile_type;
2054 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2055 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2056 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2057
2058 /*
2059 * If we have passed through this logic once before and
2060 * have pulled the default case because the real PVR was
2061 * not found inside cpu_specs[], then we are possibly
2062 * running in compatibility mode. In that case, let the
2063 * oprofiler know which set of compatibility counters to
2064 * pull from by making sure the oprofile_cpu_type string
2065 * is set to that of compatibility mode. If the
2066 * oprofile_cpu_type already has a value, then we are
2067 * possibly overriding a real PVR with a logical one,
2068 * and, in that case, keep the current value for
2069 * oprofile_cpu_type.
2070 */
2071 if (old.oprofile_cpu_type != NULL) {
2072 t->oprofile_cpu_type = old.oprofile_cpu_type;
2073 t->oprofile_type = old.oprofile_type;
2074 }
2075 }
2076
2077 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2078
2079 /*
2080 * Set the base platform string once; assumes
2081 * we're called with real pvr first.
2082 */
2083 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2084 *PTRRELOC(&powerpc_base_platform) = t->platform;
2085
2086 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2087 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2088 * that processor. I will consolidate that at a later time, for now,
2089 * just use #ifdef. We also don't need to PTRRELOC the function
2090 * pointer on ppc64 and booke as we are running at 0 in real mode
2091 * on ppc64 and reloc_offset is always 0 on booke.
2092 */
2093 if (t->cpu_setup) {
2094 t->cpu_setup(offset, t);
2095 }
2096 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2097 }
2098
2099 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2100 {
2101 struct cpu_spec *s = cpu_specs;
2102 int i;
2103
2104 s = PTRRELOC(s);
2105
2106 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2107 if ((pvr & s->pvr_mask) == s->pvr_value) {
2108 setup_cpu_spec(offset, s);
2109 return s;
2110 }
2111 }
2112
2113 BUG();
2114
2115 return NULL;
2116 }
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