3 turbostat \- Report processor frequency and idle statistics
14 .RB [ "\-i interval_sec" ]
16 \fBturbostat \fP reports processor topology, frequency
17 and idle power state statistics on modern X86 processors.
18 Either \fBcommand\fP is forked and statistics are printed
19 upon its completion, or statistics are printed periodically.
22 requires that the processor
23 supports an "invariant" TSC, plus the APERF and MPERF MSRs.
24 \fBturbostat \fP will report idle cpu power state residency
25 on processors that additionally support C-state residency counters.
28 The \fB-v\fP option increases verbosity.
30 The \fB-M MSR#\fP option dumps the specified MSR,
31 in addition to the usual frequency and idle statistics.
33 The \fB-i interval_sec\fP option prints statistics every \fiinterval_sec\fP seconds.
34 The default is 5 seconds.
36 The \fBcommand\fP parameter forks \fBcommand\fP and upon its exit,
37 displays the statistics gathered since it was forked.
39 .SH FIELD DESCRIPTIONS
41 \fBpkg\fP processor package number.
42 \fBcore\fP processor core number.
43 \fBCPU\fP Linux CPU (logical processor) number.
44 \fB%c0\fP percent of the interval that the CPU retired instructions.
45 \fBGHz\fP average clock rate while the CPU was in c0 state.
46 \fBTSC\fP average GHz that the TSC ran during the entire interval.
47 \fB%c1, %c3, %c6\fP show the percentage residency in hardware core idle states.
48 \fB%pc3, %pc6\fP percentage residency in hardware package idle states.
52 Without any parameters, turbostat prints out counters ever 5 seconds.
53 (override interval with "-i sec" option, or specify a command
54 for turbostat to fork).
56 The first row of statistics reflect the average for the entire system.
57 Subsequent rows show per-CPU statistics.
60 [root@x980]# ./turbostat
61 core CPU %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6
62 0.04 1.62 3.38 0.11 0.00 99.85 0.00 95.07
63 0 0 0.04 1.62 3.38 0.06 0.00 99.90 0.00 95.07
64 0 6 0.02 1.62 3.38 0.08 0.00 99.90 0.00 95.07
65 1 2 0.10 1.62 3.38 0.29 0.00 99.61 0.00 95.07
66 1 8 0.11 1.62 3.38 0.28 0.00 99.61 0.00 95.07
67 2 4 0.01 1.62 3.38 0.01 0.00 99.98 0.00 95.07
68 2 10 0.01 1.61 3.38 0.02 0.00 99.98 0.00 95.07
69 8 1 0.07 1.62 3.38 0.15 0.00 99.78 0.00 95.07
70 8 7 0.03 1.62 3.38 0.19 0.00 99.78 0.00 95.07
71 9 3 0.01 1.62 3.38 0.02 0.00 99.98 0.00 95.07
72 9 9 0.01 1.62 3.38 0.02 0.00 99.98 0.00 95.07
73 10 5 0.01 1.62 3.38 0.13 0.00 99.86 0.00 95.07
74 10 11 0.08 1.62 3.38 0.05 0.00 99.86 0.00 95.07
77 The "-v" option adds verbosity to the output:
80 GenuineIntel 11 CPUID levels; family:model:stepping 0x6:2c:2 (6:44:2)
81 12 * 133 = 1600 MHz max efficiency
82 25 * 133 = 3333 MHz TSC frequency
83 26 * 133 = 3467 MHz max turbo 4 active cores
84 26 * 133 = 3467 MHz max turbo 3 active cores
85 27 * 133 = 3600 MHz max turbo 2 active cores
86 27 * 133 = 3600 MHz max turbo 1 active cores
89 The \fBmax efficiency\fP frequency, a.k.a. Low Frequency Mode, is the frequency
90 available at the minimum package voltage. The \fBTSC frequency\fP is the nominal
91 maximum frequency of the processor if turbo-mode were not available. This frequency
92 should be sustainable on all CPUs indefinitely, given nominal power and cooling.
93 The remaining rows show what maximum turbo frequency is possible
94 depending on the number of idle cores. Note that this information is
95 not available on all processors.
97 If turbostat is invoked with a command, it will fork that command
98 and output the statistics gathered when the command exits.
99 eg. Here a cycle soaker is run on 1 CPU (see %c0) for a few seconds
100 until ^C while the other CPUs are mostly idle:
103 [root@x980 lenb]# ./turbostat cat /dev/zero > /dev/null
105 ^Ccore CPU %c0 GHz TSC %c1 %c3 %c6 %pc3 %pc6
106 8.49 3.63 3.38 16.23 0.66 74.63 0.00 0.00
107 0 0 1.22 3.62 3.38 32.18 0.00 66.60 0.00 0.00
108 0 6 0.40 3.61 3.38 33.00 0.00 66.60 0.00 0.00
109 1 2 0.11 3.14 3.38 0.19 3.95 95.75 0.00 0.00
110 1 8 0.05 2.88 3.38 0.25 3.95 95.75 0.00 0.00
111 2 4 0.00 3.13 3.38 0.02 0.00 99.98 0.00 0.00
112 2 10 0.00 3.09 3.38 0.02 0.00 99.98 0.00 0.00
113 8 1 0.04 3.50 3.38 14.43 0.00 85.54 0.00 0.00
114 8 7 0.03 2.98 3.38 14.43 0.00 85.54 0.00 0.00
115 9 3 0.00 3.16 3.38 100.00 0.00 0.00 0.00 0.00
116 9 9 99.93 3.63 3.38 0.06 0.00 0.00 0.00 0.00
117 10 5 0.01 2.82 3.38 0.08 0.00 99.91 0.00 0.00
118 10 11 0.02 3.36 3.38 0.06 0.00 99.91 0.00 0.00
122 Above the cycle soaker drives cpu9 up 3.6 Ghz turbo limit
123 while the other processors are generally in various states of idle.
125 Note that cpu3 is an HT sibling sharing core9
126 with cpu9, and thus it is unable to get to an idle state
127 deeper than c1 while cpu9 is busy.
129 Note that turbostat reports average GHz of 3.61, while
130 the arithmetic average of the GHz column above is 3.24.
131 This is a weighted average, where the weight is %c0. ie. it is the total number of
132 un-halted cycles elapsed per time divided by the number of CPUs.
139 reads hardware counters, but doesn't write them.
140 So it will not interfere with the OS or other programs, including
141 multiple invocations of itself.
144 may work poorly on Linux-2.6.20 through 2.6.29,
145 as \fBacpi-cpufreq \fPperiodically cleared the APERF and MPERF
148 The APERF, MPERF MSRs are defined to count non-halted cycles.
149 Although it is not guaranteed by the architecture, turbostat assumes
150 that they count at TSC rate, which is true on all processors tested to date.
153 "Intel® Turbo Boost Technology
154 in Intel® Core™ Microarchitecture (Nehalem) Based Processors"
155 http://download.intel.com/design/processor/applnots/320354.pdf
157 "Intel® 64 and IA-32 Architectures Software Developer's Manual
158 Volume 3B: System Programming Guide"
159 http://www.intel.com/products/processor/manuals/
172 Written by Len Brown <len.brown@intel.com>