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Merge remote-tracking branch 'cleancache/linux-next'
[linux-2.6/next.git] / drivers / gpio / nomadik-gpio.c
blobf8c1449424e72ed62179e1e3536a3130d349a8a1
1 /*
2 * Generic GPIO driver for logic cells found in the Nomadik SoC
3 *
4 * Copyright (C) 2008,2009 STMicroelectronics
5 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
6 * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
7 * Copyright (C) 2011 Linus Walleij <linus.walleij@linaro.org>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/device.h>
17 #include <linux/platform_device.h>
18 #include <linux/io.h>
19 #include <linux/clk.h>
20 #include <linux/err.h>
21 #include <linux/gpio.h>
22 #include <linux/spinlock.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/slab.h>
26 #include <linux/gpio/nomadik.h>
27
28 #include <mach/hardware.h>
29 #include <mach/gpio.h>
30
31 /*
32 * The GPIO module in the Nomadik family of Systems-on-Chip is an
33 * AMBA device, managing 32 pins and alternate functions. The logic block
34 * is currently used in the Nomadik and ux500.
35 *
36 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
37 */
38
39 #define NMK_GPIO_PER_CHIP 32
40
41 /* Register in the logic block */
42 #define NMK_GPIO_DAT 0x00
43 #define NMK_GPIO_DATS 0x04
44 #define NMK_GPIO_DATC 0x08
45 #define NMK_GPIO_PDIS 0x0c
46 #define NMK_GPIO_DIR 0x10
47 #define NMK_GPIO_DIRS 0x14
48 #define NMK_GPIO_DIRC 0x18
49 #define NMK_GPIO_SLPC 0x1c
50 #define NMK_GPIO_AFSLA 0x20
51 #define NMK_GPIO_AFSLB 0x24
52
53 #define NMK_GPIO_RIMSC 0x40
54 #define NMK_GPIO_FIMSC 0x44
55 #define NMK_GPIO_IS 0x48
56 #define NMK_GPIO_IC 0x4c
57 #define NMK_GPIO_RWIMSC 0x50
58 #define NMK_GPIO_FWIMSC 0x54
59 #define NMK_GPIO_WKS 0x58
60
61 struct nmk_gpio_chip {
62 struct gpio_chip chip;
63 void __iomem *addr;
64 struct clk *clk;
65 unsigned int bank;
66 unsigned int parent_irq;
67 int secondary_parent_irq;
68 u32 (*get_secondary_status)(unsigned int bank);
69 void (*set_ioforce)(bool enable);
70 spinlock_t lock;
71 bool sleepmode;
72 /* Keep track of configured edges */
73 u32 edge_rising;
74 u32 edge_falling;
75 u32 real_wake;
76 u32 rwimsc;
77 u32 fwimsc;
78 u32 slpm;
79 u32 pull_up;
80 };
81
82 /* FIXME: this is insane since it will create chips for the GPIO expanders! */
83 static struct nmk_gpio_chip *
84 nmk_gpio_chips[DIV_ROUND_UP(ARCH_NR_GPIOS, NMK_GPIO_PER_CHIP)];
85
86 static DEFINE_SPINLOCK(nmk_gpio_slpm_lock);
87
88 #define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips)
89
90 static inline struct nmk_gpio_chip *to_nmk_chip(struct gpio_chip *chip)
91 {
92 struct nmk_gpio_chip *nmk_chip =
93 container_of(chip, struct nmk_gpio_chip, chip);
94
95 return nmk_chip;
96 }
97
98 static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip,
99 unsigned offset, u16 altfunc)
100 {
101 u32 bit = 1 << offset;
102 u32 afunc, bfunc;
103 bool glitch = (altfunc == GPIO_CONFIG_NMK_ALTF_C);
104 u32 rwimsc = readl(nmk_chip->addr + NMK_GPIO_RWIMSC);
105 u32 fwimsc = readl(nmk_chip->addr + NMK_GPIO_FWIMSC);
106 unsigned long flags = 0;
107 int i;
108
109 /*
110 * If we're setting altfunc C by setting both AFSLA and AFSLB to 1,
111 * we may pass through an undesired state. In this case we take
112 * some extra care.
113 *
114 * Safe sequence used to switch IOs between GPIO and Alternate-C mode:
115 * - Save SLPM registers (since we have a shadow register in the
116 * nmk_chip we're using that as backup)
117 * - Set SLPM=0 for the IOs you want to switch and others to 1
118 * - Configure the GPIO registers for the IOs that are being switched
119 * - Set IOFORCE=1
120 * - Modify the AFLSA/B registers for the IOs that are being switched
121 * - Set IOFORCE=0
122 * - Restore SLPM registers
123 * - Any spurious wake up event during switch sequence to be ignored
124 * and cleared
125 *
126 * TODO: Do we REALLY need to save ALL slpm registers?? Isn't it
127 * enough to save the one for the port we're modifying, really?
128 */
129 if (glitch) {
130 u32 bit = BIT(offset);
131
132 /* Take the special sleep mode spinlock */
133 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
134 for (i = 0; i < NUM_BANKS; i++) {
135 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
136
137 if (!chip)
138 break;
139 clk_enable(chip->clk);
140 writel(0xFFFFFFFFU, chip->addr + NMK_GPIO_SLPC);
141 }
142
143 /* Set "my" sleep bit to 0 */
144 writel(0xFFFFFFFFU & ~bit, nmk_chip->addr + NMK_GPIO_SLPC);
145 /* Prevent spurious wakeups */
146 writel(rwimsc & ~bit, nmk_chip->addr + NMK_GPIO_RWIMSC);
147 writel(fwimsc & ~bit, nmk_chip->addr + NMK_GPIO_FWIMSC);
148 if (nmk_chip->set_ioforce)
149 nmk_chip->set_ioforce(true);
150 }
151
152 /* Set desired altfunc */
153 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
154 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
155 if ((altfunc == GPIO_CONFIG_NMK_ALTF_A) ||
156 (altfunc == GPIO_CONFIG_NMK_ALTF_C))
157 afunc |= bit;
158 if ((altfunc == GPIO_CONFIG_NMK_ALTF_B) ||
159 (altfunc == GPIO_CONFIG_NMK_ALTF_C))
160 bfunc |= bit;
161 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
162 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
163
164 if (glitch) {
165 if (nmk_chip->set_ioforce)
166 nmk_chip->set_ioforce(false);
167 writel(rwimsc, nmk_chip->addr + NMK_GPIO_RWIMSC);
168 writel(fwimsc, nmk_chip->addr + NMK_GPIO_FWIMSC);
169
170 for (i = 0; i < NUM_BANKS; i++) {
171 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
172
173 if (!chip)
174 break;
175 writel(chip->slpm, chip->addr + NMK_GPIO_SLPC);
176 clk_disable(chip->clk);
177 }
178 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
179 }
180 }
181
182 static int __nmk_gpio_get_mode(struct nmk_gpio_chip *nmk_chip,
183 unsigned offset, u16 *data)
184 {
185 u32 afunc, bfunc, bit;
186
187 bit = 1 << offset;
188
189 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
190 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
191
192 if (afunc && bfunc)
193 *data = GPIO_CONFIG_NMK_ALTF_C;
194 else if (afunc)
195 *data = GPIO_CONFIG_NMK_ALTF_A;
196 else if (bfunc)
197 *data = GPIO_CONFIG_NMK_ALTF_B;
198 else
199 *data = GPIO_CONFIG_NMK_ALTF_GPIO;
200 return 0;
201 }
202
203 /**
204 * __nmk_gpio_set_slpm() - configure the sleep mode of a pin
205 * @offset: pin number
206 * @enable: enable wakeup on the pin on DB8500v2, or force the pin to retain
207 * its value in sleep mode (not become an input) on DB8500v1 if true
208 *
209 * Sets the sleep mode of a pin. On DB8500v1, if @enable is
210 * true, the pin is NOT changed to an input (with pullup/down enabled) in
211 * sleep and deep sleep. If @enable is false, the pin remains in the state
212 * it was configured even when in sleep and deep sleep.
213 *
214 * On DB8500v2 onwards, this setting loses the previous meaning and instead
215 * indicates if wakeup detection is enabled on the pin. Note that
216 * enable_irq_wake() will automatically enable wakeup detection.
217 */
218 static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
219 unsigned offset, bool enable)
220 {
221 u32 bit = 1 << offset;
222
223 /*
224 * NOTE: the meaning of "enable" is inverted, nominally every GPIO
225 * will wake up the system (or convert the pin to an input on DB8500v1)
226 */
227 if (enable)
228 nmk_chip->slpm &= ~bit;
229 else
230 /*
231 * So setting this bit disables wakeups (or makes the pin
232 * retain its value on DB8500v1)
233 */
234 nmk_chip->slpm |= bit;
235
236 writel(nmk_chip->slpm, nmk_chip->addr + NMK_GPIO_SLPC);
237 }
238
239 static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
240 unsigned offset, u16 pullmode)
241 {
242 u32 bit = 1 << offset;
243 u32 pdis;
244
245 /* FIXME: use shadow registers instead of read-modify-write */
246 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
247 if ((pullmode == GPIO_CONFIG_BIAS_UNKNOWN) ||
248 (pullmode == GPIO_CONFIG_BIAS_FLOAT)) {
249 pdis |= bit;
250 nmk_chip->pull_up &= ~bit;
251 } else {
252 pdis &= ~bit;
253 }
254
255 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
256
257 if (pullmode == GPIO_CONFIG_BIAS_PULL_UP) {
258 nmk_chip->pull_up |= bit;
259 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
260 } else if (pullmode == GPIO_CONFIG_BIAS_PULL_DOWN) {
261 nmk_chip->pull_up &= ~bit;
262 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
263 }
264 }
265
266 static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
267 unsigned offset)
268 {
269 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
270 }
271
272 static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip,
273 unsigned offset, int val)
274 {
275 if (val)
276 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATS);
277 else
278 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATC);
279 }
280
281 static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip,
282 unsigned offset, int val)
283 {
284 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
285 __nmk_gpio_set_output(nmk_chip, offset, val);
286 }
287
288
289 static void __nmk_setup_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
290 struct nmk_gpio_pin_config *cfg)
291 {
292 static const char *afnames[] = {
293 [GPIO_CONFIG_NMK_ALTF_GPIO] = "GPIO",
294 [GPIO_CONFIG_NMK_ALTF_A] = "A",
295 [GPIO_CONFIG_NMK_ALTF_B] = "B",
296 [GPIO_CONFIG_NMK_ALTF_C] = "C"
297 };
298 static const char *biasnames[] = {
299 [GPIO_CONFIG_BIAS_UNKNOWN] = "none",
300 [GPIO_CONFIG_BIAS_FLOAT] = "none",
301 [GPIO_CONFIG_BIAS_PULL_UP] = "up",
302 [GPIO_CONFIG_BIAS_PULL_DOWN] = "down",
303 };
304
305 dev_dbg(nmk_chip->chip.dev, "pin %d: af: %s, bias: %s, "
306 "slpm: %s (%s%s)\n",
307 cfg->pin, afnames[cfg->altfunc],
308 biasnames[cfg->bias_mode],
309 cfg->sleep_mode ? "input/wakeup" : "no-change/no-wakeup",
310 cfg->output ? "output " : "input",
311 cfg->output ? (cfg->outval ? "high" : "low") : "");
312
313 if (cfg->output)
314 __nmk_gpio_make_output(nmk_chip, offset, cfg->outval);
315 else {
316 __nmk_gpio_make_input(nmk_chip, offset);
317 __nmk_gpio_set_pull(nmk_chip, offset, cfg->bias_mode);
318 }
319 __nmk_gpio_set_slpm(nmk_chip, offset, cfg->sleep_mode);
320 __nmk_gpio_set_mode(nmk_chip, offset, cfg->altfunc);
321 }
322
323 /**
324 * This translates the old pin config parameter type into a config
325 * struct and passes to the new API
326 */
327 static void __nmk_setup_pin_legacy(struct nmk_gpio_chip *nmk_chip,
328 unsigned offset,
329 pin_cfg_t pincfg)
330 {
331 struct nmk_gpio_pin_config cfg;
332
333 cfg.pin = PIN_NUM(pincfg);
334
335 switch (PIN_ALT(pincfg)) {
336 case NMK_GPIO_ALT_GPIO:
337 cfg.altfunc = GPIO_CONFIG_NMK_ALTF_GPIO;
338 break;
339 case NMK_GPIO_ALT_A:
340 cfg.altfunc = GPIO_CONFIG_NMK_ALTF_A;
341 break;
342 case NMK_GPIO_ALT_B:
343 cfg.altfunc = GPIO_CONFIG_NMK_ALTF_B;
344 break;
345 case NMK_GPIO_ALT_C:
346 cfg.altfunc = GPIO_CONFIG_NMK_ALTF_C;
347 break;
348 default:
349 cfg.altfunc = GPIO_CONFIG_NMK_ALTF_GPIO;
350 break;
351 }
352
353 if (PIN_DIR(pincfg))
354 cfg.output = true;
355
356 if (PIN_VAL(pincfg))
357 cfg.outval = 1;
358
359 switch (PIN_PULL(pincfg)) {
360 case NMK_GPIO_PULL_NONE:
361 cfg.bias_mode = GPIO_CONFIG_BIAS_FLOAT;
362 break;
363 case NMK_GPIO_PULL_UP:
364 cfg.bias_mode = GPIO_CONFIG_BIAS_PULL_UP;
365 break;
366 case NMK_GPIO_PULL_DOWN:
367 cfg.bias_mode = GPIO_CONFIG_BIAS_PULL_DOWN;
368 break;
369 default:
370 cfg.bias_mode = GPIO_CONFIG_BIAS_FLOAT;
371 break;
372 }
373
374 switch (PIN_SLPM(pincfg)) {
375 case NMK_GPIO_SLPM_WAKEUP_ENABLE:
376 /* Also NMK_GPIO_SLPM_INPUT */
377 break;
378 case NMK_GPIO_SLPM_WAKEUP_DISABLE:
379 /* Also NMK_GPIO_SLPM_NOCHANGE */
380 cfg.sleep_mode = true;
381 default:
382 break;
383 }
384
385 __nmk_setup_pin(nmk_chip, offset, &cfg);
386 }
387
388 static int nmk_gpio_config(struct gpio_chip *chip, unsigned offset,
389 u16 param, unsigned long *data)
390 {
391 struct nmk_gpio_chip *nmk_chip = to_nmk_chip(chip);
392 unsigned long flags;
393
394 if (!nmk_chip)
395 return -EINVAL;
396
397 clk_enable(nmk_chip->clk);
398
399 switch (param) {
400 case GPIO_CONFIG_BIAS_UNKNOWN:
401 case GPIO_CONFIG_BIAS_FLOAT:
402 case GPIO_CONFIG_BIAS_PULL_UP:
403 case GPIO_CONFIG_BIAS_PULL_DOWN:
404 __nmk_gpio_set_pull(nmk_chip, offset, param);
405 break;
406 case GPIO_CONFIG_NMK_ALTF_GPIO:
407 case GPIO_CONFIG_NMK_ALTF_A:
408 case GPIO_CONFIG_NMK_ALTF_B:
409 case GPIO_CONFIG_NMK_ALTF_C:
410 __nmk_gpio_set_mode(nmk_chip, offset, param);
411 break;
412 case GPIO_CONFIG_NMK_GET_ALTF:
413 __nmk_gpio_get_mode(nmk_chip, offset, (u16 *) data);
414 break;
415 case GPIO_CONFIG_NMK_SLPM_INPUT:
416 case GPIO_CONFIG_NMK_WAKEUP_ENABLE:
417 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
418 spin_lock(&nmk_chip->lock);
419 __nmk_gpio_set_slpm(nmk_chip, offset, true);
420 spin_unlock(&nmk_chip->lock);
421 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
422 break;
423 case GPIO_CONFIG_NMK_SLPM_NOCHANGE:
424 case GPIO_CONFIG_NMK_WAKEUP_DISABLE:
425 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
426 spin_lock(&nmk_chip->lock);
427 __nmk_gpio_set_slpm(nmk_chip, offset, false);
428 spin_unlock(&nmk_chip->lock);
429 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
430 break;
431 case GPIO_CONFIG_NMK_SETUP_PIN:
432 __nmk_setup_pin(nmk_chip, offset,
433 (struct nmk_gpio_pin_config *) data);
434 break;
435 case GPIO_CONFIG_NMK_SETUP_PIN_LEGACY:
436 __nmk_setup_pin_legacy(nmk_chip, offset, (pin_cfg_t) *data);
437 break;
438 default:
439 dev_err(nmk_chip->chip.dev,
440 "illegal configuration requested\n");
441 clk_disable(nmk_chip->clk);
442 return -EINVAL;
443 };
444
445 clk_disable(nmk_chip->clk);
446
447 return 0;
448 }
449
450
451
452 /* IRQ functions */
453 static inline int nmk_gpio_get_bitmask(int gpio)
454 {
455 return 1 << (gpio % 32);
456 }
457
458 static void nmk_gpio_irq_ack(struct irq_data *d)
459 {
460 int gpio;
461 struct nmk_gpio_chip *nmk_chip;
462
463 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
464 nmk_chip = irq_data_get_irq_chip_data(d);
465 if (!nmk_chip)
466 return;
467
468 clk_enable(nmk_chip->clk);
469 writel(nmk_gpio_get_bitmask(gpio), nmk_chip->addr + NMK_GPIO_IC);
470 clk_disable(nmk_chip->clk);
471 }
472
473 enum nmk_gpio_irq_type {
474 NORMAL,
475 WAKE,
476 };
477
478 static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
479 int gpio, enum nmk_gpio_irq_type which,
480 bool enable)
481 {
482 u32 rimsc = which == WAKE ? NMK_GPIO_RWIMSC : NMK_GPIO_RIMSC;
483 u32 fimsc = which == WAKE ? NMK_GPIO_FWIMSC : NMK_GPIO_FIMSC;
484 u32 bitmask = nmk_gpio_get_bitmask(gpio);
485 u32 reg;
486
487 /* we must individually set/clear the two edges */
488 if (nmk_chip->edge_rising & bitmask) {
489 reg = readl(nmk_chip->addr + rimsc);
490 if (enable)
491 reg |= bitmask;
492 else
493 reg &= ~bitmask;
494 writel(reg, nmk_chip->addr + rimsc);
495 }
496 if (nmk_chip->edge_falling & bitmask) {
497 reg = readl(nmk_chip->addr + fimsc);
498 if (enable)
499 reg |= bitmask;
500 else
501 reg &= ~bitmask;
502 writel(reg, nmk_chip->addr + fimsc);
503 }
504 }
505
506 static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
507 int gpio, bool on)
508 {
509 if (nmk_chip->sleepmode)
510 __nmk_gpio_set_slpm(nmk_chip, gpio - nmk_chip->chip.base, on);
511
512 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
513 }
514
515 static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
516 {
517 int gpio;
518 struct nmk_gpio_chip *nmk_chip;
519 unsigned long flags;
520 u32 bitmask;
521
522 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
523 nmk_chip = irq_data_get_irq_chip_data(d);
524 bitmask = nmk_gpio_get_bitmask(gpio);
525 if (!nmk_chip)
526 return -EINVAL;
527
528 clk_enable(nmk_chip->clk);
529 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
530 spin_lock(&nmk_chip->lock);
531
532 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, enable);
533
534 if (!(nmk_chip->real_wake & bitmask))
535 __nmk_gpio_set_wake(nmk_chip, gpio, enable);
536
537 spin_unlock(&nmk_chip->lock);
538 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
539 clk_disable(nmk_chip->clk);
540
541 return 0;
542 }
543
544 static void nmk_gpio_irq_mask(struct irq_data *d)
545 {
546 nmk_gpio_irq_maskunmask(d, false);
547 }
548
549 static void nmk_gpio_irq_unmask(struct irq_data *d)
550 {
551 nmk_gpio_irq_maskunmask(d, true);
552 }
553
554 static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
555 {
556 struct nmk_gpio_chip *nmk_chip;
557 unsigned long flags;
558 u32 bitmask;
559 int gpio;
560
561 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
562 nmk_chip = irq_data_get_irq_chip_data(d);
563 if (!nmk_chip)
564 return -EINVAL;
565 bitmask = nmk_gpio_get_bitmask(gpio);
566
567 clk_enable(nmk_chip->clk);
568 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
569 spin_lock(&nmk_chip->lock);
570
571 /* Make sure we wake up on this pin */
572 if (irqd_irq_disabled(d))
573 __nmk_gpio_set_wake(nmk_chip, gpio, on);
574
575 if (on)
576 nmk_chip->real_wake |= bitmask;
577 else
578 nmk_chip->real_wake &= ~bitmask;
579
580 spin_unlock(&nmk_chip->lock);
581 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
582 clk_disable(nmk_chip->clk);
583
584 return 0;
585 }
586
587 static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
588 {
589 bool enabled = !irqd_irq_disabled(d);
590 bool wake = irqd_is_wakeup_set(d);
591 int gpio;
592 struct nmk_gpio_chip *nmk_chip;
593 unsigned long flags;
594 u32 bitmask;
595
596 gpio = NOMADIK_IRQ_TO_GPIO(d->irq);
597 nmk_chip = irq_data_get_irq_chip_data(d);
598 bitmask = nmk_gpio_get_bitmask(gpio);
599 if (!nmk_chip)
600 return -EINVAL;
601
602 if (type & IRQ_TYPE_LEVEL_HIGH)
603 return -EINVAL;
604 if (type & IRQ_TYPE_LEVEL_LOW)
605 return -EINVAL;
606
607 clk_enable(nmk_chip->clk);
608 spin_lock_irqsave(&nmk_chip->lock, flags);
609
610 if (enabled)
611 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, false);
612
613 if (enabled || wake)
614 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, false);
615
616 nmk_chip->edge_rising &= ~bitmask;
617 if (type & IRQ_TYPE_EDGE_RISING)
618 nmk_chip->edge_rising |= bitmask;
619
620 nmk_chip->edge_falling &= ~bitmask;
621 if (type & IRQ_TYPE_EDGE_FALLING)
622 nmk_chip->edge_falling |= bitmask;
623
624 if (enabled)
625 __nmk_gpio_irq_modify(nmk_chip, gpio, NORMAL, true);
626
627 if (enabled || wake)
628 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, true);
629
630 spin_unlock_irqrestore(&nmk_chip->lock, flags);
631 clk_disable(nmk_chip->clk);
632
633 return 0;
634 }
635
636 static unsigned int nmk_gpio_irq_startup(struct irq_data *d)
637 {
638 struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
639
640 clk_enable(nmk_chip->clk);
641 nmk_gpio_irq_unmask(d);
642 return 0;
643 }
644
645 static void nmk_gpio_irq_shutdown(struct irq_data *d)
646 {
647 struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
648
649 nmk_gpio_irq_mask(d);
650 clk_disable(nmk_chip->clk);
651 }
652
653 static struct irq_chip nmk_gpio_irq_chip = {
654 .name = "Nomadik-GPIO",
655 .irq_ack = nmk_gpio_irq_ack,
656 .irq_mask = nmk_gpio_irq_mask,
657 .irq_unmask = nmk_gpio_irq_unmask,
658 .irq_set_type = nmk_gpio_irq_set_type,
659 .irq_set_wake = nmk_gpio_irq_set_wake,
660 .irq_startup = nmk_gpio_irq_startup,
661 .irq_shutdown = nmk_gpio_irq_shutdown,
662 };
663
664 static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
665 u32 status)
666 {
667 struct nmk_gpio_chip *nmk_chip;
668 struct irq_chip *host_chip = irq_get_chip(irq);
669 unsigned int first_irq;
670
671 if (host_chip->irq_mask_ack)
672 host_chip->irq_mask_ack(&desc->irq_data);
673 else {
674 host_chip->irq_mask(&desc->irq_data);
675 if (host_chip->irq_ack)
676 host_chip->irq_ack(&desc->irq_data);
677 }
678
679 nmk_chip = irq_get_handler_data(irq);
680 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
681 while (status) {
682 int bit = __ffs(status);
683
684 generic_handle_irq(first_irq + bit);
685 status &= ~BIT(bit);
686 }
687
688 host_chip->irq_unmask(&desc->irq_data);
689 }
690
691 static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
692 {
693 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
694 u32 status;
695
696 clk_enable(nmk_chip->clk);
697 status = readl(nmk_chip->addr + NMK_GPIO_IS);
698 clk_disable(nmk_chip->clk);
699
700 __nmk_gpio_irq_handler(irq, desc, status);
701 }
702
703 static void nmk_gpio_secondary_irq_handler(unsigned int irq,
704 struct irq_desc *desc)
705 {
706 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
707 u32 status = nmk_chip->get_secondary_status(nmk_chip->bank);
708
709 __nmk_gpio_irq_handler(irq, desc, status);
710 }
711
712 static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
713 {
714 unsigned int first_irq;
715 int i;
716
717 first_irq = NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base);
718 for (i = first_irq; i < first_irq + nmk_chip->chip.ngpio; i++) {
719 irq_set_chip_and_handler(i, &nmk_gpio_irq_chip,
720 handle_edge_irq);
721 set_irq_flags(i, IRQF_VALID);
722 irq_set_chip_data(i, nmk_chip);
723 irq_set_irq_type(i, IRQ_TYPE_EDGE_FALLING);
724 }
725
726 irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
727 irq_set_handler_data(nmk_chip->parent_irq, nmk_chip);
728
729 if (nmk_chip->secondary_parent_irq >= 0) {
730 irq_set_chained_handler(nmk_chip->secondary_parent_irq,
731 nmk_gpio_secondary_irq_handler);
732 irq_set_handler_data(nmk_chip->secondary_parent_irq, nmk_chip);
733 }
734
735 return 0;
736 }
737
738 /* I/O Functions */
739 static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
740 {
741 struct nmk_gpio_chip *nmk_chip = to_nmk_chip(chip);
742
743 clk_enable(nmk_chip->clk);
744
745 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
746
747 clk_disable(nmk_chip->clk);
748
749 return 0;
750 }
751
752 static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
753 {
754 struct nmk_gpio_chip *nmk_chip = to_nmk_chip(chip);
755 u32 bit = 1 << offset;
756 int value;
757
758 clk_enable(nmk_chip->clk);
759
760 value = (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
761
762 clk_disable(nmk_chip->clk);
763
764 return value;
765 }
766
767 static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
768 int val)
769 {
770 struct nmk_gpio_chip *nmk_chip = to_nmk_chip(chip);
771
772 clk_enable(nmk_chip->clk);
773
774 __nmk_gpio_set_output(nmk_chip, offset, val);
775
776 clk_disable(nmk_chip->clk);
777 }
778
779 static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
780 int val)
781 {
782 struct nmk_gpio_chip *nmk_chip = to_nmk_chip(chip);
783
784 clk_enable(nmk_chip->clk);
785
786 __nmk_gpio_make_output(nmk_chip, offset, val);
787
788 clk_disable(nmk_chip->clk);
789
790 return 0;
791 }
792
793 static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
794 {
795 struct nmk_gpio_chip *nmk_chip = to_nmk_chip(chip);
796
797 return NOMADIK_GPIO_TO_IRQ(nmk_chip->chip.base) + offset;
798 }
799
800 #ifdef CONFIG_DEBUG_FS
801
802 #include <linux/seq_file.h>
803
804 static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
805 {
806 u16 mode;
807 unsigned i;
808 unsigned gpio = chip->base;
809 int is_out;
810 struct nmk_gpio_chip *nmk_chip = to_nmk_chip(chip);
811
812 clk_enable(nmk_chip->clk);
813
814 for (i = 0; i < chip->ngpio; i++, gpio++) {
815 const char *label = gpiochip_is_requested(chip, i);
816 const char *modetxt;
817 bool pull;
818 u32 bit = 1 << i;
819
820 is_out = readl(nmk_chip->addr + NMK_GPIO_DIR) & bit;
821 pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & bit);
822 __nmk_gpio_get_mode(nmk_chip, gpio, &mode);
823 switch (mode) {
824 case GPIO_CONFIG_NMK_ALTF_GPIO:
825 modetxt = "gpio";
826 break;
827 case GPIO_CONFIG_NMK_ALTF_A:
828 modetxt = "altA";
829 break;
830 case GPIO_CONFIG_NMK_ALTF_B:
831 modetxt = "altB";
832 break;
833 case GPIO_CONFIG_NMK_ALTF_C:
834 modetxt = "altC";
835 break;
836 default:
837 modetxt = "unknown";
838 break;
839 }
840 seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s",
841 gpio, label ?: "(none)",
842 is_out ? "out" : "in ",
843 chip->get
844 ? (chip->get(chip, i) ? "hi" : "lo")
845 : "? ",
846 (mode < 0) ? "unknown" : modetxt,
847 pull ? "pull" : "none");
848
849 if (label && !is_out) {
850 int irq = gpio_to_irq(gpio);
851 struct irq_desc *desc = irq_to_desc(irq);
852
853 /* This races with request_irq(), set_irq_type(),
854 * and set_irq_wake() ... but those are "rare".
855 */
856 if (irq >= 0 && desc->action) {
857 char *trigger;
858 u32 bitmask = nmk_gpio_get_bitmask(gpio);
859
860 if (nmk_chip->edge_rising & bitmask)
861 trigger = "edge-rising";
862 else if (nmk_chip->edge_falling & bitmask)
863 trigger = "edge-falling";
864 else
865 trigger = "edge-undefined";
866
867 seq_printf(s, " irq-%d %s%s",
868 irq, trigger,
869 irqd_is_wakeup_set(&desc->irq_data)
870 ? " wakeup" : "");
871 }
872 }
873
874 seq_printf(s, "\n");
875 }
876
877 clk_disable(nmk_chip->clk);
878 }
879
880 #else
881 #define nmk_gpio_dbg_show NULL
882 #endif
883
884 /* This structure is replicated for each GPIO block allocated at probe time */
885 static struct gpio_chip nmk_gpio_chip = {
886 .direction_input = nmk_gpio_make_input,
887 .get = nmk_gpio_get_input,
888 .direction_output = nmk_gpio_make_output,
889 .set = nmk_gpio_set_output,
890 .config = nmk_gpio_config,
891 .to_irq = nmk_gpio_to_irq,
892 .dbg_show = nmk_gpio_dbg_show,
893 .can_sleep = 0,
894 };
895
896 /**
897 * nmk_gpio_clocks_enable() - enable the clocks on all GPIO blocks
898 */
899 void nmk_gpio_clocks_enable(void)
900 {
901 int i;
902
903 for (i = 0; i < NUM_BANKS; i++) {
904 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
905
906 if (!chip)
907 continue;
908
909 clk_enable(chip->clk);
910 }
911 }
912
913 /**
914 * nmk_gpio_clocks_disable() - disable the clocks on all GPIO blocks
915 */
916 void nmk_gpio_clocks_disable(void)
917 {
918 int i;
919
920 for (i = 0; i < NUM_BANKS; i++) {
921 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
922
923 if (!chip)
924 continue;
925
926 clk_disable(chip->clk);
927 }
928 }
929
930 /*
931 * Called from the suspend/resume path to only keep the real wakeup interrupts
932 * (those that have had set_irq_wake() called on them) as wakeup interrupts,
933 * and not the rest of the interrupts which we needed to have as wakeups for
934 * cpuidle.
935 *
936 * PM ops are not used since this needs to be done at the end, after all the
937 * other drivers are done with their suspend callbacks.
938 */
939 void nmk_gpio_wakeups_suspend(void)
940 {
941 int i;
942
943 for (i = 0; i < NUM_BANKS; i++) {
944 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
945
946 if (!chip)
947 break;
948
949 clk_enable(chip->clk);
950
951 chip->rwimsc = readl(chip->addr + NMK_GPIO_RWIMSC);
952 chip->fwimsc = readl(chip->addr + NMK_GPIO_FWIMSC);
953
954 writel(chip->rwimsc & chip->real_wake,
955 chip->addr + NMK_GPIO_RWIMSC);
956 writel(chip->fwimsc & chip->real_wake,
957 chip->addr + NMK_GPIO_FWIMSC);
958
959 if (chip->sleepmode) {
960 chip->slpm = readl(chip->addr + NMK_GPIO_SLPC);
961
962 /* 0 -> wakeup enable */
963 writel(~chip->real_wake, chip->addr + NMK_GPIO_SLPC);
964 }
965
966 clk_disable(chip->clk);
967 }
968 }
969
970 void nmk_gpio_wakeups_resume(void)
971 {
972 int i;
973
974 for (i = 0; i < NUM_BANKS; i++) {
975 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
976
977 if (!chip)
978 break;
979
980 clk_enable(chip->clk);
981
982 writel(chip->rwimsc, chip->addr + NMK_GPIO_RWIMSC);
983 writel(chip->fwimsc, chip->addr + NMK_GPIO_FWIMSC);
984
985 if (chip->sleepmode)
986 writel(chip->slpm, chip->addr + NMK_GPIO_SLPC);
987
988 clk_disable(chip->clk);
989 }
990 }
991
992 /*
993 * Read the pull up/pull down status.
994 * A bit set in 'pull_up' means that pull up
995 * is selected if pull is enabled in PDIS register.
996 * Note: only pull up/down set via this driver can
997 * be detected due to HW limitations.
998 */
999 void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up)
1000 {
1001 if (gpio_bank < NUM_BANKS) {
1002 struct nmk_gpio_chip *chip = nmk_gpio_chips[gpio_bank];
1003
1004 if (!chip)
1005 return;
1006
1007 *pull_up = chip->pull_up;
1008 }
1009 }
1010
1011 static int __devinit nmk_gpio_probe(struct platform_device *dev)
1012 {
1013 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
1014 struct nmk_gpio_chip *nmk_chip;
1015 struct gpio_chip *chip;
1016 struct resource *res;
1017 struct clk *clk;
1018 int secondary_irq;
1019 int irq;
1020 int ret;
1021
1022 if (!pdata)
1023 return -ENODEV;
1024
1025 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1026 if (!res) {
1027 ret = -ENOENT;
1028 goto out;
1029 }
1030
1031 irq = platform_get_irq(dev, 0);
1032 if (irq < 0) {
1033 ret = irq;
1034 goto out;
1035 }
1036
1037 secondary_irq = platform_get_irq(dev, 1);
1038 if (secondary_irq >= 0 && !pdata->get_secondary_status) {
1039 ret = -EINVAL;
1040 goto out;
1041 }
1042
1043 if (request_mem_region(res->start, resource_size(res),
1044 dev_name(&dev->dev)) == NULL) {
1045 ret = -EBUSY;
1046 goto out;
1047 }
1048
1049 clk = clk_get(&dev->dev, NULL);
1050 if (IS_ERR(clk)) {
1051 ret = PTR_ERR(clk);
1052 goto out_release;
1053 }
1054
1055 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
1056 if (!nmk_chip) {
1057 ret = -ENOMEM;
1058 goto out_clk;
1059 }
1060 /*
1061 * The virt address in nmk_chip->addr is in the nomadik register space,
1062 * so we can simply convert the resource address, without remapping
1063 */
1064 nmk_chip->bank = dev->id;
1065 nmk_chip->clk = clk;
1066 nmk_chip->addr = io_p2v(res->start);
1067 nmk_chip->chip = nmk_gpio_chip;
1068 nmk_chip->parent_irq = irq;
1069 nmk_chip->secondary_parent_irq = secondary_irq;
1070 nmk_chip->get_secondary_status = pdata->get_secondary_status;
1071 nmk_chip->set_ioforce = pdata->set_ioforce;
1072 nmk_chip->sleepmode = pdata->supports_sleepmode;
1073 spin_lock_init(&nmk_chip->lock);
1074
1075 chip = &nmk_chip->chip;
1076 chip->base = pdata->first_gpio;
1077 chip->ngpio = pdata->num_gpio;
1078 chip->label = pdata->name ?: dev_name(&dev->dev);
1079 chip->dev = &dev->dev;
1080 chip->owner = THIS_MODULE;
1081
1082 ret = gpiochip_add(&nmk_chip->chip);
1083 if (ret)
1084 goto out_free;
1085
1086 BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips));
1087
1088 nmk_gpio_chips[nmk_chip->bank] = nmk_chip;
1089 platform_set_drvdata(dev, nmk_chip);
1090
1091 nmk_gpio_init_irq(nmk_chip);
1092
1093 dev_info(&dev->dev, "Bits %i-%i at address %p\n",
1094 nmk_chip->chip.base, nmk_chip->chip.base+31, nmk_chip->addr);
1095 return 0;
1096
1097 out_free:
1098 kfree(nmk_chip);
1099 out_clk:
1100 clk_disable(clk);
1101 clk_put(clk);
1102 out_release:
1103 release_mem_region(res->start, resource_size(res));
1104 out:
1105 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
1106 pdata->first_gpio, pdata->first_gpio+31);
1107 return ret;
1108 }
1109
1110 static struct platform_driver nmk_gpio_driver = {
1111 .driver = {
1112 .owner = THIS_MODULE,
1113 .name = "gpio",
1114 },
1115 .probe = nmk_gpio_probe,
1116 };
1117
1118 static int __init nmk_gpio_init(void)
1119 {
1120 return platform_driver_register(&nmk_gpio_driver);
1121 }
1122
1123 core_initcall(nmk_gpio_init);
1124
1125 MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
1126 MODULE_DESCRIPTION("Nomadik GPIO Driver");
1127 MODULE_LICENSE("GPL");
1128
1129
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