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Merge remote-tracking branch 'cleancache/linux-next'
[linux-2.6/next.git] / drivers / mmc / host / sdhci-pci.c
blob936bbca19c0a47b13066b935221f2b583c574a3c
1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
2 *
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
9 *
10 * Thanks to the following companies for their support:
11 *
12 * - JMicron (hardware and technical support)
13 */
14
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/pci.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/slab.h>
20 #include <linux/device.h>
21 #include <linux/mmc/host.h>
22 #include <linux/scatterlist.h>
23 #include <linux/io.h>
24
25 #include "sdhci.h"
26
27 /*
28 * PCI registers
29 */
30
31 #define PCI_SDHCI_IFPIO 0x00
32 #define PCI_SDHCI_IFDMA 0x01
33 #define PCI_SDHCI_IFVENDOR 0x02
34
35 #define PCI_SLOT_INFO 0x40 /* 8 bits */
36 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
37 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
38
39 #define MAX_SLOTS 8
40
41 struct sdhci_pci_chip;
42 struct sdhci_pci_slot;
43
44 struct sdhci_pci_fixes {
45 unsigned int quirks;
46
47 int (*probe) (struct sdhci_pci_chip *);
48
49 int (*probe_slot) (struct sdhci_pci_slot *);
50 void (*remove_slot) (struct sdhci_pci_slot *, int);
51
52 int (*suspend) (struct sdhci_pci_chip *,
53 pm_message_t);
54 int (*resume) (struct sdhci_pci_chip *);
55 };
56
57 struct sdhci_pci_slot {
58 struct sdhci_pci_chip *chip;
59 struct sdhci_host *host;
60
61 int pci_bar;
62 };
63
64 struct sdhci_pci_chip {
65 struct pci_dev *pdev;
66
67 unsigned int quirks;
68 const struct sdhci_pci_fixes *fixes;
69
70 int num_slots; /* Slots on controller */
71 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
72 };
73
74
75 /*****************************************************************************\
76 * *
77 * Hardware specific quirk handling *
78 * *
79 \*****************************************************************************/
80
81 static int ricoh_probe(struct sdhci_pci_chip *chip)
82 {
83 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
84 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
85 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
86 return 0;
87 }
88
89 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
90 {
91 slot->host->caps =
92 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
93 & SDHCI_TIMEOUT_CLK_MASK) |
94
95 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
96 & SDHCI_CLOCK_BASE_MASK) |
97
98 SDHCI_TIMEOUT_CLK_UNIT |
99 SDHCI_CAN_VDD_330 |
100 SDHCI_CAN_DO_SDMA;
101 return 0;
102 }
103
104 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
105 {
106 /* Apply a delay to allow controller to settle */
107 /* Otherwise it becomes confused if card state changed
108 during suspend */
109 msleep(500);
110 return 0;
111 }
112
113 static const struct sdhci_pci_fixes sdhci_ricoh = {
114 .probe = ricoh_probe,
115 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
116 SDHCI_QUIRK_FORCE_DMA |
117 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
118 };
119
120 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
121 .probe_slot = ricoh_mmc_probe_slot,
122 .resume = ricoh_mmc_resume,
123 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
124 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
125 SDHCI_QUIRK_NO_CARD_NO_RESET |
126 SDHCI_QUIRK_MISSING_CAPS
127 };
128
129 static const struct sdhci_pci_fixes sdhci_ene_712 = {
130 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
131 SDHCI_QUIRK_BROKEN_DMA,
132 };
133
134 static const struct sdhci_pci_fixes sdhci_ene_714 = {
135 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
136 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
137 SDHCI_QUIRK_BROKEN_DMA,
138 };
139
140 static const struct sdhci_pci_fixes sdhci_cafe = {
141 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
142 SDHCI_QUIRK_NO_BUSY_IRQ |
143 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
144 };
145
146 /*
147 * ADMA operation is disabled for Moorestown platform due to
148 * hardware bugs.
149 */
150 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
151 {
152 /*
153 * slots number is fixed here for MRST as SDIO3/5 are never used and
154 * have hardware bugs.
155 */
156 chip->num_slots = 1;
157 return 0;
158 }
159
160 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
161 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
162 };
163
164 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
165 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
166 .probe = mrst_hc_probe,
167 };
168
169 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
170 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
171 };
172
173 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc_sdio = {
174 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
175 };
176
177 /* O2Micro extra registers */
178 #define O2_SD_LOCK_WP 0xD3
179 #define O2_SD_MULTI_VCC3V 0xEE
180 #define O2_SD_CLKREQ 0xEC
181 #define O2_SD_CAPS 0xE0
182 #define O2_SD_ADMA1 0xE2
183 #define O2_SD_ADMA2 0xE7
184 #define O2_SD_INF_MOD 0xF1
185
186 static int o2_probe(struct sdhci_pci_chip *chip)
187 {
188 int ret;
189 u8 scratch;
190
191 switch (chip->pdev->device) {
192 case PCI_DEVICE_ID_O2_8220:
193 case PCI_DEVICE_ID_O2_8221:
194 case PCI_DEVICE_ID_O2_8320:
195 case PCI_DEVICE_ID_O2_8321:
196 /* This extra setup is required due to broken ADMA. */
197 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
198 if (ret)
199 return ret;
200 scratch &= 0x7f;
201 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
202
203 /* Set Multi 3 to VCC3V# */
204 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
205
206 /* Disable CLK_REQ# support after media DET */
207 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
208 if (ret)
209 return ret;
210 scratch |= 0x20;
211 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
212
213 /* Choose capabilities, enable SDMA. We have to write 0x01
214 * to the capabilities register first to unlock it.
215 */
216 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
217 if (ret)
218 return ret;
219 scratch |= 0x01;
220 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
221 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
222
223 /* Disable ADMA1/2 */
224 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
225 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
226
227 /* Disable the infinite transfer mode */
228 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
229 if (ret)
230 return ret;
231 scratch |= 0x08;
232 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
233
234 /* Lock WP */
235 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
236 if (ret)
237 return ret;
238 scratch |= 0x80;
239 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
240 }
241
242 return 0;
243 }
244
245 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
246 {
247 u8 scratch;
248 int ret;
249
250 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
251 if (ret)
252 return ret;
253
254 /*
255 * Turn PMOS on [bit 0], set over current detection to 2.4 V
256 * [bit 1:2] and enable over current debouncing [bit 6].
257 */
258 if (on)
259 scratch |= 0x47;
260 else
261 scratch &= ~0x47;
262
263 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
264 if (ret)
265 return ret;
266
267 return 0;
268 }
269
270 static int jmicron_probe(struct sdhci_pci_chip *chip)
271 {
272 int ret;
273 u16 mmcdev = 0;
274
275 if (chip->pdev->revision == 0) {
276 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
277 SDHCI_QUIRK_32BIT_DMA_SIZE |
278 SDHCI_QUIRK_32BIT_ADMA_SIZE |
279 SDHCI_QUIRK_RESET_AFTER_REQUEST |
280 SDHCI_QUIRK_BROKEN_SMALL_PIO;
281 }
282
283 /*
284 * JMicron chips can have two interfaces to the same hardware
285 * in order to work around limitations in Microsoft's driver.
286 * We need to make sure we only bind to one of them.
287 *
288 * This code assumes two things:
289 *
290 * 1. The PCI code adds subfunctions in order.
291 *
292 * 2. The MMC interface has a lower subfunction number
293 * than the SD interface.
294 */
295 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
296 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
297 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
298 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
299
300 if (mmcdev) {
301 struct pci_dev *sd_dev;
302
303 sd_dev = NULL;
304 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
305 mmcdev, sd_dev)) != NULL) {
306 if ((PCI_SLOT(chip->pdev->devfn) ==
307 PCI_SLOT(sd_dev->devfn)) &&
308 (chip->pdev->bus == sd_dev->bus))
309 break;
310 }
311
312 if (sd_dev) {
313 pci_dev_put(sd_dev);
314 dev_info(&chip->pdev->dev, "Refusing to bind to "
315 "secondary interface.\n");
316 return -ENODEV;
317 }
318 }
319
320 /*
321 * JMicron chips need a bit of a nudge to enable the power
322 * output pins.
323 */
324 ret = jmicron_pmos(chip, 1);
325 if (ret) {
326 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
327 return ret;
328 }
329
330 /* quirk for unsable RO-detection on JM388 chips */
331 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
332 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
333 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
334
335 return 0;
336 }
337
338 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
339 {
340 u8 scratch;
341
342 scratch = readb(host->ioaddr + 0xC0);
343
344 if (on)
345 scratch |= 0x01;
346 else
347 scratch &= ~0x01;
348
349 writeb(scratch, host->ioaddr + 0xC0);
350 }
351
352 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
353 {
354 if (slot->chip->pdev->revision == 0) {
355 u16 version;
356
357 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
358 version = (version & SDHCI_VENDOR_VER_MASK) >>
359 SDHCI_VENDOR_VER_SHIFT;
360
361 /*
362 * Older versions of the chip have lots of nasty glitches
363 * in the ADMA engine. It's best just to avoid it
364 * completely.
365 */
366 if (version < 0xAC)
367 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
368 }
369
370 /* JM388 MMC doesn't support 1.8V while SD supports it */
371 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
372 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
373 MMC_VDD_29_30 | MMC_VDD_30_31 |
374 MMC_VDD_165_195; /* allow 1.8V */
375 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
376 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
377 }
378
379 /*
380 * The secondary interface requires a bit set to get the
381 * interrupts.
382 */
383 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
384 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
385 jmicron_enable_mmc(slot->host, 1);
386
387 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
388
389 return 0;
390 }
391
392 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
393 {
394 if (dead)
395 return;
396
397 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
398 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
399 jmicron_enable_mmc(slot->host, 0);
400 }
401
402 static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
403 {
404 int i;
405
406 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
407 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
408 for (i = 0; i < chip->num_slots; i++)
409 jmicron_enable_mmc(chip->slots[i]->host, 0);
410 }
411
412 return 0;
413 }
414
415 static int jmicron_resume(struct sdhci_pci_chip *chip)
416 {
417 int ret, i;
418
419 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
420 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
421 for (i = 0; i < chip->num_slots; i++)
422 jmicron_enable_mmc(chip->slots[i]->host, 1);
423 }
424
425 ret = jmicron_pmos(chip, 1);
426 if (ret) {
427 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
428 return ret;
429 }
430
431 return 0;
432 }
433
434 static const struct sdhci_pci_fixes sdhci_o2 = {
435 .probe = o2_probe,
436 };
437
438 static const struct sdhci_pci_fixes sdhci_jmicron = {
439 .probe = jmicron_probe,
440
441 .probe_slot = jmicron_probe_slot,
442 .remove_slot = jmicron_remove_slot,
443
444 .suspend = jmicron_suspend,
445 .resume = jmicron_resume,
446 };
447
448 /* SysKonnect CardBus2SDIO extra registers */
449 #define SYSKT_CTRL 0x200
450 #define SYSKT_RDFIFO_STAT 0x204
451 #define SYSKT_WRFIFO_STAT 0x208
452 #define SYSKT_POWER_DATA 0x20c
453 #define SYSKT_POWER_330 0xef
454 #define SYSKT_POWER_300 0xf8
455 #define SYSKT_POWER_184 0xcc
456 #define SYSKT_POWER_CMD 0x20d
457 #define SYSKT_POWER_START (1 << 7)
458 #define SYSKT_POWER_STATUS 0x20e
459 #define SYSKT_POWER_STATUS_OK (1 << 0)
460 #define SYSKT_BOARD_REV 0x210
461 #define SYSKT_CHIP_REV 0x211
462 #define SYSKT_CONF_DATA 0x212
463 #define SYSKT_CONF_DATA_1V8 (1 << 2)
464 #define SYSKT_CONF_DATA_2V5 (1 << 1)
465 #define SYSKT_CONF_DATA_3V3 (1 << 0)
466
467 static int syskt_probe(struct sdhci_pci_chip *chip)
468 {
469 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
470 chip->pdev->class &= ~0x0000FF;
471 chip->pdev->class |= PCI_SDHCI_IFDMA;
472 }
473 return 0;
474 }
475
476 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
477 {
478 int tm, ps;
479
480 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
481 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
482 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
483 "board rev %d.%d, chip rev %d.%d\n",
484 board_rev >> 4, board_rev & 0xf,
485 chip_rev >> 4, chip_rev & 0xf);
486 if (chip_rev >= 0x20)
487 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
488
489 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
490 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
491 udelay(50);
492 tm = 10; /* Wait max 1 ms */
493 do {
494 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
495 if (ps & SYSKT_POWER_STATUS_OK)
496 break;
497 udelay(100);
498 } while (--tm);
499 if (!tm) {
500 dev_err(&slot->chip->pdev->dev,
501 "power regulator never stabilized");
502 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
503 return -ENODEV;
504 }
505
506 return 0;
507 }
508
509 static const struct sdhci_pci_fixes sdhci_syskt = {
510 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
511 .probe = syskt_probe,
512 .probe_slot = syskt_probe_slot,
513 };
514
515 static int via_probe(struct sdhci_pci_chip *chip)
516 {
517 if (chip->pdev->revision == 0x10)
518 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
519
520 return 0;
521 }
522
523 static const struct sdhci_pci_fixes sdhci_via = {
524 .probe = via_probe,
525 };
526
527 static const struct pci_device_id pci_ids[] __devinitdata = {
528 {
529 .vendor = PCI_VENDOR_ID_RICOH,
530 .device = PCI_DEVICE_ID_RICOH_R5C822,
531 .subvendor = PCI_ANY_ID,
532 .subdevice = PCI_ANY_ID,
533 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
534 },
535
536 {
537 .vendor = PCI_VENDOR_ID_RICOH,
538 .device = 0x843,
539 .subvendor = PCI_ANY_ID,
540 .subdevice = PCI_ANY_ID,
541 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
542 },
543
544 {
545 .vendor = PCI_VENDOR_ID_RICOH,
546 .device = 0xe822,
547 .subvendor = PCI_ANY_ID,
548 .subdevice = PCI_ANY_ID,
549 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
550 },
551
552 {
553 .vendor = PCI_VENDOR_ID_RICOH,
554 .device = 0xe823,
555 .subvendor = PCI_ANY_ID,
556 .subdevice = PCI_ANY_ID,
557 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
558 },
559
560 {
561 .vendor = PCI_VENDOR_ID_ENE,
562 .device = PCI_DEVICE_ID_ENE_CB712_SD,
563 .subvendor = PCI_ANY_ID,
564 .subdevice = PCI_ANY_ID,
565 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
566 },
567
568 {
569 .vendor = PCI_VENDOR_ID_ENE,
570 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
571 .subvendor = PCI_ANY_ID,
572 .subdevice = PCI_ANY_ID,
573 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
574 },
575
576 {
577 .vendor = PCI_VENDOR_ID_ENE,
578 .device = PCI_DEVICE_ID_ENE_CB714_SD,
579 .subvendor = PCI_ANY_ID,
580 .subdevice = PCI_ANY_ID,
581 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
582 },
583
584 {
585 .vendor = PCI_VENDOR_ID_ENE,
586 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
587 .subvendor = PCI_ANY_ID,
588 .subdevice = PCI_ANY_ID,
589 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
590 },
591
592 {
593 .vendor = PCI_VENDOR_ID_MARVELL,
594 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
595 .subvendor = PCI_ANY_ID,
596 .subdevice = PCI_ANY_ID,
597 .driver_data = (kernel_ulong_t)&sdhci_cafe,
598 },
599
600 {
601 .vendor = PCI_VENDOR_ID_JMICRON,
602 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
603 .subvendor = PCI_ANY_ID,
604 .subdevice = PCI_ANY_ID,
605 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
606 },
607
608 {
609 .vendor = PCI_VENDOR_ID_JMICRON,
610 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
611 .subvendor = PCI_ANY_ID,
612 .subdevice = PCI_ANY_ID,
613 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
614 },
615
616 {
617 .vendor = PCI_VENDOR_ID_JMICRON,
618 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
619 .subvendor = PCI_ANY_ID,
620 .subdevice = PCI_ANY_ID,
621 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
622 },
623
624 {
625 .vendor = PCI_VENDOR_ID_JMICRON,
626 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
627 .subvendor = PCI_ANY_ID,
628 .subdevice = PCI_ANY_ID,
629 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
630 },
631
632 {
633 .vendor = PCI_VENDOR_ID_SYSKONNECT,
634 .device = 0x8000,
635 .subvendor = PCI_ANY_ID,
636 .subdevice = PCI_ANY_ID,
637 .driver_data = (kernel_ulong_t)&sdhci_syskt,
638 },
639
640 {
641 .vendor = PCI_VENDOR_ID_VIA,
642 .device = 0x95d0,
643 .subvendor = PCI_ANY_ID,
644 .subdevice = PCI_ANY_ID,
645 .driver_data = (kernel_ulong_t)&sdhci_via,
646 },
647
648 {
649 .vendor = PCI_VENDOR_ID_INTEL,
650 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
651 .subvendor = PCI_ANY_ID,
652 .subdevice = PCI_ANY_ID,
653 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
654 },
655
656 {
657 .vendor = PCI_VENDOR_ID_INTEL,
658 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
659 .subvendor = PCI_ANY_ID,
660 .subdevice = PCI_ANY_ID,
661 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
662 },
663
664 {
665 .vendor = PCI_VENDOR_ID_INTEL,
666 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
667 .subvendor = PCI_ANY_ID,
668 .subdevice = PCI_ANY_ID,
669 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
670 },
671
672 {
673 .vendor = PCI_VENDOR_ID_INTEL,
674 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
675 .subvendor = PCI_ANY_ID,
676 .subdevice = PCI_ANY_ID,
677 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
678 },
679
680 {
681 .vendor = PCI_VENDOR_ID_INTEL,
682 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
683 .subvendor = PCI_ANY_ID,
684 .subdevice = PCI_ANY_ID,
685 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
686 },
687
688 {
689 .vendor = PCI_VENDOR_ID_INTEL,
690 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
691 .subvendor = PCI_ANY_ID,
692 .subdevice = PCI_ANY_ID,
693 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
694 },
695
696 {
697 .vendor = PCI_VENDOR_ID_INTEL,
698 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
699 .subvendor = PCI_ANY_ID,
700 .subdevice = PCI_ANY_ID,
701 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
702 },
703
704 {
705 .vendor = PCI_VENDOR_ID_INTEL,
706 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
707 .subvendor = PCI_ANY_ID,
708 .subdevice = PCI_ANY_ID,
709 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc_sdio,
710 },
711
712 {
713 .vendor = PCI_VENDOR_ID_O2,
714 .device = PCI_DEVICE_ID_O2_8120,
715 .subvendor = PCI_ANY_ID,
716 .subdevice = PCI_ANY_ID,
717 .driver_data = (kernel_ulong_t)&sdhci_o2,
718 },
719
720 {
721 .vendor = PCI_VENDOR_ID_O2,
722 .device = PCI_DEVICE_ID_O2_8220,
723 .subvendor = PCI_ANY_ID,
724 .subdevice = PCI_ANY_ID,
725 .driver_data = (kernel_ulong_t)&sdhci_o2,
726 },
727
728 {
729 .vendor = PCI_VENDOR_ID_O2,
730 .device = PCI_DEVICE_ID_O2_8221,
731 .subvendor = PCI_ANY_ID,
732 .subdevice = PCI_ANY_ID,
733 .driver_data = (kernel_ulong_t)&sdhci_o2,
734 },
735
736 {
737 .vendor = PCI_VENDOR_ID_O2,
738 .device = PCI_DEVICE_ID_O2_8320,
739 .subvendor = PCI_ANY_ID,
740 .subdevice = PCI_ANY_ID,
741 .driver_data = (kernel_ulong_t)&sdhci_o2,
742 },
743
744 {
745 .vendor = PCI_VENDOR_ID_O2,
746 .device = PCI_DEVICE_ID_O2_8321,
747 .subvendor = PCI_ANY_ID,
748 .subdevice = PCI_ANY_ID,
749 .driver_data = (kernel_ulong_t)&sdhci_o2,
750 },
751
752 { /* Generic SD host controller */
753 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
754 },
755
756 { /* end: all zeroes */ },
757 };
758
759 MODULE_DEVICE_TABLE(pci, pci_ids);
760
761 /*****************************************************************************\
762 * *
763 * SDHCI core callbacks *
764 * *
765 \*****************************************************************************/
766
767 static int sdhci_pci_enable_dma(struct sdhci_host *host)
768 {
769 struct sdhci_pci_slot *slot;
770 struct pci_dev *pdev;
771 int ret;
772
773 slot = sdhci_priv(host);
774 pdev = slot->chip->pdev;
775
776 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
777 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
778 (host->flags & SDHCI_USE_SDMA)) {
779 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
780 "doesn't fully claim to support it.\n");
781 }
782
783 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
784 if (ret)
785 return ret;
786
787 pci_set_master(pdev);
788
789 return 0;
790 }
791
792 static struct sdhci_ops sdhci_pci_ops = {
793 .enable_dma = sdhci_pci_enable_dma,
794 };
795
796 /*****************************************************************************\
797 * *
798 * Suspend/resume *
799 * *
800 \*****************************************************************************/
801
802 #ifdef CONFIG_PM
803
804 static int sdhci_pci_suspend(struct pci_dev *pdev, pm_message_t state)
805 {
806 struct sdhci_pci_chip *chip;
807 struct sdhci_pci_slot *slot;
808 mmc_pm_flag_t slot_pm_flags;
809 mmc_pm_flag_t pm_flags = 0;
810 int i, ret;
811
812 chip = pci_get_drvdata(pdev);
813 if (!chip)
814 return 0;
815
816 for (i = 0; i < chip->num_slots; i++) {
817 slot = chip->slots[i];
818 if (!slot)
819 continue;
820
821 ret = sdhci_suspend_host(slot->host, state);
822
823 if (ret) {
824 for (i--; i >= 0; i--)
825 sdhci_resume_host(chip->slots[i]->host);
826 return ret;
827 }
828
829 slot_pm_flags = slot->host->mmc->pm_flags;
830 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
831 sdhci_enable_irq_wakeups(slot->host);
832
833 pm_flags |= slot_pm_flags;
834 }
835
836 if (chip->fixes && chip->fixes->suspend) {
837 ret = chip->fixes->suspend(chip, state);
838 if (ret) {
839 for (i = chip->num_slots - 1; i >= 0; i--)
840 sdhci_resume_host(chip->slots[i]->host);
841 return ret;
842 }
843 }
844
845 pci_save_state(pdev);
846 if (pm_flags & MMC_PM_KEEP_POWER) {
847 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
848 pci_pme_active(pdev, true);
849 pci_enable_wake(pdev, PCI_D3hot, 1);
850 }
851 pci_set_power_state(pdev, PCI_D3hot);
852 } else {
853 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
854 pci_disable_device(pdev);
855 pci_set_power_state(pdev, pci_choose_state(pdev, state));
856 }
857
858 return 0;
859 }
860
861 static int sdhci_pci_resume(struct pci_dev *pdev)
862 {
863 struct sdhci_pci_chip *chip;
864 struct sdhci_pci_slot *slot;
865 int i, ret;
866
867 chip = pci_get_drvdata(pdev);
868 if (!chip)
869 return 0;
870
871 pci_set_power_state(pdev, PCI_D0);
872 pci_restore_state(pdev);
873 ret = pci_enable_device(pdev);
874 if (ret)
875 return ret;
876
877 if (chip->fixes && chip->fixes->resume) {
878 ret = chip->fixes->resume(chip);
879 if (ret)
880 return ret;
881 }
882
883 for (i = 0; i < chip->num_slots; i++) {
884 slot = chip->slots[i];
885 if (!slot)
886 continue;
887
888 ret = sdhci_resume_host(slot->host);
889 if (ret)
890 return ret;
891 }
892
893 return 0;
894 }
895
896 #else /* CONFIG_PM */
897
898 #define sdhci_pci_suspend NULL
899 #define sdhci_pci_resume NULL
900
901 #endif /* CONFIG_PM */
902
903 /*****************************************************************************\
904 * *
905 * Device probing/removal *
906 * *
907 \*****************************************************************************/
908
909 static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
910 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
911 {
912 struct sdhci_pci_slot *slot;
913 struct sdhci_host *host;
914 int ret;
915
916 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
917 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
918 return ERR_PTR(-ENODEV);
919 }
920
921 if (pci_resource_len(pdev, bar) != 0x100) {
922 dev_err(&pdev->dev, "Invalid iomem size. You may "
923 "experience problems.\n");
924 }
925
926 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
927 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
928 return ERR_PTR(-ENODEV);
929 }
930
931 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
932 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
933 return ERR_PTR(-ENODEV);
934 }
935
936 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
937 if (IS_ERR(host)) {
938 dev_err(&pdev->dev, "cannot allocate host\n");
939 return ERR_CAST(host);
940 }
941
942 slot = sdhci_priv(host);
943
944 slot->chip = chip;
945 slot->host = host;
946 slot->pci_bar = bar;
947
948 host->hw_name = "PCI";
949 host->ops = &sdhci_pci_ops;
950 host->quirks = chip->quirks;
951
952 host->irq = pdev->irq;
953
954 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
955 if (ret) {
956 dev_err(&pdev->dev, "cannot request region\n");
957 goto free;
958 }
959
960 host->ioaddr = pci_ioremap_bar(pdev, bar);
961 if (!host->ioaddr) {
962 dev_err(&pdev->dev, "failed to remap registers\n");
963 ret = -ENOMEM;
964 goto release;
965 }
966
967 if (chip->fixes && chip->fixes->probe_slot) {
968 ret = chip->fixes->probe_slot(slot);
969 if (ret)
970 goto unmap;
971 }
972
973 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
974
975 ret = sdhci_add_host(host);
976 if (ret)
977 goto remove;
978
979 return slot;
980
981 remove:
982 if (chip->fixes && chip->fixes->remove_slot)
983 chip->fixes->remove_slot(slot, 0);
984
985 unmap:
986 iounmap(host->ioaddr);
987
988 release:
989 pci_release_region(pdev, bar);
990
991 free:
992 sdhci_free_host(host);
993
994 return ERR_PTR(ret);
995 }
996
997 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
998 {
999 int dead;
1000 u32 scratch;
1001
1002 dead = 0;
1003 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1004 if (scratch == (u32)-1)
1005 dead = 1;
1006
1007 sdhci_remove_host(slot->host, dead);
1008
1009 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1010 slot->chip->fixes->remove_slot(slot, dead);
1011
1012 pci_release_region(slot->chip->pdev, slot->pci_bar);
1013
1014 sdhci_free_host(slot->host);
1015 }
1016
1017 static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
1018 const struct pci_device_id *ent)
1019 {
1020 struct sdhci_pci_chip *chip;
1021 struct sdhci_pci_slot *slot;
1022
1023 u8 slots, first_bar;
1024 int ret, i;
1025
1026 BUG_ON(pdev == NULL);
1027 BUG_ON(ent == NULL);
1028
1029 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1030 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1031
1032 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1033 if (ret)
1034 return ret;
1035
1036 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1037 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1038 if (slots == 0)
1039 return -ENODEV;
1040
1041 BUG_ON(slots > MAX_SLOTS);
1042
1043 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1044 if (ret)
1045 return ret;
1046
1047 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1048
1049 if (first_bar > 5) {
1050 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1051 return -ENODEV;
1052 }
1053
1054 ret = pci_enable_device(pdev);
1055 if (ret)
1056 return ret;
1057
1058 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1059 if (!chip) {
1060 ret = -ENOMEM;
1061 goto err;
1062 }
1063
1064 chip->pdev = pdev;
1065 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1066 if (chip->fixes)
1067 chip->quirks = chip->fixes->quirks;
1068 chip->num_slots = slots;
1069
1070 pci_set_drvdata(pdev, chip);
1071
1072 if (chip->fixes && chip->fixes->probe) {
1073 ret = chip->fixes->probe(chip);
1074 if (ret)
1075 goto free;
1076 }
1077
1078 slots = chip->num_slots; /* Quirk may have changed this */
1079
1080 for (i = 0; i < slots; i++) {
1081 slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
1082 if (IS_ERR(slot)) {
1083 for (i--; i >= 0; i--)
1084 sdhci_pci_remove_slot(chip->slots[i]);
1085 ret = PTR_ERR(slot);
1086 goto free;
1087 }
1088
1089 chip->slots[i] = slot;
1090 }
1091
1092 return 0;
1093
1094 free:
1095 pci_set_drvdata(pdev, NULL);
1096 kfree(chip);
1097
1098 err:
1099 pci_disable_device(pdev);
1100 return ret;
1101 }
1102
1103 static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
1104 {
1105 int i;
1106 struct sdhci_pci_chip *chip;
1107
1108 chip = pci_get_drvdata(pdev);
1109
1110 if (chip) {
1111 for (i = 0; i < chip->num_slots; i++)
1112 sdhci_pci_remove_slot(chip->slots[i]);
1113
1114 pci_set_drvdata(pdev, NULL);
1115 kfree(chip);
1116 }
1117
1118 pci_disable_device(pdev);
1119 }
1120
1121 static struct pci_driver sdhci_driver = {
1122 .name = "sdhci-pci",
1123 .id_table = pci_ids,
1124 .probe = sdhci_pci_probe,
1125 .remove = __devexit_p(sdhci_pci_remove),
1126 .suspend = sdhci_pci_suspend,
1127 .resume = sdhci_pci_resume,
1128 };
1129
1130 /*****************************************************************************\
1131 * *
1132 * Driver init/exit *
1133 * *
1134 \*****************************************************************************/
1135
1136 static int __init sdhci_drv_init(void)
1137 {
1138 return pci_register_driver(&sdhci_driver);
1139 }
1140
1141 static void __exit sdhci_drv_exit(void)
1142 {
1143 pci_unregister_driver(&sdhci_driver);
1144 }
1145
1146 module_init(sdhci_drv_init);
1147 module_exit(sdhci_drv_exit);
1148
1149 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1150 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1151 MODULE_LICENSE("GPL");
linux-next