drivers/net/vxge/vxge-main.h

   1 /******************************************************************************
   2  * This software may be used and distributed according to the terms of
   3  * the GNU General Public License (GPL), incorporated herein by reference.
   4  * Drivers based on or derived from this code fall under the GPL and must
   5  * retain the authorship, copyright and license notice.  This file is not
   6  * a complete program and may only be used when the entire operating
   7  * system is licensed under the GPL.
   8  * See the file COPYING in this distribution for more information.
   9  *
  10  * vxge-main.h: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
  11  *              Virtualized Server Adapter.
  12  * Copyright(c) 2002-2010 Exar Corp.
  13  ******************************************************************************/
  14 #ifndef VXGE_MAIN_H
  15 #define VXGE_MAIN_H
  16
  17 #include "vxge-traffic.h"
  18 #include "vxge-config.h"
  19 #include "vxge-version.h"
  20 #include <linux/list.h>
  21
  22 #define VXGE_DRIVER_NAME                "vxge"
  23 #define VXGE_DRIVER_VENDOR              "Neterion, Inc"
  24 #define VXGE_DRIVER_FW_VERSION_MAJOR    1
  25
  26 #define DRV_VERSION     VXGE_VERSION_MAJOR"."VXGE_VERSION_MINOR"."\
  27         VXGE_VERSION_FIX"."VXGE_VERSION_BUILD"-"\
  28         VXGE_VERSION_FOR
  29
  30 #define PCI_DEVICE_ID_TITAN_WIN         0x5733
  31 #define PCI_DEVICE_ID_TITAN_UNI         0x5833
  32 #define VXGE_HW_TITAN1_PCI_REVISION     1
  33 #define VXGE_HW_TITAN1A_PCI_REVISION    2
  34
  35 #define VXGE_USE_DEFAULT                0xffffffff
  36 #define VXGE_HW_VPATH_MSIX_ACTIVE       4
  37 #define VXGE_ALARM_MSIX_ID              2
  38 #define VXGE_HW_RXSYNC_FREQ_CNT         4
  39 #define VXGE_LL_WATCH_DOG_TIMEOUT       (15 * HZ)
  40 #define VXGE_LL_RX_COPY_THRESHOLD       256
  41 #define VXGE_DEF_FIFO_LENGTH            84
  42
  43 #define NO_STEERING             0
  44 #define PORT_STEERING           0x1
  45 #define RTH_STEERING            0x2
  46 #define RX_TOS_STEERING         0x3
  47 #define RX_VLAN_STEERING        0x4
  48 #define RTH_BUCKET_SIZE         4
  49
  50 #define TX_PRIORITY_STEERING    1
  51 #define TX_VLAN_STEERING        2
  52 #define TX_PORT_STEERING        3
  53 #define TX_MULTIQ_STEERING      4
  54
  55 #define VXGE_HW_MAC_ADDR_LEARN_DEFAULT VXGE_HW_RTS_MAC_DISABLE
  56
  57 #define VXGE_TTI_BTIMER_VAL 250000
  58
  59 #define VXGE_TTI_LTIMER_VAL     1000
  60 #define VXGE_T1A_TTI_LTIMER_VAL 80
  61 #define VXGE_TTI_RTIMER_VAL     0
  62 #define VXGE_TTI_RTIMER_ADAPT_VAL       10
  63 #define VXGE_T1A_TTI_RTIMER_VAL 400
  64 #define VXGE_RTI_BTIMER_VAL     250
  65 #define VXGE_RTI_LTIMER_VAL     100
  66 #define VXGE_RTI_RTIMER_VAL     0
  67 #define VXGE_RTI_RTIMER_ADAPT_VAL       15
  68 #define VXGE_FIFO_INDICATE_MAX_PKTS     VXGE_DEF_FIFO_LENGTH
  69 #define VXGE_ISR_POLLING_CNT    8
  70 #define VXGE_MAX_CONFIG_DEV     0xFF
  71 #define VXGE_EXEC_MODE_DISABLE  0
  72 #define VXGE_EXEC_MODE_ENABLE   1
  73 #define VXGE_MAX_CONFIG_PORT    1
  74 #define VXGE_ALL_VID_DISABLE    0
  75 #define VXGE_ALL_VID_ENABLE     1
  76 #define VXGE_PAUSE_CTRL_DISABLE 0
  77 #define VXGE_PAUSE_CTRL_ENABLE  1
  78
  79 #define TTI_TX_URANGE_A 5
  80 #define TTI_TX_URANGE_B 15
  81 #define TTI_TX_URANGE_C 40
  82 #define TTI_TX_UFC_A    5
  83 #define TTI_TX_UFC_B    40
  84 #define TTI_TX_UFC_C    60
  85 #define TTI_TX_UFC_D    100
  86 #define TTI_T1A_TX_UFC_A        30
  87 #define TTI_T1A_TX_UFC_B        80
  88 /* Slope - (max_mtu - min_mtu)/(max_mtu_ufc - min_mtu_ufc) */
  89 /* Slope - 93 */
  90 /* 60 - 9k Mtu, 140 - 1.5k mtu */
  91 #define TTI_T1A_TX_UFC_C(mtu)   (60 + ((VXGE_HW_MAX_MTU - mtu) / 93))
  92
  93 /* Slope - 37 */
  94 /* 100 - 9k Mtu, 300 - 1.5k mtu */
  95 #define TTI_T1A_TX_UFC_D(mtu)   (100 + ((VXGE_HW_MAX_MTU - mtu) / 37))
  96
  97
  98 #define RTI_RX_URANGE_A         5
  99 #define RTI_RX_URANGE_B         15
 100 #define RTI_RX_URANGE_C         40
 101 #define RTI_T1A_RX_URANGE_A     1
 102 #define RTI_T1A_RX_URANGE_B     20
 103 #define RTI_T1A_RX_URANGE_C     50
 104 #define RTI_RX_UFC_A            1
 105 #define RTI_RX_UFC_B            5
 106 #define RTI_RX_UFC_C            10
 107 #define RTI_RX_UFC_D            15
 108 #define RTI_T1A_RX_UFC_B        20
 109 #define RTI_T1A_RX_UFC_C        50
 110 #define RTI_T1A_RX_UFC_D        60
 111
 112 /*
 113  * The interrupt rate is maintained at 3k per second with the moderation
 114  * parameters for most traffic but not all. This is the maximum interrupt
 115  * count allowed per function with INTA or per vector in the case of
 116  * MSI-X in a 10 millisecond time period. Enabled only for Titan 1A.
 117  */
 118 #define VXGE_T1A_MAX_INTERRUPT_COUNT    100
 119 #define VXGE_T1A_MAX_TX_INTERRUPT_COUNT 200
 120
 121 /* Milli secs timer period */
 122 #define VXGE_TIMER_DELAY                10000
 123
 124 #define VXGE_LL_MAX_FRAME_SIZE(dev) ((dev)->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE)
 125
 126 #define is_sriov(function_mode) \
 127         ((function_mode == VXGE_HW_FUNCTION_MODE_SRIOV) || \
 128         (function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_8) || \
 129         (function_mode == VXGE_HW_FUNCTION_MODE_SRIOV_4))
 130
 131 enum vxge_reset_event {
 132         /* reset events */
 133         VXGE_LL_VPATH_RESET     = 0,
 134         VXGE_LL_DEVICE_RESET    = 1,
 135         VXGE_LL_FULL_RESET      = 2,
 136         VXGE_LL_START_RESET     = 3,
 137         VXGE_LL_COMPL_RESET     = 4
 138 };
 139 /* These flags represent the devices temporary state */
 140 enum vxge_device_state_t {
 141 __VXGE_STATE_RESET_CARD = 0,
 142 __VXGE_STATE_CARD_UP
 143 };
 144
 145 enum vxge_mac_addr_state {
 146         /* mac address states */
 147         VXGE_LL_MAC_ADDR_IN_LIST        = 0,
 148         VXGE_LL_MAC_ADDR_IN_DA_TABLE    = 1
 149 };
 150
 151 struct vxge_drv_config {
 152         int config_dev_cnt;
 153         int total_dev_cnt;
 154         int g_no_cpus;
 155         unsigned int vpath_per_dev;
 156 };
 157
 158 struct macInfo {
 159         unsigned char macaddr[ETH_ALEN];
 160         unsigned char macmask[ETH_ALEN];
 161         unsigned int vpath_no;
 162         enum vxge_mac_addr_state state;
 163 };
 164
 165 struct vxge_config {
 166         int             tx_pause_enable;
 167         int             rx_pause_enable;
 168
 169 #define NEW_NAPI_WEIGHT 64
 170         int             napi_weight;
 171         int             intr_type;
 172 #define INTA    0
 173 #define MSI     1
 174 #define MSI_X   2
 175
 176         int             addr_learn_en;
 177
 178         u32             rth_steering:2,
 179                         rth_algorithm:2,
 180                         rth_hash_type_tcpipv4:1,
 181                         rth_hash_type_ipv4:1,
 182                         rth_hash_type_tcpipv6:1,
 183                         rth_hash_type_ipv6:1,
 184                         rth_hash_type_tcpipv6ex:1,
 185                         rth_hash_type_ipv6ex:1,
 186                         rth_bkt_sz:8;
 187         int             rth_jhash_golden_ratio;
 188         int             tx_steering_type;
 189         int     fifo_indicate_max_pkts;
 190         struct vxge_hw_device_hw_info device_hw_info;
 191 };
 192
 193 struct vxge_msix_entry {
 194         /* Mimicing the msix_entry struct of Kernel. */
 195         u16 vector;
 196         u16 entry;
 197         u16 in_use;
 198         void *arg;
 199 };
 200
 201 /* Software Statistics */
 202
 203 struct vxge_sw_stats {
 204         /* Network Stats (interface stats) */
 205
 206         /* Tx */
 207         u64 tx_frms;
 208         u64 tx_errors;
 209         u64 tx_bytes;
 210         u64 txd_not_free;
 211         u64 txd_out_of_desc;
 212
 213         /* Virtual Path */
 214         u64 vpaths_open;
 215         u64 vpath_open_fail;
 216
 217         /* Rx */
 218         u64 rx_frms;
 219         u64 rx_errors;
 220         u64 rx_bytes;
 221         u64 rx_mcast;
 222
 223         /* Misc. */
 224         u64 link_up;
 225         u64 link_down;
 226         u64 pci_map_fail;
 227         u64 skb_alloc_fail;
 228 };
 229
 230 struct vxge_mac_addrs {
 231         struct list_head item;
 232         u64 macaddr;
 233         u64 macmask;
 234         enum vxge_mac_addr_state state;
 235 };
 236
 237 struct vxgedev;
 238
 239 struct vxge_fifo_stats {
 240         u64 tx_frms;
 241         u64 tx_errors;
 242         u64 tx_bytes;
 243         u64 txd_not_free;
 244         u64 txd_out_of_desc;
 245         u64 pci_map_fail;
 246 };
 247
 248 struct vxge_fifo {
 249         struct net_device *ndev;
 250         struct pci_dev *pdev;
 251         struct __vxge_hw_fifo *handle;
 252         struct netdev_queue *txq;
 253
 254         int tx_steering_type;
 255         int indicate_max_pkts;
 256
 257         /* Adaptive interrupt moderation parameters used in T1A */
 258         unsigned long interrupt_count;
 259         unsigned long jiffies;
 260
 261         u32 tx_vector_no;
 262         /* Tx stats */
 263         struct vxge_fifo_stats stats;
 264 } ____cacheline_aligned;
 265
 266 struct vxge_ring_stats {
 267         u64 prev_rx_frms;
 268         u64 rx_frms;
 269         u64 rx_errors;
 270         u64 rx_dropped;
 271         u64 rx_bytes;
 272         u64 rx_mcast;
 273         u64 pci_map_fail;
 274         u64 skb_alloc_fail;
 275 };
 276
 277 struct vxge_ring {
 278         struct net_device       *ndev;
 279         struct pci_dev          *pdev;
 280         struct __vxge_hw_ring   *handle;
 281         /* The vpath id maintained in the driver -
 282          * 0 to 'maximum_vpaths_in_function - 1'
 283          */
 284         int driver_id;
 285
 286         /* Adaptive interrupt moderation parameters used in T1A */
 287         unsigned long interrupt_count;
 288         unsigned long jiffies;
 289
 290         /* copy of the flag indicating whether rx_hwts is to be used */
 291         u32 rx_hwts:1;
 292
 293         int pkts_processed;
 294         int budget;
 295
 296         struct napi_struct napi;
 297         struct napi_struct *napi_p;
 298
 299 #define VXGE_MAX_MAC_ADDR_COUNT         30
 300
 301         int vlan_tag_strip;
 302         struct vlan_group *vlgrp;
 303         u32 rx_vector_no;
 304         enum vxge_hw_status last_status;
 305
 306         /* Rx stats */
 307         struct vxge_ring_stats stats;
 308 } ____cacheline_aligned;
 309
 310 struct vxge_vpath {
 311         struct vxge_fifo fifo;
 312         struct vxge_ring ring;
 313
 314         struct __vxge_hw_vpath_handle *handle;
 315
 316         /* Actual vpath id for this vpath in the device - 0 to 16 */
 317         int device_id;
 318         int max_mac_addr_cnt;
 319         int is_configured;
 320         int is_open;
 321         struct vxgedev *vdev;
 322         u8 macaddr[ETH_ALEN];
 323         u8 macmask[ETH_ALEN];
 324
 325 #define VXGE_MAX_LEARN_MAC_ADDR_CNT     2048
 326         /* mac addresses currently programmed into NIC */
 327         u16 mac_addr_cnt;
 328         u16 mcast_addr_cnt;
 329         struct list_head mac_addr_list;
 330
 331         u32 level_err;
 332         u32 level_trace;
 333 };
 334 #define VXGE_COPY_DEBUG_INFO_TO_LL(vdev, err, trace) {  \
 335         for (i = 0; i < vdev->no_of_vpath; i++) {               \
 336                 vdev->vpaths[i].level_err = err;                \
 337                 vdev->vpaths[i].level_trace = trace;            \
 338         }                                                       \
 339         vdev->level_err = err;                                  \
 340         vdev->level_trace = trace;                              \
 341 }
 342
 343 struct vxgedev {
 344         struct net_device       *ndev;
 345         struct pci_dev          *pdev;
 346         struct __vxge_hw_device *devh;
 347         struct vlan_group       *vlgrp;
 348         int vlan_tag_strip;
 349         struct vxge_config      config;
 350         unsigned long   state;
 351
 352         /* Indicates which vpath to reset */
 353         unsigned long  vp_reset;
 354
 355         /* Timer used for polling vpath resets */
 356         struct timer_list vp_reset_timer;
 357
 358         /* Timer used for polling vpath lockup */
 359         struct timer_list vp_lockup_timer;
 360
 361         /*
 362          * Flags to track whether device is in All Multicast
 363          * or in promiscuous mode.
 364          */
 365         u16             all_multi_flg;
 366
 367         /* A flag indicating whether rx_hwts is to be used or not. */
 368         u32     rx_hwts:1,
 369                 titan1:1;
 370
 371         struct vxge_msix_entry *vxge_entries;
 372         struct msix_entry *entries;
 373         /*
 374          * 4 for each vpath * 17;
 375          * total is 68
 376          */
 377 #define VXGE_MAX_REQUESTED_MSIX 68
 378 #define VXGE_INTR_STRLEN 80
 379         char desc[VXGE_MAX_REQUESTED_MSIX][VXGE_INTR_STRLEN];
 380
 381         enum vxge_hw_event cric_err_event;
 382
 383         int max_vpath_supported;
 384         int no_of_vpath;
 385
 386         struct napi_struct napi;
 387         /* A debug option, when enabled and if error condition occurs,
 388          * the driver will do following steps:
 389          * - mask all interrupts
 390          * - Not clear the source of the alarm
 391          * - gracefully stop all I/O
 392          * A diagnostic dump of register and stats at this point
 393          * reveals very useful information.
 394          */
 395         int exec_mode;
 396         int max_config_port;
 397         struct vxge_vpath       *vpaths;
 398
 399         struct __vxge_hw_vpath_handle *vp_handles[VXGE_HW_MAX_VIRTUAL_PATHS];
 400         void __iomem *bar0;
 401         struct vxge_sw_stats    stats;
 402         int             mtu;
 403         /* Below variables are used for vpath selection to transmit a packet */
 404         u8              vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS];
 405         u64             vpaths_deployed;
 406
 407         u32             intr_cnt;
 408         u32             level_err;
 409         u32             level_trace;
 410         char            fw_version[VXGE_HW_FW_STRLEN];
 411         struct work_struct reset_task;
 412 };
 413
 414 struct vxge_rx_priv {
 415         struct sk_buff          *skb;
 416         unsigned char           *skb_data;
 417         dma_addr_t              data_dma;
 418         dma_addr_t              data_size;
 419 };
 420
 421 struct vxge_tx_priv {
 422         struct sk_buff          *skb;
 423         dma_addr_t              dma_buffers[MAX_SKB_FRAGS+1];
 424 };
 425
 426 #define VXGE_MODULE_PARAM_INT(p, val) \
 427         static int p = val; \
 428         module_param(p, int, 0)
 429
 430 #define vxge_os_timer(timer, handle, arg, exp) do { \
 431                 init_timer(&timer); \
 432                 timer.function = handle; \
 433                 timer.data = (unsigned long) arg; \
 434                 mod_timer(&timer, (jiffies + exp)); \
 435         } while (0);
 436
 437 void vxge_initialize_ethtool_ops(struct net_device *ndev);
 438 enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
 439 int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override);
 440
 441 /**
 442  * #define VXGE_DEBUG_INIT: debug for initialization functions
 443  * #define VXGE_DEBUG_TX         : debug transmit related functions
 444  * #define VXGE_DEBUG_RX  : debug recevice related functions
 445  * #define VXGE_DEBUG_MEM : debug memory module
 446  * #define VXGE_DEBUG_LOCK: debug locks
 447  * #define VXGE_DEBUG_SEM : debug semaphore
 448  * #define VXGE_DEBUG_ENTRYEXIT: debug functions by adding entry exit statements
 449 */
 450 #define VXGE_DEBUG_INIT         0x00000001
 451 #define VXGE_DEBUG_TX           0x00000002
 452 #define VXGE_DEBUG_RX           0x00000004
 453 #define VXGE_DEBUG_MEM          0x00000008
 454 #define VXGE_DEBUG_LOCK         0x00000010
 455 #define VXGE_DEBUG_SEM          0x00000020
 456 #define VXGE_DEBUG_ENTRYEXIT    0x00000040
 457 #define VXGE_DEBUG_INTR         0x00000080
 458 #define VXGE_DEBUG_LL_CONFIG    0x00000100
 459
 460 /* Debug tracing for VXGE driver */
 461 #ifndef VXGE_DEBUG_MASK
 462 #define VXGE_DEBUG_MASK 0x0
 463 #endif
 464
 465 #if (VXGE_DEBUG_LL_CONFIG & VXGE_DEBUG_MASK)
 466 #define vxge_debug_ll_config(level, fmt, ...) \
 467         vxge_debug_ll(level, VXGE_DEBUG_LL_CONFIG, fmt, __VA_ARGS__)
 468 #else
 469 #define vxge_debug_ll_config(level, fmt, ...)
 470 #endif
 471
 472 #if (VXGE_DEBUG_INIT & VXGE_DEBUG_MASK)
 473 #define vxge_debug_init(level, fmt, ...) \
 474         vxge_debug_ll(level, VXGE_DEBUG_INIT, fmt, __VA_ARGS__)
 475 #else
 476 #define vxge_debug_init(level, fmt, ...)
 477 #endif
 478
 479 #if (VXGE_DEBUG_TX & VXGE_DEBUG_MASK)
 480 #define vxge_debug_tx(level, fmt, ...) \
 481         vxge_debug_ll(level, VXGE_DEBUG_TX, fmt, __VA_ARGS__)
 482 #else
 483 #define vxge_debug_tx(level, fmt, ...)
 484 #endif
 485
 486 #if (VXGE_DEBUG_RX & VXGE_DEBUG_MASK)
 487 #define vxge_debug_rx(level, fmt, ...) \
 488         vxge_debug_ll(level, VXGE_DEBUG_RX, fmt, __VA_ARGS__)
 489 #else
 490 #define vxge_debug_rx(level, fmt, ...)
 491 #endif
 492
 493 #if (VXGE_DEBUG_MEM & VXGE_DEBUG_MASK)
 494 #define vxge_debug_mem(level, fmt, ...) \
 495         vxge_debug_ll(level, VXGE_DEBUG_MEM, fmt, __VA_ARGS__)
 496 #else
 497 #define vxge_debug_mem(level, fmt, ...)
 498 #endif
 499
 500 #if (VXGE_DEBUG_ENTRYEXIT & VXGE_DEBUG_MASK)
 501 #define vxge_debug_entryexit(level, fmt, ...) \
 502         vxge_debug_ll(level, VXGE_DEBUG_ENTRYEXIT, fmt, __VA_ARGS__)
 503 #else
 504 #define vxge_debug_entryexit(level, fmt, ...)
 505 #endif
 506
 507 #if (VXGE_DEBUG_INTR & VXGE_DEBUG_MASK)
 508 #define vxge_debug_intr(level, fmt, ...) \
 509         vxge_debug_ll(level, VXGE_DEBUG_INTR, fmt, __VA_ARGS__)
 510 #else
 511 #define vxge_debug_intr(level, fmt, ...)
 512 #endif
 513
 514 #define VXGE_DEVICE_DEBUG_LEVEL_SET(level, mask, vdev) {\
 515         vxge_hw_device_debug_set((struct __vxge_hw_device  *)vdev->devh, \
 516                 level, mask);\
 517         VXGE_COPY_DEBUG_INFO_TO_LL(vdev, \
 518                 vxge_hw_device_error_level_get((struct __vxge_hw_device  *) \
 519                         vdev->devh), \
 520                 vxge_hw_device_trace_level_get((struct __vxge_hw_device  *) \
 521                         vdev->devh));\
 522 }
 523
 524 #ifdef NETIF_F_GSO
 525 #define vxge_tcp_mss(skb) (skb_shinfo(skb)->gso_size)
 526 #define vxge_udp_mss(skb) (skb_shinfo(skb)->gso_size)
 527 #define vxge_offload_type(skb) (skb_shinfo(skb)->gso_type)
 528 #endif
 529
 530 #endif