2 * arch/arm/mach-at91/include/mach/at91_dbgu.h
4 * Copyright (C) 2005 Ivan Kokshaysky
5 * Copyright (C) SAN People
7 * Debug Unit (DBGU) - System peripherals registers.
8 * Based on AT91RM9200 datasheet revision E.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
19 #define dbgu_readl(dbgu, field) \
20 __raw_readl(AT91_VA_BASE_SYS + dbgu + AT91_DBGU_ ## field)
23 #define AT91_DBGU_CR (0x00) /* Control Register */
24 #define AT91_DBGU_MR (0x04) /* Mode Register */
25 #define AT91_DBGU_IER (0x08) /* Interrupt Enable Register */
26 #define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */
27 #define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */
28 #define AT91_DBGU_IDR (0x0c) /* Interrupt Disable Register */
29 #define AT91_DBGU_IMR (0x10) /* Interrupt Mask Register */
30 #define AT91_DBGU_SR (0x14) /* Status Register */
31 #define AT91_DBGU_RHR (0x18) /* Receiver Holding Register */
32 #define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
33 #define AT91_DBGU_BRGR (0x20) /* Baud Rate Generator Register */
35 #define AT91_DBGU_CIDR (0x40) /* Chip ID Register */
36 #define AT91_DBGU_EXID (0x44) /* Chip ID Extension Register */
37 #define AT91_DBGU_FNR (0x48) /* Force NTRST Register [SAM9 only] */
38 #define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */
40 #endif /* AT91_DBGU */
43 * Some AT91 parts that don't have full DEBUG units still support the ID
44 * and extensions register.
46 #define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */
47 #define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */
48 #define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */
49 #define AT91_CIDR_NVPSIZ2 (0xf << 12) /* Second Nonvolatile Program Memory Size */
50 #define AT91_CIDR_SRAMSIZ (0xf << 16) /* Internal SRAM Size */
51 #define AT91_CIDR_SRAMSIZ_1K (1 << 16)
52 #define AT91_CIDR_SRAMSIZ_2K (2 << 16)
53 #define AT91_CIDR_SRAMSIZ_112K (4 << 16)
54 #define AT91_CIDR_SRAMSIZ_4K (5 << 16)
55 #define AT91_CIDR_SRAMSIZ_80K (6 << 16)
56 #define AT91_CIDR_SRAMSIZ_160K (7 << 16)
57 #define AT91_CIDR_SRAMSIZ_8K (8 << 16)
58 #define AT91_CIDR_SRAMSIZ_16K (9 << 16)
59 #define AT91_CIDR_SRAMSIZ_32K (10 << 16)
60 #define AT91_CIDR_SRAMSIZ_64K (11 << 16)
61 #define AT91_CIDR_SRAMSIZ_128K (12 << 16)
62 #define AT91_CIDR_SRAMSIZ_256K (13 << 16)
63 #define AT91_CIDR_SRAMSIZ_96K (14 << 16)
64 #define AT91_CIDR_SRAMSIZ_512K (15 << 16)
65 #define AT91_CIDR_ARCH (0xff << 20) /* Architecture Identifier */
66 #define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */
67 #define AT91_CIDR_EXT (1 << 31) /* Extension Flag */