arch/arm/mach-imx/ehci-imx27.c

   1 /*
   2  * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
   3  * Copyright (C) 2010 Freescale Semiconductor, Inc.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2 of the License, or (at your
   8  * option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  12  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * for more details.
  14  */
  15
  16 #include <linux/platform_device.h>
  17 #include <linux/io.h>
  18
  19 #include <mach/hardware.h>
  20 #include <mach/mxc_ehci.h>
  21
  22 #define USBCTRL_OTGBASE_OFFSET  0x600
  23
  24 #define MX27_OTG_SIC_SHIFT      29
  25 #define MX27_OTG_SIC_MASK       (0x3 << MX27_OTG_SIC_SHIFT)
  26 #define MX27_OTG_PM_BIT         (1 << 24)
  27
  28 #define MX27_H2_SIC_SHIFT       21
  29 #define MX27_H2_SIC_MASK        (0x3 << MX27_H2_SIC_SHIFT)
  30 #define MX27_H2_PM_BIT          (1 << 16)
  31 #define MX27_H2_DT_BIT          (1 << 5)
  32
  33 #define MX27_H1_SIC_SHIFT       13
  34 #define MX27_H1_SIC_MASK        (0x3 << MX27_H1_SIC_SHIFT)
  35 #define MX27_H1_PM_BIT          (1 << 8)
  36 #define MX27_H1_DT_BIT          (1 << 4)
  37
  38 int mx27_initialize_usb_hw(int port, unsigned int flags)
  39 {
  40         unsigned int v;
  41
  42         v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
  43
  44         switch (port) {
  45         case 0: /* OTG port */
  46                 v &= ~(MX27_OTG_SIC_MASK | MX27_OTG_PM_BIT);
  47                 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_OTG_SIC_SHIFT;
  48
  49                 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
  50                         v |= MX27_OTG_PM_BIT;
  51                 break;
  52         case 1: /* H1 port */
  53                 v &= ~(MX27_H1_SIC_MASK | MX27_H1_PM_BIT | MX27_H1_DT_BIT);
  54                 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H1_SIC_SHIFT;
  55
  56                 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
  57                         v |= MX27_H1_PM_BIT;
  58
  59                 if (!(flags & MXC_EHCI_TTL_ENABLED))
  60                         v |= MX27_H1_DT_BIT;
  61
  62                 break;
  63         case 2: /* H2 port */
  64                 v &= ~(MX27_H2_SIC_MASK | MX27_H2_PM_BIT | MX27_H2_DT_BIT);
  65                 v |= (flags & MXC_EHCI_INTERFACE_MASK) << MX27_H2_SIC_SHIFT;
  66
  67                 if (!(flags & MXC_EHCI_POWER_PINS_ENABLED))
  68                         v |= MX27_H2_PM_BIT;
  69
  70                 if (!(flags & MXC_EHCI_TTL_ENABLED))
  71                         v |= MX27_H2_DT_BIT;
  72
  73                 break;
  74         default:
  75                 return -EINVAL;
  76         }
  77
  78         writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR + USBCTRL_OTGBASE_OFFSET));
  79
  80         return 0;
  81 }
  82