1 /* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 #include <linux/kernel.h>
20 #include <linux/platform_device.h>
22 #include <linux/irq.h>
23 #include <linux/memblock.h>
25 #include <asm/mach-types.h>
26 #include <asm/mach/arch.h>
27 #include <asm/hardware/gic.h>
28 #include <asm/setup.h>
30 #include <mach/board.h>
31 #include <mach/msm_iomap.h>
33 static void __init
msm8x60_fixup(struct machine_desc
*desc
, struct tag
*tag
,
34 char **cmdline
, struct meminfo
*mi
)
36 for (; tag
->hdr
.size
; tag
= tag_next(tag
))
37 if (tag
->hdr
.tag
== ATAG_MEM
&&
38 tag
->u
.mem
.start
== 0x40200000) {
39 tag
->u
.mem
.start
= 0x40000000;
40 tag
->u
.mem
.size
+= SZ_2M
;
44 static void __init
msm8x60_reserve(void)
46 memblock_remove(0x40000000, SZ_2M
);
49 static void __init
msm8x60_map_io(void)
54 static void __init
msm8x60_init_irq(void)
58 gic_init(0, GIC_PPI_START
, MSM_QGIC_DIST_BASE
,
59 (void *)MSM_QGIC_CPU_BASE
);
61 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
62 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE
+ GIC_DIST_CONFIG
+ 4);
64 /* RUMI does not adhere to GIC spec by enabling STIs by default.
65 * Enable/clear is supposed to be RO for STIs, but is RW on RUMI.
67 if (!machine_is_msm8x60_sim())
68 writel(0x0000FFFF, MSM_QGIC_DIST_BASE
+ GIC_DIST_ENABLE_SET
);
70 /* FIXME: Not installing AVS_SVICINT and AVS_SVICINTSWDONE yet
71 * as they are configured as level, which does not play nice with
74 for (i
= GIC_PPI_START
; i
< GIC_SPI_START
; i
++) {
75 if (i
!= AVS_SVICINT
&& i
!= AVS_SVICINTSWDONE
)
76 irq_set_handler(i
, handle_percpu_irq
);
80 static void __init
msm8x60_init(void)
84 MACHINE_START(MSM8X60_RUMI3
, "QCT MSM8X60 RUMI3")
85 .fixup
= msm8x60_fixup
,
86 .reserve
= msm8x60_reserve
,
87 .map_io
= msm8x60_map_io
,
88 .init_irq
= msm8x60_init_irq
,
89 .init_machine
= msm8x60_init
,
93 MACHINE_START(MSM8X60_SURF
, "QCT MSM8X60 SURF")
94 .fixup
= msm8x60_fixup
,
95 .reserve
= msm8x60_reserve
,
96 .map_io
= msm8x60_map_io
,
97 .init_irq
= msm8x60_init_irq
,
98 .init_machine
= msm8x60_init
,
102 MACHINE_START(MSM8X60_SIM
, "QCT MSM8X60 SIMULATOR")
103 .fixup
= msm8x60_fixup
,
104 .reserve
= msm8x60_reserve
,
105 .map_io
= msm8x60_map_io
,
106 .init_irq
= msm8x60_init_irq
,
107 .init_machine
= msm8x60_init
,
111 MACHINE_START(MSM8X60_FFA
, "QCT MSM8X60 FFA")
112 .fixup
= msm8x60_fixup
,
113 .reserve
= msm8x60_reserve
,
114 .map_io
= msm8x60_map_io
,
115 .init_irq
= msm8x60_init_irq
,
116 .init_machine
= msm8x60_init
,