2 * arch/arm/mach-orion5x/db88f5281-setup.c
4 * Marvell Orion-2 Development Board Setup
6 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
12 #include <linux/gpio.h>
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/pci.h>
17 #include <linux/irq.h>
18 #include <linux/mtd/physmap.h>
19 #include <linux/mtd/nand.h>
20 #include <linux/timer.h>
21 #include <linux/mv643xx_eth.h>
22 #include <linux/i2c.h>
23 #include <asm/mach-types.h>
24 #include <asm/mach/arch.h>
25 #include <asm/mach/pci.h>
26 #include <mach/orion5x.h>
27 #include <plat/orion_nand.h>
31 /*****************************************************************************
32 * DB-88F5281 on board devices
33 ****************************************************************************/
36 * 512K NOR flash Device bus boot chip select
39 #define DB88F5281_NOR_BOOT_BASE 0xf4000000
40 #define DB88F5281_NOR_BOOT_SIZE SZ_512K
43 * 7-Segment on Device bus chip select 0
46 #define DB88F5281_7SEG_BASE 0xfa000000
47 #define DB88F5281_7SEG_SIZE SZ_1K
50 * 32M NOR flash on Device bus chip select 1
53 #define DB88F5281_NOR_BASE 0xfc000000
54 #define DB88F5281_NOR_SIZE SZ_32M
57 * 32M NAND flash on Device bus chip select 2
60 #define DB88F5281_NAND_BASE 0xfa800000
61 #define DB88F5281_NAND_SIZE SZ_1K
67 #define DB88F5281_PCI_SLOT0_OFFS 7
68 #define DB88F5281_PCI_SLOT0_IRQ_PIN 12
69 #define DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN 13
71 /*****************************************************************************
72 * 512M NOR Flash on Device bus Boot CS
73 ****************************************************************************/
75 static struct physmap_flash_data db88f5281_boot_flash_data
= {
76 .width
= 1, /* 8 bit bus width */
79 static struct resource db88f5281_boot_flash_resource
= {
80 .flags
= IORESOURCE_MEM
,
81 .start
= DB88F5281_NOR_BOOT_BASE
,
82 .end
= DB88F5281_NOR_BOOT_BASE
+ DB88F5281_NOR_BOOT_SIZE
- 1,
85 static struct platform_device db88f5281_boot_flash
= {
86 .name
= "physmap-flash",
89 .platform_data
= &db88f5281_boot_flash_data
,
92 .resource
= &db88f5281_boot_flash_resource
,
95 /*****************************************************************************
96 * 32M NOR Flash on Device bus CS1
97 ****************************************************************************/
99 static struct physmap_flash_data db88f5281_nor_flash_data
= {
100 .width
= 4, /* 32 bit bus width */
103 static struct resource db88f5281_nor_flash_resource
= {
104 .flags
= IORESOURCE_MEM
,
105 .start
= DB88F5281_NOR_BASE
,
106 .end
= DB88F5281_NOR_BASE
+ DB88F5281_NOR_SIZE
- 1,
109 static struct platform_device db88f5281_nor_flash
= {
110 .name
= "physmap-flash",
113 .platform_data
= &db88f5281_nor_flash_data
,
116 .resource
= &db88f5281_nor_flash_resource
,
119 /*****************************************************************************
120 * 32M NAND Flash on Device bus CS2
121 ****************************************************************************/
123 static struct mtd_partition db88f5281_nand_parts
[] = {
131 .size
= (SZ_16M
- SZ_2M
),
138 .offset
= (SZ_16M
+ SZ_8M
),
143 static struct resource db88f5281_nand_resource
= {
144 .flags
= IORESOURCE_MEM
,
145 .start
= DB88F5281_NAND_BASE
,
146 .end
= DB88F5281_NAND_BASE
+ DB88F5281_NAND_SIZE
- 1,
149 static struct orion_nand_data db88f5281_nand_data
= {
150 .parts
= db88f5281_nand_parts
,
151 .nr_parts
= ARRAY_SIZE(db88f5281_nand_parts
),
157 static struct platform_device db88f5281_nand_flash
= {
158 .name
= "orion_nand",
161 .platform_data
= &db88f5281_nand_data
,
163 .resource
= &db88f5281_nand_resource
,
167 /*****************************************************************************
168 * 7-Segment on Device bus CS0
169 * Dummy counter every 2 sec
170 ****************************************************************************/
172 static void __iomem
*db88f5281_7seg
;
173 static struct timer_list db88f5281_timer
;
175 static void db88f5281_7seg_event(unsigned long data
)
177 static int count
= 0;
178 writel(0, db88f5281_7seg
+ (count
<< 4));
179 count
= (count
+ 1) & 7;
180 mod_timer(&db88f5281_timer
, jiffies
+ 2 * HZ
);
183 static int __init
db88f5281_7seg_init(void)
185 if (machine_is_db88f5281()) {
186 db88f5281_7seg
= ioremap(DB88F5281_7SEG_BASE
,
187 DB88F5281_7SEG_SIZE
);
188 if (!db88f5281_7seg
) {
189 printk(KERN_ERR
"Failed to ioremap db88f5281_7seg\n");
192 setup_timer(&db88f5281_timer
, db88f5281_7seg_event
, 0);
193 mod_timer(&db88f5281_timer
, jiffies
+ 2 * HZ
);
199 __initcall(db88f5281_7seg_init
);
201 /*****************************************************************************
203 ****************************************************************************/
205 void __init
db88f5281_pci_preinit(void)
210 * Configure PCI GPIO IRQ pins
212 pin
= DB88F5281_PCI_SLOT0_IRQ_PIN
;
213 if (gpio_request(pin
, "PCI Int1") == 0) {
214 if (gpio_direction_input(pin
) == 0) {
215 irq_set_irq_type(gpio_to_irq(pin
), IRQ_TYPE_LEVEL_LOW
);
217 printk(KERN_ERR
"db88f5281_pci_preinit faield to "
218 "set_irq_type pin %d\n", pin
);
222 printk(KERN_ERR
"db88f5281_pci_preinit failed to gpio_request %d\n", pin
);
225 pin
= DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN
;
226 if (gpio_request(pin
, "PCI Int2") == 0) {
227 if (gpio_direction_input(pin
) == 0) {
228 irq_set_irq_type(gpio_to_irq(pin
), IRQ_TYPE_LEVEL_LOW
);
230 printk(KERN_ERR
"db88f5281_pci_preinit faield "
231 "to set_irq_type pin %d\n", pin
);
235 printk(KERN_ERR
"db88f5281_pci_preinit failed to gpio_request %d\n", pin
);
239 static int __init
db88f5281_pci_map_irq(const struct pci_dev
*dev
, u8 slot
,
245 * Check for devices with hard-wired IRQs.
247 irq
= orion5x_pci_map_irq(dev
, slot
, pin
);
252 * PCI IRQs are connected via GPIOs.
254 switch (slot
- DB88F5281_PCI_SLOT0_OFFS
) {
256 return gpio_to_irq(DB88F5281_PCI_SLOT0_IRQ_PIN
);
259 return gpio_to_irq(DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN
);
265 static struct hw_pci db88f5281_pci __initdata
= {
267 .preinit
= db88f5281_pci_preinit
,
268 .swizzle
= pci_std_swizzle
,
269 .setup
= orion5x_pci_sys_setup
,
270 .scan
= orion5x_pci_sys_scan_bus
,
271 .map_irq
= db88f5281_pci_map_irq
,
274 static int __init
db88f5281_pci_init(void)
276 if (machine_is_db88f5281())
277 pci_common_init(&db88f5281_pci
);
282 subsys_initcall(db88f5281_pci_init
);
284 /*****************************************************************************
286 ****************************************************************************/
287 static struct mv643xx_eth_platform_data db88f5281_eth_data
= {
288 .phy_addr
= MV643XX_ETH_PHY_ADDR(8),
291 /*****************************************************************************
292 * RTC DS1339 on I2C bus
293 ****************************************************************************/
294 static struct i2c_board_info __initdata db88f5281_i2c_rtc
= {
295 I2C_BOARD_INFO("ds1339", 0x68),
298 /*****************************************************************************
300 ****************************************************************************/
301 static unsigned int db88f5281_mpp_modes
[] __initdata
= {
302 MPP0_GPIO
, /* USB Over Current */
303 MPP1_GPIO
, /* USB Vbat input */
304 MPP2_PCI_ARB
, /* PCI_REQn[2] */
305 MPP3_PCI_ARB
, /* PCI_GNTn[2] */
306 MPP4_PCI_ARB
, /* PCI_REQn[3] */
307 MPP5_PCI_ARB
, /* PCI_GNTn[3] */
308 MPP6_GPIO
, /* JP0, CON17.2 */
309 MPP7_GPIO
, /* JP1, CON17.1 */
310 MPP8_GPIO
, /* JP2, CON11.2 */
311 MPP9_GPIO
, /* JP3, CON11.3 */
312 MPP10_GPIO
, /* RTC int */
313 MPP11_GPIO
, /* Baud Rate Generator */
314 MPP12_GPIO
, /* PCI int 1 */
315 MPP13_GPIO
, /* PCI int 2 */
316 MPP14_NAND
, /* NAND_REn[2] */
317 MPP15_NAND
, /* NAND_WEn[2] */
318 MPP16_UART
, /* UART1_RX */
319 MPP17_UART
, /* UART1_TX */
320 MPP18_UART
, /* UART1_CTSn */
321 MPP19_UART
, /* UART1_RTSn */
325 static void __init
db88f5281_init(void)
328 * Basic Orion setup. Need to be called early.
332 orion5x_mpp_conf(db88f5281_mpp_modes
);
333 writel(0, MPP_DEV_CTRL
); /* DEV_D[31:16] */
336 * Configure peripherals.
338 orion5x_ehci0_init();
339 orion5x_eth_init(&db88f5281_eth_data
);
341 orion5x_uart0_init();
342 orion5x_uart1_init();
344 orion5x_setup_dev_boot_win(DB88F5281_NOR_BOOT_BASE
,
345 DB88F5281_NOR_BOOT_SIZE
);
346 platform_device_register(&db88f5281_boot_flash
);
348 orion5x_setup_dev0_win(DB88F5281_7SEG_BASE
, DB88F5281_7SEG_SIZE
);
350 orion5x_setup_dev1_win(DB88F5281_NOR_BASE
, DB88F5281_NOR_SIZE
);
351 platform_device_register(&db88f5281_nor_flash
);
353 orion5x_setup_dev2_win(DB88F5281_NAND_BASE
, DB88F5281_NAND_SIZE
);
354 platform_device_register(&db88f5281_nand_flash
);
356 i2c_register_board_info(0, &db88f5281_i2c_rtc
, 1);
359 MACHINE_START(DB88F5281
, "Marvell Orion-2 Development Board")
360 /* Maintainer: Tzachi Perelstein <tzachi@marvell.com> */
361 .atag_offset
= 0x100,
362 .init_machine
= db88f5281_init
,
363 .map_io
= orion5x_map_io
,
364 .init_early
= orion5x_init_early
,
365 .init_irq
= orion5x_init_irq
,
366 .timer
= &orion5x_timer
,