1 /* linux/arch/arm/mach-s3c2443/dma.c
3 * Copyright (c) 2007 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2443 DMA selection
8 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/sysdev.h>
18 #include <linux/serial_core.h>
23 #include <plat/dma-s3c24xx.h>
26 #include <plat/regs-serial.h>
27 #include <mach/regs-gpio.h>
28 #include <plat/regs-ac97.h>
29 #include <plat/regs-dma.h>
30 #include <mach/regs-mem.h>
31 #include <mach/regs-lcd.h>
32 #include <mach/regs-sdi.h>
33 #include <plat/regs-iis.h>
34 #include <plat/regs-spi.h>
37 [0] = (x) | DMA_CH_VALID, \
38 [1] = (x) | DMA_CH_VALID, \
39 [2] = (x) | DMA_CH_VALID, \
40 [3] = (x) | DMA_CH_VALID, \
41 [4] = (x) | DMA_CH_VALID, \
42 [5] = (x) | DMA_CH_VALID, \
45 static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings
[] = {
48 .channels
= MAP(S3C2443_DMAREQSEL_XDREQ0
),
52 .channels
= MAP(S3C2443_DMAREQSEL_XDREQ1
),
56 .channels
= MAP(S3C2443_DMAREQSEL_SDI
),
60 .channels
= MAP(S3C2443_DMAREQSEL_SPI0TX
),
64 .channels
= MAP(S3C2443_DMAREQSEL_SPI1TX
),
68 .channels
= MAP(S3C2443_DMAREQSEL_UART0_0
),
72 .channels
= MAP(S3C2443_DMAREQSEL_UART1_0
),
76 .channels
= MAP(S3C2443_DMAREQSEL_UART2_0
),
80 .channels
= MAP(S3C2443_DMAREQSEL_UART3_0
),
82 [DMACH_UART0_SRC2
] = {
84 .channels
= MAP(S3C2443_DMAREQSEL_UART0_1
),
86 [DMACH_UART1_SRC2
] = {
88 .channels
= MAP(S3C2443_DMAREQSEL_UART1_1
),
90 [DMACH_UART2_SRC2
] = {
92 .channels
= MAP(S3C2443_DMAREQSEL_UART2_1
),
94 [DMACH_UART3_SRC2
] = {
96 .channels
= MAP(S3C2443_DMAREQSEL_UART3_1
),
100 .channels
= MAP(S3C2443_DMAREQSEL_TIMER
),
104 .channels
= MAP(S3C2443_DMAREQSEL_I2SRX
),
108 .channels
= MAP(S3C2443_DMAREQSEL_I2STX
),
112 .channels
= MAP(S3C2443_DMAREQSEL_PCMIN
),
116 .channels
= MAP(S3C2443_DMAREQSEL_PCMOUT
),
120 .channels
= MAP(S3C2443_DMAREQSEL_MICIN
),
124 static void s3c2443_dma_select(struct s3c2410_dma_chan
*chan
,
125 struct s3c24xx_dma_map
*map
)
127 writel(map
->channels
[0] | S3C2443_DMAREQSEL_HW
,
128 chan
->regs
+ S3C2443_DMA_DMAREQSEL
);
131 static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel
= {
132 .select
= s3c2443_dma_select
,
134 .map
= s3c2443_dma_mappings
,
135 .map_size
= ARRAY_SIZE(s3c2443_dma_mappings
),
138 static int __init
s3c2443_dma_add(struct sys_device
*sysdev
)
140 s3c24xx_dma_init(6, IRQ_S3C2443_DMA0
, 0x100);
141 return s3c24xx_dma_init_map(&s3c2443_dma_sel
);
144 static struct sysdev_driver s3c2443_dma_driver
= {
145 .add
= s3c2443_dma_add
,
148 static int __init
s3c2443_dma_init(void)
150 return sysdev_driver_register(&s3c2443_sysclass
, &s3c2443_dma_driver
);
153 arch_initcall(s3c2443_dma_init
);