Merge remote-tracking branch 'moduleh/module.h-split'
[linux-2.6/next.git] / arch / arm / mach-s3c64xx / pm.c
blobb375cd5c47cb2ebe9f7b28ce2f7d0b6c0624ddc8
1 /* linux/arch/arm/plat-s3c64xx/pm.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * S3C64XX CPU PM support.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/suspend.h>
17 #include <linux/serial_core.h>
18 #include <linux/io.h>
19 #include <linux/gpio.h>
21 #include <mach/map.h>
22 #include <mach/irqs.h>
24 #include <plat/pm.h>
25 #include <plat/wakeup-mask.h>
27 #include <mach/regs-sys.h>
28 #include <mach/regs-gpio.h>
29 #include <mach/regs-clock.h>
30 #include <mach/regs-syscon-power.h>
31 #include <mach/regs-gpio-memport.h>
32 #include <mach/regs-modem.h>
34 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
35 void s3c_pm_debug_smdkled(u32 set, u32 clear)
37 unsigned long flags;
38 int i;
40 local_irq_save(flags);
41 for (i = 0; i < 4; i++) {
42 if (clear & (1 << i))
43 gpio_set_value(S3C64XX_GPN(12 + i), 0);
44 if (set & (1 << i))
45 gpio_set_value(S3C64XX_GPN(12 + i), 1);
47 local_irq_restore(flags);
49 #endif
51 static struct sleep_save core_save[] = {
52 SAVE_ITEM(S3C_APLL_LOCK),
53 SAVE_ITEM(S3C_MPLL_LOCK),
54 SAVE_ITEM(S3C_EPLL_LOCK),
55 SAVE_ITEM(S3C_CLK_SRC),
56 SAVE_ITEM(S3C_CLK_DIV0),
57 SAVE_ITEM(S3C_CLK_DIV1),
58 SAVE_ITEM(S3C_CLK_DIV2),
59 SAVE_ITEM(S3C_CLK_OUT),
60 SAVE_ITEM(S3C_HCLK_GATE),
61 SAVE_ITEM(S3C_PCLK_GATE),
62 SAVE_ITEM(S3C_SCLK_GATE),
63 SAVE_ITEM(S3C_MEM0_GATE),
65 SAVE_ITEM(S3C_EPLL_CON1),
66 SAVE_ITEM(S3C_EPLL_CON0),
68 SAVE_ITEM(S3C64XX_MEM0DRVCON),
69 SAVE_ITEM(S3C64XX_MEM1DRVCON),
71 #ifndef CONFIG_CPU_FREQ
72 SAVE_ITEM(S3C_APLL_CON),
73 SAVE_ITEM(S3C_MPLL_CON),
74 #endif
77 static struct sleep_save misc_save[] = {
78 SAVE_ITEM(S3C64XX_AHB_CON0),
79 SAVE_ITEM(S3C64XX_AHB_CON1),
80 SAVE_ITEM(S3C64XX_AHB_CON2),
82 SAVE_ITEM(S3C64XX_SPCON),
84 SAVE_ITEM(S3C64XX_MEM0CONSTOP),
85 SAVE_ITEM(S3C64XX_MEM1CONSTOP),
86 SAVE_ITEM(S3C64XX_MEM0CONSLP0),
87 SAVE_ITEM(S3C64XX_MEM0CONSLP1),
88 SAVE_ITEM(S3C64XX_MEM1CONSLP),
90 SAVE_ITEM(S3C64XX_SDMA_SEL),
91 SAVE_ITEM(S3C64XX_MODEM_MIFPCON),
94 void s3c_pm_configure_extint(void)
96 __raw_writel(s3c_irqwake_eintmask, S3C64XX_EINT_MASK);
99 void s3c_pm_restore_core(void)
101 __raw_writel(0, S3C64XX_EINT_MASK);
103 s3c_pm_debug_smdkled(1 << 2, 0);
105 s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
106 s3c_pm_do_restore(misc_save, ARRAY_SIZE(misc_save));
109 void s3c_pm_save_core(void)
111 s3c_pm_do_save(misc_save, ARRAY_SIZE(misc_save));
112 s3c_pm_do_save(core_save, ARRAY_SIZE(core_save));
115 /* since both s3c6400 and s3c6410 share the same sleep pm calls, we
116 * put the per-cpu code in here until any new cpu comes along and changes
117 * this.
120 static int s3c64xx_cpu_suspend(unsigned long arg)
122 unsigned long tmp;
124 /* set our standby method to sleep */
126 tmp = __raw_readl(S3C64XX_PWR_CFG);
127 tmp &= ~S3C64XX_PWRCFG_CFG_WFI_MASK;
128 tmp |= S3C64XX_PWRCFG_CFG_WFI_SLEEP;
129 __raw_writel(tmp, S3C64XX_PWR_CFG);
131 /* clear any old wakeup */
133 __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT),
134 S3C64XX_WAKEUP_STAT);
136 /* set the LED state to 0110 over sleep */
137 s3c_pm_debug_smdkled(3 << 1, 0xf);
139 /* issue the standby signal into the pm unit. Note, we
140 * issue a write-buffer drain just in case */
142 tmp = 0;
144 asm("b 1f\n\t"
145 ".align 5\n\t"
146 "1:\n\t"
147 "mcr p15, 0, %0, c7, c10, 5\n\t"
148 "mcr p15, 0, %0, c7, c10, 4\n\t"
149 "mcr p15, 0, %0, c7, c0, 4" :: "r" (tmp));
151 /* we should never get past here */
153 panic("sleep resumed to originator?");
156 /* mapping of interrupts to parts of the wakeup mask */
157 static struct samsung_wakeup_mask wake_irqs[] = {
158 { .irq = IRQ_RTC_ALARM, .bit = S3C64XX_PWRCFG_RTC_ALARM_DISABLE, },
159 { .irq = IRQ_RTC_TIC, .bit = S3C64XX_PWRCFG_RTC_TICK_DISABLE, },
160 { .irq = IRQ_PENDN, .bit = S3C64XX_PWRCFG_TS_DISABLE, },
161 { .irq = IRQ_HSMMC0, .bit = S3C64XX_PWRCFG_MMC0_DISABLE, },
162 { .irq = IRQ_HSMMC1, .bit = S3C64XX_PWRCFG_MMC1_DISABLE, },
163 { .irq = IRQ_HSMMC2, .bit = S3C64XX_PWRCFG_MMC2_DISABLE, },
164 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_BATF_DISABLE},
165 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE },
166 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_HSI_DISABLE },
167 { .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE },
170 static void s3c64xx_pm_prepare(void)
172 samsung_sync_wakemask(S3C64XX_PWR_CFG,
173 wake_irqs, ARRAY_SIZE(wake_irqs));
175 /* store address of resume. */
176 __raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0);
178 /* ensure previous wakeup state is cleared before sleeping */
179 __raw_writel(__raw_readl(S3C64XX_WAKEUP_STAT), S3C64XX_WAKEUP_STAT);
182 static int s3c64xx_pm_init(void)
184 pm_cpu_prep = s3c64xx_pm_prepare;
185 pm_cpu_sleep = s3c64xx_cpu_suspend;
186 pm_uart_udivslot = 1;
188 #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
189 gpio_request(S3C64XX_GPN(12), "DEBUG_LED0");
190 gpio_request(S3C64XX_GPN(13), "DEBUG_LED1");
191 gpio_request(S3C64XX_GPN(14), "DEBUG_LED2");
192 gpio_request(S3C64XX_GPN(15), "DEBUG_LED3");
193 gpio_direction_output(S3C64XX_GPN(12), 0);
194 gpio_direction_output(S3C64XX_GPN(13), 0);
195 gpio_direction_output(S3C64XX_GPN(14), 0);
196 gpio_direction_output(S3C64XX_GPN(15), 0);
197 #endif
199 return 0;
202 arch_initcall(s3c64xx_pm_init);