2 * linux/arch/arm/vfp/vfpmodule.c
4 * Copyright (C) 2004 ARM Limited.
5 * Written by Deep Blue Solutions Limited.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #include <linux/types.h>
12 #include <linux/cpu.h>
13 #include <linux/kernel.h>
14 #include <linux/notifier.h>
15 #include <linux/signal.h>
16 #include <linux/sched.h>
17 #include <linux/smp.h>
18 #include <linux/init.h>
20 #include <asm/cputype.h>
21 #include <asm/thread_notify.h>
28 * Our undef handlers (in entry.S)
30 void vfp_testing_entry(void);
31 void vfp_support_entry(void);
32 void vfp_null_entry(void);
34 void (*vfp_vector
)(void) = vfp_null_entry
;
38 * Used in startup: set to non-zero if VFP checks fail
39 * After startup, holds VFP architecture
41 unsigned int VFP_arch
;
44 * The pointer to the vfpstate structure of the thread which currently
45 * owns the context held in the VFP hardware, or NULL if the hardware
48 * For UP, this is sufficient to tell which thread owns the VFP context.
49 * However, for SMP, we also need to check the CPU number stored in the
50 * saved state too to catch migrations.
52 union vfp_state
*vfp_current_hw_state
[NR_CPUS
];
55 * Is 'thread's most up to date state stored in this CPUs hardware?
56 * Must be called from non-preemptible context.
58 static bool vfp_state_in_hw(unsigned int cpu
, struct thread_info
*thread
)
61 if (thread
->vfpstate
.hard
.cpu
!= cpu
)
64 return vfp_current_hw_state
[cpu
] == &thread
->vfpstate
;
68 * Force a reload of the VFP context from the thread structure. We do
69 * this by ensuring that access to the VFP hardware is disabled, and
70 * clear last_VFP_context. Must be called from non-preemptible context.
72 static void vfp_force_reload(unsigned int cpu
, struct thread_info
*thread
)
74 if (vfp_state_in_hw(cpu
, thread
)) {
75 fmxr(FPEXC
, fmrx(FPEXC
) & ~FPEXC_EN
);
76 vfp_current_hw_state
[cpu
] = NULL
;
79 thread
->vfpstate
.hard
.cpu
= NR_CPUS
;
84 * Per-thread VFP initialization.
86 static void vfp_thread_flush(struct thread_info
*thread
)
88 union vfp_state
*vfp
= &thread
->vfpstate
;
92 * Disable VFP to ensure we initialize it first. We must ensure
93 * that the modification of vfp_current_hw_state[] and hardware
94 * disable are done for the same CPU and without preemption.
96 * Do this first to ensure that preemption won't overwrite our
97 * state saving should access to the VFP be enabled at this point.
100 if (vfp_current_hw_state
[cpu
] == vfp
)
101 vfp_current_hw_state
[cpu
] = NULL
;
102 fmxr(FPEXC
, fmrx(FPEXC
) & ~FPEXC_EN
);
105 memset(vfp
, 0, sizeof(union vfp_state
));
107 vfp
->hard
.fpexc
= FPEXC_EN
;
108 vfp
->hard
.fpscr
= FPSCR_ROUND_NEAREST
;
110 vfp
->hard
.cpu
= NR_CPUS
;
114 static void vfp_thread_exit(struct thread_info
*thread
)
116 /* release case: Per-thread VFP cleanup. */
117 union vfp_state
*vfp
= &thread
->vfpstate
;
118 unsigned int cpu
= get_cpu();
120 if (vfp_current_hw_state
[cpu
] == vfp
)
121 vfp_current_hw_state
[cpu
] = NULL
;
125 static void vfp_thread_copy(struct thread_info
*thread
)
127 struct thread_info
*parent
= current_thread_info();
129 vfp_sync_hwstate(parent
);
130 thread
->vfpstate
= parent
->vfpstate
;
132 thread
->vfpstate
.hard
.cpu
= NR_CPUS
;
137 * When this function is called with the following 'cmd's, the following
138 * is true while this function is being run:
139 * THREAD_NOFTIFY_SWTICH:
140 * - the previously running thread will not be scheduled onto another CPU.
141 * - the next thread to be run (v) will not be running on another CPU.
142 * - thread->cpu is the local CPU number
143 * - not preemptible as we're called in the middle of a thread switch
144 * THREAD_NOTIFY_FLUSH:
145 * - the thread (v) will be running on the local CPU, so
146 * v === current_thread_info()
147 * - thread->cpu is the local CPU number at the time it is accessed,
148 * but may change at any time.
149 * - we could be preempted if tree preempt rcu is enabled, so
150 * it is unsafe to use thread->cpu.
152 * - the thread (v) will be running on the local CPU, so
153 * v === current_thread_info()
154 * - thread->cpu is the local CPU number at the time it is accessed,
155 * but may change at any time.
156 * - we could be preempted if tree preempt rcu is enabled, so
157 * it is unsafe to use thread->cpu.
159 static int vfp_notifier(struct notifier_block
*self
, unsigned long cmd
, void *v
)
161 struct thread_info
*thread
= v
;
168 case THREAD_NOTIFY_SWITCH
:
175 * On SMP, if VFP is enabled, save the old state in
176 * case the thread migrates to a different CPU. The
177 * restoring is done lazily.
179 if ((fpexc
& FPEXC_EN
) && vfp_current_hw_state
[cpu
])
180 vfp_save_state(vfp_current_hw_state
[cpu
], fpexc
);
184 * Always disable VFP so we can lazily save/restore the
187 fmxr(FPEXC
, fpexc
& ~FPEXC_EN
);
190 case THREAD_NOTIFY_FLUSH
:
191 vfp_thread_flush(thread
);
194 case THREAD_NOTIFY_EXIT
:
195 vfp_thread_exit(thread
);
198 case THREAD_NOTIFY_COPY
:
199 vfp_thread_copy(thread
);
206 static struct notifier_block vfp_notifier_block
= {
207 .notifier_call
= vfp_notifier
,
211 * Raise a SIGFPE for the current process.
212 * sicode describes the signal being raised.
214 static void vfp_raise_sigfpe(unsigned int sicode
, struct pt_regs
*regs
)
218 memset(&info
, 0, sizeof(info
));
220 info
.si_signo
= SIGFPE
;
221 info
.si_code
= sicode
;
222 info
.si_addr
= (void __user
*)(instruction_pointer(regs
) - 4);
225 * This is the same as NWFPE, because it's not clear what
228 current
->thread
.error_code
= 0;
229 current
->thread
.trap_no
= 6;
231 send_sig_info(SIGFPE
, &info
, current
);
234 static void vfp_panic(char *reason
, u32 inst
)
238 printk(KERN_ERR
"VFP: Error: %s\n", reason
);
239 printk(KERN_ERR
"VFP: EXC 0x%08x SCR 0x%08x INST 0x%08x\n",
240 fmrx(FPEXC
), fmrx(FPSCR
), inst
);
241 for (i
= 0; i
< 32; i
+= 2)
242 printk(KERN_ERR
"VFP: s%2u: 0x%08x s%2u: 0x%08x\n",
243 i
, vfp_get_float(i
), i
+1, vfp_get_float(i
+1));
247 * Process bitmask of exception conditions.
249 static void vfp_raise_exceptions(u32 exceptions
, u32 inst
, u32 fpscr
, struct pt_regs
*regs
)
253 pr_debug("VFP: raising exceptions %08x\n", exceptions
);
255 if (exceptions
== VFP_EXCEPTION_ERROR
) {
256 vfp_panic("unhandled bounce", inst
);
257 vfp_raise_sigfpe(0, regs
);
262 * If any of the status flags are set, update the FPSCR.
263 * Comparison instructions always return at least one of
266 if (exceptions
& (FPSCR_N
|FPSCR_Z
|FPSCR_C
|FPSCR_V
))
267 fpscr
&= ~(FPSCR_N
|FPSCR_Z
|FPSCR_C
|FPSCR_V
);
273 #define RAISE(stat,en,sig) \
274 if (exceptions & stat && fpscr & en) \
278 * These are arranged in priority order, least to highest.
280 RAISE(FPSCR_DZC
, FPSCR_DZE
, FPE_FLTDIV
);
281 RAISE(FPSCR_IXC
, FPSCR_IXE
, FPE_FLTRES
);
282 RAISE(FPSCR_UFC
, FPSCR_UFE
, FPE_FLTUND
);
283 RAISE(FPSCR_OFC
, FPSCR_OFE
, FPE_FLTOVF
);
284 RAISE(FPSCR_IOC
, FPSCR_IOE
, FPE_FLTINV
);
287 vfp_raise_sigfpe(si_code
, regs
);
291 * Emulate a VFP instruction.
293 static u32
vfp_emulate_instruction(u32 inst
, u32 fpscr
, struct pt_regs
*regs
)
295 u32 exceptions
= VFP_EXCEPTION_ERROR
;
297 pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst
, fpscr
);
299 if (INST_CPRTDO(inst
)) {
300 if (!INST_CPRT(inst
)) {
304 if (vfp_single(inst
)) {
305 exceptions
= vfp_single_cpdo(inst
, fpscr
);
307 exceptions
= vfp_double_cpdo(inst
, fpscr
);
311 * A CPRT instruction can not appear in FPINST2, nor
312 * can it cause an exception. Therefore, we do not
313 * have to emulate it.
318 * A CPDT instruction can not appear in FPINST2, nor can
319 * it cause an exception. Therefore, we do not have to
323 return exceptions
& ~VFP_NAN_FLAG
;
327 * Package up a bounce condition.
329 void VFP_bounce(u32 trigger
, u32 fpexc
, struct pt_regs
*regs
)
331 u32 fpscr
, orig_fpscr
, fpsid
, exceptions
;
333 pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger
, fpexc
);
336 * At this point, FPEXC can have the following configuration:
339 * 0 1 x - synchronous exception
340 * 1 x 0 - asynchronous exception
341 * 1 x 1 - sychronous on VFP subarch 1 and asynchronous on later
342 * 0 0 1 - synchronous on VFP9 (non-standard subarch 1
343 * implementation), undefined otherwise
345 * Clear various bits and enable access to the VFP so we can
348 fmxr(FPEXC
, fpexc
& ~(FPEXC_EX
|FPEXC_DEX
|FPEXC_FP2V
|FPEXC_VV
|FPEXC_TRAP_MASK
));
351 orig_fpscr
= fpscr
= fmrx(FPSCR
);
354 * Check for the special VFP subarch 1 and FPSCR.IXE bit case
356 if ((fpsid
& FPSID_ARCH_MASK
) == (1 << FPSID_ARCH_BIT
)
357 && (fpscr
& FPSCR_IXE
)) {
359 * Synchronous exception, emulate the trigger instruction
364 if (fpexc
& FPEXC_EX
) {
365 #ifndef CONFIG_CPU_FEROCEON
367 * Asynchronous exception. The instruction is read from FPINST
368 * and the interrupted instruction has to be restarted.
370 trigger
= fmrx(FPINST
);
373 } else if (!(fpexc
& FPEXC_DEX
)) {
375 * Illegal combination of bits. It can be caused by an
376 * unallocated VFP instruction but with FPSCR.IXE set and not
379 vfp_raise_exceptions(VFP_EXCEPTION_ERROR
, trigger
, fpscr
, regs
);
384 * Modify fpscr to indicate the number of iterations remaining.
385 * If FPEXC.EX is 0, FPEXC.DEX is 1 and the FPEXC.VV bit indicates
386 * whether FPEXC.VECITR or FPSCR.LEN is used.
388 if (fpexc
& (FPEXC_EX
| FPEXC_VV
)) {
391 len
= fpexc
+ (1 << FPEXC_LENGTH_BIT
);
393 fpscr
&= ~FPSCR_LENGTH_MASK
;
394 fpscr
|= (len
& FPEXC_LENGTH_MASK
) << (FPSCR_LENGTH_BIT
- FPEXC_LENGTH_BIT
);
398 * Handle the first FP instruction. We used to take note of the
399 * FPEXC bounce reason, but this appears to be unreliable.
400 * Emulate the bounced instruction instead.
402 exceptions
= vfp_emulate_instruction(trigger
, fpscr
, regs
);
404 vfp_raise_exceptions(exceptions
, trigger
, orig_fpscr
, regs
);
407 * If there isn't a second FP instruction, exit now. Note that
408 * the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
410 if (fpexc
^ (FPEXC_EX
| FPEXC_FP2V
))
414 * The barrier() here prevents fpinst2 being read
415 * before the condition above.
418 trigger
= fmrx(FPINST2
);
421 exceptions
= vfp_emulate_instruction(trigger
, orig_fpscr
, regs
);
423 vfp_raise_exceptions(exceptions
, trigger
, orig_fpscr
, regs
);
428 static void vfp_enable(void *unused
)
430 u32 access
= get_copro_access();
433 * Enable full access to VFP (cp10 and cp11)
435 set_copro_access(access
| CPACC_FULL(10) | CPACC_FULL(11));
439 #include <linux/syscore_ops.h>
441 static int vfp_pm_suspend(void)
443 struct thread_info
*ti
= current_thread_info();
444 u32 fpexc
= fmrx(FPEXC
);
446 /* if vfp is on, then save state for resumption */
447 if (fpexc
& FPEXC_EN
) {
448 printk(KERN_DEBUG
"%s: saving vfp state\n", __func__
);
449 vfp_save_state(&ti
->vfpstate
, fpexc
);
451 /* disable, just in case */
452 fmxr(FPEXC
, fmrx(FPEXC
) & ~FPEXC_EN
);
455 /* clear any information we had about last context state */
456 memset(vfp_current_hw_state
, 0, sizeof(vfp_current_hw_state
));
461 static void vfp_pm_resume(void)
463 /* ensure we have access to the vfp */
466 /* and disable it to ensure the next usage restores the state */
467 fmxr(FPEXC
, fmrx(FPEXC
) & ~FPEXC_EN
);
470 static struct syscore_ops vfp_pm_syscore_ops
= {
471 .suspend
= vfp_pm_suspend
,
472 .resume
= vfp_pm_resume
,
475 static void vfp_pm_init(void)
477 register_syscore_ops(&vfp_pm_syscore_ops
);
481 static inline void vfp_pm_init(void) { }
482 #endif /* CONFIG_PM */
485 * Ensure that the VFP state stored in 'thread->vfpstate' is up to date
486 * with the hardware state.
488 void vfp_sync_hwstate(struct thread_info
*thread
)
490 unsigned int cpu
= get_cpu();
492 if (vfp_state_in_hw(cpu
, thread
)) {
493 u32 fpexc
= fmrx(FPEXC
);
496 * Save the last VFP state on this CPU.
498 fmxr(FPEXC
, fpexc
| FPEXC_EN
);
499 vfp_save_state(&thread
->vfpstate
, fpexc
| FPEXC_EN
);
506 /* Ensure that the thread reloads the hardware VFP state on the next use. */
507 void vfp_flush_hwstate(struct thread_info
*thread
)
509 unsigned int cpu
= get_cpu();
511 vfp_force_reload(cpu
, thread
);
517 * VFP hardware can lose all context when a CPU goes offline.
518 * As we will be running in SMP mode with CPU hotplug, we will save the
519 * hardware state at every thread switch. We clear our held state when
520 * a CPU has been killed, indicating that the VFP hardware doesn't contain
521 * a threads VFP state. When a CPU starts up, we re-enable access to the
524 * Both CPU_DYING and CPU_STARTING are called on the CPU which
525 * is being offlined/onlined.
527 static int vfp_hotplug(struct notifier_block
*b
, unsigned long action
,
530 if (action
== CPU_DYING
|| action
== CPU_DYING_FROZEN
) {
531 vfp_force_reload((long)hcpu
, current_thread_info());
532 } else if (action
== CPU_STARTING
|| action
== CPU_STARTING_FROZEN
)
538 * VFP support code initialisation.
540 static int __init
vfp_init(void)
543 unsigned int cpu_arch
= cpu_architecture();
545 if (cpu_arch
>= CPU_ARCH_ARMv6
)
549 * First check that there is a VFP that we can use.
550 * The handler is already setup to just log calls, so
551 * we just need to read the VFPSID register.
553 vfp_vector
= vfp_testing_entry
;
555 vfpsid
= fmrx(FPSID
);
557 vfp_vector
= vfp_null_entry
;
559 printk(KERN_INFO
"VFP support v0.3: ");
561 printk("not present\n");
562 else if (vfpsid
& FPSID_NODOUBLE
) {
563 printk("no double precision support\n");
565 hotcpu_notifier(vfp_hotplug
, 0);
567 smp_call_function(vfp_enable
, NULL
, 1);
569 VFP_arch
= (vfpsid
& FPSID_ARCH_MASK
) >> FPSID_ARCH_BIT
; /* Extract the architecture version */
570 printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
571 (vfpsid
& FPSID_IMPLEMENTER_MASK
) >> FPSID_IMPLEMENTER_BIT
,
572 (vfpsid
& FPSID_ARCH_MASK
) >> FPSID_ARCH_BIT
,
573 (vfpsid
& FPSID_PART_MASK
) >> FPSID_PART_BIT
,
574 (vfpsid
& FPSID_VARIANT_MASK
) >> FPSID_VARIANT_BIT
,
575 (vfpsid
& FPSID_REV_MASK
) >> FPSID_REV_BIT
);
577 vfp_vector
= vfp_support_entry
;
579 thread_register_notifier(&vfp_notifier_block
);
583 * We detected VFP, and the support code is
584 * in place; report VFP support to userspace.
586 elf_hwcap
|= HWCAP_VFP
;
589 elf_hwcap
|= HWCAP_VFPv3
;
592 * Check for VFPv3 D16. CPUs in this configuration
593 * only have 16 x 64bit registers.
595 if (((fmrx(MVFR0
) & MVFR0_A_SIMD_MASK
)) == 1)
596 elf_hwcap
|= HWCAP_VFPv3D16
;
600 * Check for the presence of the Advanced SIMD
601 * load/store instructions, integer and single
602 * precision floating point operations. Only check
603 * for NEON if the hardware has the MVFR registers.
605 if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
607 if ((fmrx(MVFR1
) & 0x000fff00) == 0x00011100)
608 elf_hwcap
|= HWCAP_NEON
;
610 if ((fmrx(MVFR1
) & 0xf0000000) == 0x10000000)
611 elf_hwcap
|= HWCAP_VFPv4
;
617 late_initcall(vfp_init
);