arch/avr32/mach-at32ap/pio.c

   1 /*
   2  * Atmel PIO2 Port Multiplexer support
   3  *
   4  * Copyright (C) 2004-2006 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/clk.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/fs.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/irq.h>
  16
  17 #include <asm/gpio.h>
  18 #include <asm/io.h>
  19
  20 #include <mach/portmux.h>
  21
  22 #include "pio.h"
  23
  24 #define MAX_NR_PIO_DEVICES              8
  25
  26 struct pio_device {
  27         struct gpio_chip chip;
  28         void __iomem *regs;
  29         const struct platform_device *pdev;
  30         struct clk *clk;
  31         u32 pinmux_mask;
  32         char name[8];
  33 };
  34
  35 static struct pio_device pio_dev[MAX_NR_PIO_DEVICES];
  36
  37 static struct pio_device *gpio_to_pio(unsigned int gpio)
  38 {
  39         struct pio_device *pio;
  40         unsigned int index;
  41
  42         index = gpio >> 5;
  43         if (index >= MAX_NR_PIO_DEVICES)
  44                 return NULL;
  45         pio = &pio_dev[index];
  46         if (!pio->regs)
  47                 return NULL;
  48
  49         return pio;
  50 }
  51
  52 /* Pin multiplexing API */
  53 static DEFINE_SPINLOCK(pio_lock);
  54
  55 void __init at32_select_periph(unsigned int port, u32 pin_mask,
  56                                unsigned int periph, unsigned long flags)
  57 {
  58         struct pio_device *pio;
  59
  60         /* assign and verify pio */
  61         pio = gpio_to_pio(port);
  62         if (unlikely(!pio)) {
  63                 printk(KERN_WARNING "pio: invalid port %u\n", port);
  64                 goto fail;
  65         }
  66
  67         /* Test if any of the requested pins is already muxed */
  68         spin_lock(&pio_lock);
  69         if (unlikely(pio->pinmux_mask & pin_mask)) {
  70                 printk(KERN_WARNING "%s: pin(s) busy (requested 0x%x, busy 0x%x)\n",
  71                        pio->name, pin_mask, pio->pinmux_mask & pin_mask);
  72                 spin_unlock(&pio_lock);
  73                 goto fail;
  74         }
  75
  76         pio->pinmux_mask |= pin_mask;
  77
  78         /* enable pull ups */
  79         pio_writel(pio, PUER, pin_mask);
  80
  81         /* select either peripheral A or B */
  82         if (periph)
  83                 pio_writel(pio, BSR, pin_mask);
  84         else
  85                 pio_writel(pio, ASR, pin_mask);
  86
  87         /* enable peripheral control */
  88         pio_writel(pio, PDR, pin_mask);
  89
  90         /* Disable pull ups if not requested. */
  91         if (!(flags & AT32_GPIOF_PULLUP))
  92                 pio_writel(pio, PUDR, pin_mask);
  93
  94         spin_unlock(&pio_lock);
  95
  96         return;
  97
  98 fail:
  99         dump_stack();
 100 }
 101
 102 void __init at32_select_gpio(unsigned int pin, unsigned long flags)
 103 {
 104         struct pio_device *pio;
 105         unsigned int pin_index = pin & 0x1f;
 106         u32 mask = 1 << pin_index;
 107
 108         pio = gpio_to_pio(pin);
 109         if (unlikely(!pio)) {
 110                 printk("pio: invalid pin %u\n", pin);
 111                 goto fail;
 112         }
 113
 114         if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
 115                 printk("%s: pin %u is busy\n", pio->name, pin_index);
 116                 goto fail;
 117         }
 118
 119         if (flags & AT32_GPIOF_OUTPUT) {
 120                 if (flags & AT32_GPIOF_HIGH)
 121                         pio_writel(pio, SODR, mask);
 122                 else
 123                         pio_writel(pio, CODR, mask);
 124                 if (flags & AT32_GPIOF_MULTIDRV)
 125                         pio_writel(pio, MDER, mask);
 126                 else
 127                         pio_writel(pio, MDDR, mask);
 128                 pio_writel(pio, PUDR, mask);
 129                 pio_writel(pio, OER, mask);
 130         } else {
 131                 if (flags & AT32_GPIOF_PULLUP)
 132                         pio_writel(pio, PUER, mask);
 133                 else
 134                         pio_writel(pio, PUDR, mask);
 135                 if (flags & AT32_GPIOF_DEGLITCH)
 136                         pio_writel(pio, IFER, mask);
 137                 else
 138                         pio_writel(pio, IFDR, mask);
 139                 pio_writel(pio, ODR, mask);
 140         }
 141
 142         pio_writel(pio, PER, mask);
 143
 144         return;
 145
 146 fail:
 147         dump_stack();
 148 }
 149
 150 /*
 151  * Undo a previous pin reservation. Will not affect the hardware
 152  * configuration.
 153  */
 154 void at32_deselect_pin(unsigned int pin)
 155 {
 156         struct pio_device *pio;
 157         unsigned int pin_index = pin & 0x1f;
 158
 159         pio = gpio_to_pio(pin);
 160         if (unlikely(!pio)) {
 161                 printk("pio: invalid pin %u\n", pin);
 162                 dump_stack();
 163                 return;
 164         }
 165
 166         clear_bit(pin_index, &pio->pinmux_mask);
 167 }
 168
 169 /* Reserve a pin, preventing anyone else from changing its configuration. */
 170 void __init at32_reserve_pin(unsigned int port, u32 pin_mask)
 171 {
 172         struct pio_device *pio;
 173
 174         /* assign and verify pio */
 175         pio = gpio_to_pio(port);
 176         if (unlikely(!pio)) {
 177                 printk(KERN_WARNING "pio: invalid port %u\n", port);
 178                 goto fail;
 179         }
 180
 181         /* Test if any of the requested pins is already muxed */
 182         spin_lock(&pio_lock);
 183         if (unlikely(pio->pinmux_mask & pin_mask)) {
 184                 printk(KERN_WARNING "%s: pin(s) busy (req. 0x%x, busy 0x%x)\n",
 185                        pio->name, pin_mask, pio->pinmux_mask & pin_mask);
 186                 spin_unlock(&pio_lock);
 187                 goto fail;
 188         }
 189
 190         /* Reserve pins */
 191         pio->pinmux_mask |= pin_mask;
 192         spin_unlock(&pio_lock);
 193         return;
 194
 195 fail:
 196         dump_stack();
 197 }
 198
 199 /*--------------------------------------------------------------------------*/
 200
 201 /* GPIO API */
 202
 203 static int direction_input(struct gpio_chip *chip, unsigned offset)
 204 {
 205         struct pio_device *pio = container_of(chip, struct pio_device, chip);
 206         u32 mask = 1 << offset;
 207
 208         if (!(pio_readl(pio, PSR) & mask))
 209                 return -EINVAL;
 210
 211         pio_writel(pio, ODR, mask);
 212         return 0;
 213 }
 214
 215 static int gpio_get(struct gpio_chip *chip, unsigned offset)
 216 {
 217         struct pio_device *pio = container_of(chip, struct pio_device, chip);
 218
 219         return (pio_readl(pio, PDSR) >> offset) & 1;
 220 }
 221
 222 static void gpio_set(struct gpio_chip *chip, unsigned offset, int value);
 223
 224 static int direction_output(struct gpio_chip *chip, unsigned offset, int value)
 225 {
 226         struct pio_device *pio = container_of(chip, struct pio_device, chip);
 227         u32 mask = 1 << offset;
 228
 229         if (!(pio_readl(pio, PSR) & mask))
 230                 return -EINVAL;
 231
 232         gpio_set(chip, offset, value);
 233         pio_writel(pio, OER, mask);
 234         return 0;
 235 }
 236
 237 static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 238 {
 239         struct pio_device *pio = container_of(chip, struct pio_device, chip);
 240         u32 mask = 1 << offset;
 241
 242         if (value)
 243                 pio_writel(pio, SODR, mask);
 244         else
 245                 pio_writel(pio, CODR, mask);
 246 }
 247
 248 /*--------------------------------------------------------------------------*/
 249
 250 /* GPIO IRQ support */
 251
 252 static void gpio_irq_mask(struct irq_data *d)
 253 {
 254         unsigned                gpio = irq_to_gpio(d->irq);
 255         struct pio_device       *pio = &pio_dev[gpio >> 5];
 256
 257         pio_writel(pio, IDR, 1 << (gpio & 0x1f));
 258 }
 259
 260 static void gpio_irq_unmask(struct irq_data *d)
 261 {
 262         unsigned                gpio = irq_to_gpio(d->irq);
 263         struct pio_device       *pio = &pio_dev[gpio >> 5];
 264
 265         pio_writel(pio, IER, 1 << (gpio & 0x1f));
 266 }
 267
 268 static int gpio_irq_type(struct irq_data *d, unsigned type)
 269 {
 270         if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
 271                 return -EINVAL;
 272
 273         return 0;
 274 }
 275
 276 static struct irq_chip gpio_irqchip = {
 277         .name           = "gpio",
 278         .irq_mask       = gpio_irq_mask,
 279         .irq_unmask     = gpio_irq_unmask,
 280         .irq_set_type   = gpio_irq_type,
 281 };
 282
 283 static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 284 {
 285         struct pio_device       *pio = irq_desc_get_chip_data(desc);
 286         unsigned                gpio_irq;
 287
 288         gpio_irq = (unsigned) irq_get_handler_data(irq);
 289         for (;;) {
 290                 u32             isr;
 291
 292                 /* ack pending GPIO interrupts */
 293                 isr = pio_readl(pio, ISR) & pio_readl(pio, IMR);
 294                 if (!isr)
 295                         break;
 296                 do {
 297                         int i;
 298
 299                         i = ffs(isr) - 1;
 300                         isr &= ~(1 << i);
 301
 302                         i += gpio_irq;
 303                         generic_handle_irq(i);
 304                 } while (isr);
 305         }
 306 }
 307
 308 static void __init
 309 gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
 310 {
 311         unsigned        i;
 312
 313         irq_set_chip_data(irq, pio);
 314         irq_set_handler_data(irq, (void *)gpio_irq);
 315
 316         for (i = 0; i < 32; i++, gpio_irq++) {
 317                 irq_set_chip_data(gpio_irq, pio);
 318                 irq_set_chip_and_handler(gpio_irq, &gpio_irqchip,
 319                                          handle_simple_irq);
 320         }
 321
 322         irq_set_chained_handler(irq, gpio_irq_handler);
 323 }
 324
 325 /*--------------------------------------------------------------------------*/
 326
 327 #ifdef CONFIG_DEBUG_FS
 328
 329 #include <linux/seq_file.h>
 330 #include <linux/export.h>
 331
 332 /*
 333  * This shows more info than the generic gpio dump code:
 334  * pullups, deglitching, open drain drive.
 335  */
 336 static void pio_bank_show(struct seq_file *s, struct gpio_chip *chip)
 337 {
 338         struct pio_device *pio = container_of(chip, struct pio_device, chip);
 339         u32                     psr, osr, imr, pdsr, pusr, ifsr, mdsr;
 340         unsigned                i;
 341         u32                     mask;
 342         char                    bank;
 343
 344         psr = pio_readl(pio, PSR);
 345         osr = pio_readl(pio, OSR);
 346         imr = pio_readl(pio, IMR);
 347         pdsr = pio_readl(pio, PDSR);
 348         pusr = pio_readl(pio, PUSR);
 349         ifsr = pio_readl(pio, IFSR);
 350         mdsr = pio_readl(pio, MDSR);
 351
 352         bank = 'A' + pio->pdev->id;
 353
 354         for (i = 0, mask = 1; i < 32; i++, mask <<= 1) {
 355                 const char *label;
 356
 357                 label = gpiochip_is_requested(chip, i);
 358                 if (!label && (imr & mask))
 359                         label = "[irq]";
 360                 if (!label)
 361                         continue;
 362
 363                 seq_printf(s, " gpio-%-3d P%c%-2d (%-12s) %s %s %s",
 364                         chip->base + i, bank, i,
 365                         label,
 366                         (osr & mask) ? "out" : "in ",
 367                         (mask & pdsr) ? "hi" : "lo",
 368                         (mask & pusr) ? "  " : "up");
 369                 if (ifsr & mask)
 370                         seq_printf(s, " deglitch");
 371                 if ((osr & mdsr) & mask)
 372                         seq_printf(s, " open-drain");
 373                 if (imr & mask)
 374                         seq_printf(s, " irq-%d edge-both",
 375                                 gpio_to_irq(chip->base + i));
 376                 seq_printf(s, "\n");
 377         }
 378 }
 379
 380 #else
 381 #define pio_bank_show   NULL
 382 #endif
 383
 384
 385 /*--------------------------------------------------------------------------*/
 386
 387 static int __init pio_probe(struct platform_device *pdev)
 388 {
 389         struct pio_device *pio = NULL;
 390         int irq = platform_get_irq(pdev, 0);
 391         int gpio_irq_base = GPIO_IRQ_BASE + pdev->id * 32;
 392
 393         BUG_ON(pdev->id >= MAX_NR_PIO_DEVICES);
 394         pio = &pio_dev[pdev->id];
 395         BUG_ON(!pio->regs);
 396
 397         pio->chip.label = pio->name;
 398         pio->chip.base = pdev->id * 32;
 399         pio->chip.ngpio = 32;
 400         pio->chip.dev = &pdev->dev;
 401         pio->chip.owner = THIS_MODULE;
 402
 403         pio->chip.direction_input = direction_input;
 404         pio->chip.get = gpio_get;
 405         pio->chip.direction_output = direction_output;
 406         pio->chip.set = gpio_set;
 407         pio->chip.dbg_show = pio_bank_show;
 408
 409         gpiochip_add(&pio->chip);
 410
 411         gpio_irq_setup(pio, irq, gpio_irq_base);
 412
 413         platform_set_drvdata(pdev, pio);
 414
 415         printk(KERN_DEBUG "%s: base 0x%p, irq %d chains %d..%d\n",
 416                pio->name, pio->regs, irq, gpio_irq_base, gpio_irq_base + 31);
 417
 418         return 0;
 419 }
 420
 421 static struct platform_driver pio_driver = {
 422         .driver         = {
 423                 .name           = "pio",
 424         },
 425 };
 426
 427 static int __init pio_init(void)
 428 {
 429         return platform_driver_probe(&pio_driver, pio_probe);
 430 }
 431 postcore_initcall(pio_init);
 432
 433 void __init at32_init_pio(struct platform_device *pdev)
 434 {
 435         struct resource *regs;
 436         struct pio_device *pio;
 437
 438         if (pdev->id > MAX_NR_PIO_DEVICES) {
 439                 dev_err(&pdev->dev, "only %d PIO devices supported\n",
 440                         MAX_NR_PIO_DEVICES);
 441                 return;
 442         }
 443
 444         pio = &pio_dev[pdev->id];
 445         snprintf(pio->name, sizeof(pio->name), "pio%d", pdev->id);
 446
 447         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 448         if (!regs) {
 449                 dev_err(&pdev->dev, "no mmio resource defined\n");
 450                 return;
 451         }
 452
 453         pio->clk = clk_get(&pdev->dev, "mck");
 454         if (IS_ERR(pio->clk))
 455                 /*
 456                  * This is a fatal error, but if we continue we might
 457                  * be so lucky that we manage to initialize the
 458                  * console and display this message...
 459                  */
 460                 dev_err(&pdev->dev, "no mck clock defined\n");
 461         else
 462                 clk_enable(pio->clk);
 463
 464         pio->pdev = pdev;
 465         pio->regs = ioremap(regs->start, resource_size(regs));
 466
 467         /* start with irqs disabled and acked */
 468         pio_writel(pio, IDR, ~0UL);
 469         (void) pio_readl(pio, ISR);
 470 }