2 * PATA driver for AT91SAM9260 Static Memory Controller
3 * with CompactFlash interface in True IDE mode
5 * Copyright (C) 2009 Matyukevich Sergey
9 * * generic platform driver by Paul Mundt: drivers/ata/pata_platform.c
10 * * pata_at32 driver by Kristoffer Nyborg Gregertsen
11 * * at91_ide driver by Stanislaw Gruszka
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License version 2
15 * as published by the Free Software Foundation.
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/blkdev.h>
23 #include <linux/gfp.h>
24 #include <scsi/scsi_host.h>
25 #include <linux/ata.h>
26 #include <linux/clk.h>
27 #include <linux/libata.h>
28 #include <linux/platform_device.h>
29 #include <linux/ata_platform.h>
31 #include <mach/at91sam9_smc.h>
32 #include <mach/board.h>
35 #define DRV_NAME "pata_at91"
36 #define DRV_VERSION "0.3"
38 #define CF_IDE_OFFSET 0x00c00000
39 #define CF_ALT_IDE_OFFSET 0x00e00000
40 #define CF_IDE_RES_SIZE 0x08
41 #define CS_PULSE_MAXIMUM 319
43 #define ER_SMC_RECALC 2
45 struct at91_ide_info
{
49 void __iomem
*ide_addr
;
50 void __iomem
*alt_addr
;
54 * struct smc_range - range of valid values for SMC register.
62 * adjust_smc_value - adjust value for one of SMC registers.
63 * @value: adjusted value
64 * @range: array of SMC ranges with valid values
65 * @size: SMC ranges array size
67 * This returns the difference between input and output value or negative
68 * in case of invalid input value.
69 * If negative returned, then output value = maximal possible from ranges.
71 static int adjust_smc_value(int *value
, struct smc_range
*range
, int size
)
73 int maximum
= (range
+ size
- 1)->max
;
77 if (*value
< range
->min
) {
78 remainder
= range
->min
- *value
;
79 *value
= range
->min
; /* nearest valid value */
81 } else if ((range
->min
<= *value
) && (*value
<= range
->max
))
88 return -1; /* invalid value */
92 * calc_smc_vals - calculate SMC register values
94 * @setup: SMC_SETUP register value
95 * @pulse: SMC_PULSE register value
96 * @cycle: SMC_CYCLE register value
98 * This returns negative in case of invalid values for SMC registers:
99 * -ER_SMC_RECALC - recalculation required for SMC values,
100 * -ER_SMC_CALC - calculation failed (invalid input values).
102 * SMC use special coding scheme, see "Coding and Range of Timing
103 * Parameters" table from AT91SAM9 datasheets.
105 * SMC_SETUP = 128*setup[5] + setup[4:0]
106 * SMC_PULSE = 256*pulse[6] + pulse[5:0]
107 * SMC_CYCLE = 256*cycle[8:7] + cycle[6:0]
109 static int calc_smc_vals(struct device
*dev
,
110 int *setup
, int *pulse
, int *cycle
, int *cs_pulse
)
114 struct smc_range range_setup
[] = { /* SMC_SETUP valid values */
115 {.min
= 0, .max
= 31}, /* first range */
116 {.min
= 128, .max
= 159} /* second range */
118 struct smc_range range_pulse
[] = { /* SMC_PULSE valid values */
119 {.min
= 0, .max
= 63}, /* first range */
120 {.min
= 256, .max
= 319} /* second range */
122 struct smc_range range_cycle
[] = { /* SMC_CYCLE valid values */
123 {.min
= 0, .max
= 127}, /* first range */
124 {.min
= 256, .max
= 383}, /* second range */
125 {.min
= 512, .max
= 639}, /* third range */
126 {.min
= 768, .max
= 895} /* fourth range */
129 ret_val
= adjust_smc_value(setup
, range_setup
, ARRAY_SIZE(range_setup
));
131 dev_warn(dev
, "maximal SMC Setup value\n");
135 ret_val
= adjust_smc_value(pulse
, range_pulse
, ARRAY_SIZE(range_pulse
));
137 dev_warn(dev
, "maximal SMC Pulse value\n");
141 ret_val
= adjust_smc_value(cycle
, range_cycle
, ARRAY_SIZE(range_cycle
));
143 dev_warn(dev
, "maximal SMC Cycle value\n");
146 if (*cs_pulse
> CS_PULSE_MAXIMUM
) {
147 dev_err(dev
, "unable to calculate valid SMC settings\n");
151 ret_val
= adjust_smc_value(cs_pulse
, range_pulse
,
152 ARRAY_SIZE(range_pulse
));
154 dev_warn(dev
, "maximal SMC CS Pulse value\n");
155 } else if (ret_val
!= 0) {
157 dev_warn(dev
, "SMC Cycle extended\n");
158 err
= -ER_SMC_RECALC
;
165 * to_smc_format - convert values into SMC format
166 * @setup: SETUP value of SMC Setup Register
167 * @pulse: PULSE value of SMC Pulse Register
168 * @cycle: CYCLE value of SMC Cycle Register
169 * @cs_pulse: NCS_PULSE value of SMC Pulse Register
171 static void to_smc_format(int *setup
, int *pulse
, int *cycle
, int *cs_pulse
)
173 *setup
= (*setup
& 0x1f) | ((*setup
& 0x80) >> 2);
174 *pulse
= (*pulse
& 0x3f) | ((*pulse
& 0x100) >> 2);
175 *cycle
= (*cycle
& 0x7f) | ((*cycle
& 0x300) >> 1);
176 *cs_pulse
= (*cs_pulse
& 0x3f) | ((*cs_pulse
& 0x100) >> 2);
179 static unsigned long calc_mck_cycles(unsigned long ns
, unsigned long mck_hz
)
184 * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
185 * x * (f / 1_000_000_000) =
186 * x * ((f * 65536) / 1_000_000_000) / 65536 =
187 * x * (((f / 10_000) * 65536) / 100_000) / 65536 =
190 mul
= (mck_hz
/ 10000) << 16;
193 return (ns
* mul
+ 65536) >> 16; /* rounding */
197 * set_smc_timing - SMC timings setup.
199 * @info: AT91 IDE info
202 * Its assumed that write timings are same as read timings,
203 * cs_setup = 0 and cs_pulse = cycle.
205 static void set_smc_timing(struct device
*dev
, struct ata_device
*adev
,
206 struct at91_ide_info
*info
, const struct ata_timing
*ata
)
210 unsigned int t6z
; /* data tristate time in ns */
211 unsigned int cycle
; /* SMC Cycle width in MCK ticks */
212 unsigned int setup
; /* SMC Setup width in MCK ticks */
213 unsigned int pulse
; /* CFIOR and CFIOW pulse width in MCK ticks */
214 unsigned int cs_setup
= 0;/* CS4 or CS5 setup width in MCK ticks */
215 unsigned int cs_pulse
; /* CS4 or CS5 pulse width in MCK ticks*/
216 unsigned int tdf_cycles
; /* SMC TDF MCK ticks */
217 unsigned long mck_hz
; /* MCK frequency in Hz */
219 t6z
= (ata
->mode
< XFER_PIO_5
) ? 30 : 20;
220 mck_hz
= clk_get_rate(info
->mck
);
221 cycle
= calc_mck_cycles(ata
->cyc8b
, mck_hz
);
222 setup
= calc_mck_cycles(ata
->setup
, mck_hz
);
223 pulse
= calc_mck_cycles(ata
->act8b
, mck_hz
);
224 tdf_cycles
= calc_mck_cycles(t6z
, mck_hz
);
227 ret
= calc_smc_vals(dev
, &setup
, &pulse
, &cycle
, &cs_pulse
);
228 } while (ret
== -ER_SMC_RECALC
);
230 if (ret
== -ER_SMC_CALC
)
231 dev_err(dev
, "Interface may not operate correctly\n");
233 dev_dbg(dev
, "SMC Setup=%u, Pulse=%u, Cycle=%u, CS Pulse=%u\n",
234 setup
, pulse
, cycle
, cs_pulse
);
235 to_smc_format(&setup
, &pulse
, &cycle
, &cs_pulse
);
236 /* disable or enable waiting for IORDY signal */
237 use_iordy
= ata_pio_need_iordy(adev
);
239 info
->mode
|= AT91_SMC_EXNWMODE_READY
;
241 if (tdf_cycles
> 15) {
243 dev_warn(dev
, "maximal SMC TDF Cycles value\n");
246 dev_dbg(dev
, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy
, tdf_cycles
);
247 info
->mode
|= AT91_SMC_TDF_(tdf_cycles
);
249 /* write SMC Setup Register */
250 at91_sys_write(AT91_SMC_SETUP(info
->cs
),
251 AT91_SMC_NWESETUP_(setup
) |
252 AT91_SMC_NRDSETUP_(setup
) |
253 AT91_SMC_NCS_WRSETUP_(cs_setup
) |
254 AT91_SMC_NCS_RDSETUP_(cs_setup
));
255 /* write SMC Pulse Register */
256 at91_sys_write(AT91_SMC_PULSE(info
->cs
),
257 AT91_SMC_NWEPULSE_(pulse
) |
258 AT91_SMC_NRDPULSE_(pulse
) |
259 AT91_SMC_NCS_WRPULSE_(cs_pulse
) |
260 AT91_SMC_NCS_RDPULSE_(cs_pulse
));
261 /* write SMC Cycle Register */
262 at91_sys_write(AT91_SMC_CYCLE(info
->cs
),
263 AT91_SMC_NWECYCLE_(cycle
) |
264 AT91_SMC_NRDCYCLE_(cycle
));
265 /* write SMC Mode Register*/
266 at91_sys_write(AT91_SMC_MODE(info
->cs
), info
->mode
);
269 static void pata_at91_set_piomode(struct ata_port
*ap
, struct ata_device
*adev
)
271 struct at91_ide_info
*info
= ap
->host
->private_data
;
272 struct ata_timing timing
;
275 /* Compute ATA timing and set it to SMC */
276 ret
= ata_timing_compute(adev
, adev
->pio_mode
, &timing
, 1000, 0);
278 dev_warn(ap
->dev
, "Failed to compute ATA timing %d, "
279 "set PIO_0 timing\n", ret
);
280 timing
= *ata_timing_find_mode(XFER_PIO_0
);
282 set_smc_timing(ap
->dev
, adev
, info
, &timing
);
285 static unsigned int pata_at91_data_xfer_noirq(struct ata_device
*dev
,
286 unsigned char *buf
, unsigned int buflen
, int rw
)
288 struct at91_ide_info
*info
= dev
->link
->ap
->host
->private_data
;
289 unsigned int consumed
;
293 local_irq_save(flags
);
294 mode
= at91_sys_read(AT91_SMC_MODE(info
->cs
));
296 /* set 16bit mode before writing data */
297 at91_sys_write(AT91_SMC_MODE(info
->cs
),
298 (mode
& ~AT91_SMC_DBW
) | AT91_SMC_DBW_16
);
300 consumed
= ata_sff_data_xfer(dev
, buf
, buflen
, rw
);
302 /* restore 8bit mode after data is written */
303 at91_sys_write(AT91_SMC_MODE(info
->cs
),
304 (mode
& ~AT91_SMC_DBW
) | AT91_SMC_DBW_8
);
306 local_irq_restore(flags
);
310 static struct scsi_host_template pata_at91_sht
= {
311 ATA_PIO_SHT(DRV_NAME
),
314 static struct ata_port_operations pata_at91_port_ops
= {
315 .inherits
= &ata_sff_port_ops
,
317 .sff_data_xfer
= pata_at91_data_xfer_noirq
,
318 .set_piomode
= pata_at91_set_piomode
,
319 .cable_detect
= ata_cable_40wire
,
322 static int __devinit
pata_at91_probe(struct platform_device
*pdev
)
324 struct at91_cf_data
*board
= pdev
->dev
.platform_data
;
325 struct device
*dev
= &pdev
->dev
;
326 struct at91_ide_info
*info
;
327 struct resource
*mem_res
;
328 struct ata_host
*host
;
335 /* get platform resources: IO/CTL memories and irq/rst pins */
337 if (pdev
->num_resources
!= 1) {
338 dev_err(&pdev
->dev
, "invalid number of resources\n");
342 mem_res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
345 dev_err(dev
, "failed to get mem resource\n");
349 irq
= board
->irq_pin
;
353 host
= ata_host_alloc(dev
, 1);
359 ap
->ops
= &pata_at91_port_ops
;
360 ap
->flags
|= ATA_FLAG_SLAVE_POSS
;
361 ap
->pio_mask
= ATA_PIO4
;
364 ap
->flags
|= ATA_FLAG_PIO_POLLING
;
365 ata_port_desc(ap
, "no IRQ, using PIO polling");
368 info
= devm_kzalloc(dev
, sizeof(*info
), GFP_KERNEL
);
371 dev_err(dev
, "failed to allocate memory for private data\n");
375 info
->mck
= clk_get(NULL
, "mck");
377 if (IS_ERR(info
->mck
)) {
378 dev_err(dev
, "failed to get access to mck clock\n");
382 info
->cs
= board
->chipselect
;
383 info
->mode
= AT91_SMC_READMODE
| AT91_SMC_WRITEMODE
|
384 AT91_SMC_EXNWMODE_READY
| AT91_SMC_BAT_SELECT
|
385 AT91_SMC_DBW_8
| AT91_SMC_TDF_(0);
387 info
->ide_addr
= devm_ioremap(dev
,
388 mem_res
->start
+ CF_IDE_OFFSET
, CF_IDE_RES_SIZE
);
390 if (!info
->ide_addr
) {
391 dev_err(dev
, "failed to map IO base\n");
396 info
->alt_addr
= devm_ioremap(dev
,
397 mem_res
->start
+ CF_ALT_IDE_OFFSET
, CF_IDE_RES_SIZE
);
399 if (!info
->alt_addr
) {
400 dev_err(dev
, "failed to map CTL base\n");
405 ap
->ioaddr
.cmd_addr
= info
->ide_addr
;
406 ap
->ioaddr
.ctl_addr
= info
->alt_addr
+ 0x06;
407 ap
->ioaddr
.altstatus_addr
= ap
->ioaddr
.ctl_addr
;
409 ata_sff_std_ports(&ap
->ioaddr
);
411 ata_port_desc(ap
, "mmio cmd 0x%llx ctl 0x%llx",
412 (unsigned long long)mem_res
->start
+ CF_IDE_OFFSET
,
413 (unsigned long long)mem_res
->start
+ CF_ALT_IDE_OFFSET
);
415 host
->private_data
= info
;
417 return ata_host_activate(host
, irq
? gpio_to_irq(irq
) : 0,
418 irq
? ata_sff_interrupt
: NULL
,
419 irq_flags
, &pata_at91_sht
);
426 static int __devexit
pata_at91_remove(struct platform_device
*pdev
)
428 struct ata_host
*host
= dev_get_drvdata(&pdev
->dev
);
429 struct at91_ide_info
*info
;
433 info
= host
->private_data
;
435 ata_host_detach(host
);
445 static struct platform_driver pata_at91_driver
= {
446 .probe
= pata_at91_probe
,
447 .remove
= __devexit_p(pata_at91_remove
),
450 .owner
= THIS_MODULE
,
454 static int __init
pata_at91_init(void)
456 return platform_driver_register(&pata_at91_driver
);
459 static void __exit
pata_at91_exit(void)
461 platform_driver_unregister(&pata_at91_driver
);
465 module_init(pata_at91_init
);
466 module_exit(pata_at91_exit
);
469 MODULE_LICENSE("GPL");
470 MODULE_DESCRIPTION("Driver for CF in True IDE mode on AT91SAM9260 SoC");
471 MODULE_AUTHOR("Matyukevich Sergey");
472 MODULE_VERSION(DRV_VERSION
);