drivers/gpu/drm/nouveau/nv50_sor.c

   1 /*
   2  * Copyright (C) 2008 Maarten Maathuis.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include "drmP.h"
  28 #include "drm_crtc_helper.h"
  29
  30 #define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
  31 #include "nouveau_reg.h"
  32 #include "nouveau_drv.h"
  33 #include "nouveau_dma.h"
  34 #include "nouveau_encoder.h"
  35 #include "nouveau_connector.h"
  36 #include "nouveau_crtc.h"
  37 #include "nv50_display.h"
  38
  39 static void
  40 nv50_sor_disconnect(struct drm_encoder *encoder)
  41 {
  42         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  43         struct drm_device *dev = encoder->dev;
  44         struct nouveau_channel *evo = nv50_display(dev)->master;
  45         int ret;
  46
  47         if (!nv_encoder->crtc)
  48                 return;
  49         nv50_crtc_blank(nouveau_crtc(nv_encoder->crtc), true);
  50
  51         NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);
  52
  53         ret = RING_SPACE(evo, 4);
  54         if (ret) {
  55                 NV_ERROR(dev, "no space while disconnecting SOR\n");
  56                 return;
  57         }
  58         BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
  59         OUT_RING  (evo, 0);
  60         BEGIN_RING(evo, 0, NV50_EVO_UPDATE, 1);
  61         OUT_RING  (evo, 0);
  62
  63         nv_encoder->crtc = NULL;
  64         nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
  65 }
  66
  67 static void
  68 nv50_sor_dpms(struct drm_encoder *encoder, int mode)
  69 {
  70         struct drm_device *dev = encoder->dev;
  71         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
  72         struct drm_encoder *enc;
  73         uint32_t val;
  74         int or = nv_encoder->or;
  75
  76         NV_DEBUG_KMS(dev, "or %d type %d mode %d\n", or, nv_encoder->dcb->type, mode);
  77
  78         nv_encoder->last_dpms = mode;
  79         list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
  80                 struct nouveau_encoder *nvenc = nouveau_encoder(enc);
  81
  82                 if (nvenc == nv_encoder ||
  83                     (nvenc->dcb->type != OUTPUT_TMDS &&
  84                      nvenc->dcb->type != OUTPUT_LVDS &&
  85                      nvenc->dcb->type != OUTPUT_DP) ||
  86                     nvenc->dcb->or != nv_encoder->dcb->or)
  87                         continue;
  88
  89                 if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
  90                         return;
  91         }
  92
  93         /* wait for it to be done */
  94         if (!nv_wait(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or),
  95                      NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING, 0)) {
  96                 NV_ERROR(dev, "timeout: SOR_DPMS_CTRL_PENDING(%d) == 0\n", or);
  97                 NV_ERROR(dev, "SOR_DPMS_CTRL(%d) = 0x%08x\n", or,
  98                          nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or)));
  99         }
 100
 101         val = nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or));
 102
 103         if (mode == DRM_MODE_DPMS_ON)
 104                 val |= NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
 105         else
 106                 val &= ~NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
 107
 108         nv_wr32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or), val |
 109                 NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING);
 110         if (!nv_wait(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or),
 111                      NV50_PDISPLAY_SOR_DPMS_STATE_WAIT, 0)) {
 112                 NV_ERROR(dev, "timeout: SOR_DPMS_STATE_WAIT(%d) == 0\n", or);
 113                 NV_ERROR(dev, "SOR_DPMS_STATE(%d) = 0x%08x\n", or,
 114                          nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or)));
 115         }
 116
 117         if (nv_encoder->dcb->type == OUTPUT_DP) {
 118                 struct nouveau_i2c_chan *auxch;
 119
 120                 auxch = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index);
 121                 if (!auxch)
 122                         return;
 123
 124                 if (mode == DRM_MODE_DPMS_ON) {
 125                         u8 status = DP_SET_POWER_D0;
 126                         nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
 127                         nouveau_dp_link_train(encoder);
 128                 } else {
 129                         u8 status = DP_SET_POWER_D3;
 130                         nouveau_dp_auxch(auxch, 8, DP_SET_POWER, &status, 1);
 131                 }
 132         }
 133 }
 134
 135 static void
 136 nv50_sor_save(struct drm_encoder *encoder)
 137 {
 138         NV_ERROR(encoder->dev, "!!\n");
 139 }
 140
 141 static void
 142 nv50_sor_restore(struct drm_encoder *encoder)
 143 {
 144         NV_ERROR(encoder->dev, "!!\n");
 145 }
 146
 147 static bool
 148 nv50_sor_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
 149                     struct drm_display_mode *adjusted_mode)
 150 {
 151         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 152         struct nouveau_connector *connector;
 153
 154         NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
 155
 156         connector = nouveau_encoder_connector_get(nv_encoder);
 157         if (!connector) {
 158                 NV_ERROR(encoder->dev, "Encoder has no connector\n");
 159                 return false;
 160         }
 161
 162         if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
 163              connector->native_mode) {
 164                 int id = adjusted_mode->base.id;
 165                 *adjusted_mode = *connector->native_mode;
 166                 adjusted_mode->base.id = id;
 167         }
 168
 169         return true;
 170 }
 171
 172 static void
 173 nv50_sor_prepare(struct drm_encoder *encoder)
 174 {
 175 }
 176
 177 static void
 178 nv50_sor_commit(struct drm_encoder *encoder)
 179 {
 180 }
 181
 182 static void
 183 nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
 184                   struct drm_display_mode *adjusted_mode)
 185 {
 186         struct nouveau_channel *evo = nv50_display(encoder->dev)->master;
 187         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 188         struct drm_device *dev = encoder->dev;
 189         struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
 190         uint32_t mode_ctl = 0;
 191         int ret;
 192
 193         NV_DEBUG_KMS(dev, "or %d type %d -> crtc %d\n",
 194                      nv_encoder->or, nv_encoder->dcb->type, crtc->index);
 195
 196         nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
 197
 198         switch (nv_encoder->dcb->type) {
 199         case OUTPUT_TMDS:
 200                 if (nv_encoder->dcb->sorconf.link & 1) {
 201                         if (adjusted_mode->clock < 165000)
 202                                 mode_ctl = 0x0100;
 203                         else
 204                                 mode_ctl = 0x0500;
 205                 } else
 206                         mode_ctl = 0x0200;
 207                 break;
 208         case OUTPUT_DP:
 209                 mode_ctl |= (nv_encoder->dp.mc_unknown << 16);
 210                 if (nv_encoder->dcb->sorconf.link & 1)
 211                         mode_ctl |= 0x00000800;
 212                 else
 213                         mode_ctl |= 0x00000900;
 214                 break;
 215         default:
 216                 break;
 217         }
 218
 219         if (crtc->index == 1)
 220                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC1;
 221         else
 222                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC0;
 223
 224         if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
 225                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NHSYNC;
 226
 227         if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
 228                 mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
 229
 230         ret = RING_SPACE(evo, 2);
 231         if (ret) {
 232                 NV_ERROR(dev, "no space while connecting SOR\n");
 233                 return;
 234         }
 235         BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
 236         OUT_RING(evo, mode_ctl);
 237
 238         nv_encoder->crtc = encoder->crtc;
 239 }
 240
 241 static struct drm_crtc *
 242 nv50_sor_crtc_get(struct drm_encoder *encoder)
 243 {
 244         return nouveau_encoder(encoder)->crtc;
 245 }
 246
 247 static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
 248         .dpms = nv50_sor_dpms,
 249         .save = nv50_sor_save,
 250         .restore = nv50_sor_restore,
 251         .mode_fixup = nv50_sor_mode_fixup,
 252         .prepare = nv50_sor_prepare,
 253         .commit = nv50_sor_commit,
 254         .mode_set = nv50_sor_mode_set,
 255         .get_crtc = nv50_sor_crtc_get,
 256         .detect = NULL,
 257         .disable = nv50_sor_disconnect
 258 };
 259
 260 static void
 261 nv50_sor_destroy(struct drm_encoder *encoder)
 262 {
 263         struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
 264
 265         if (!encoder)
 266                 return;
 267
 268         NV_DEBUG_KMS(encoder->dev, "\n");
 269
 270         drm_encoder_cleanup(encoder);
 271
 272         kfree(nv_encoder);
 273 }
 274
 275 static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
 276         .destroy = nv50_sor_destroy,
 277 };
 278
 279 int
 280 nv50_sor_create(struct drm_connector *connector, struct dcb_entry *entry)
 281 {
 282         struct nouveau_encoder *nv_encoder = NULL;
 283         struct drm_device *dev = connector->dev;
 284         struct drm_encoder *encoder;
 285         int type;
 286
 287         NV_DEBUG_KMS(dev, "\n");
 288
 289         switch (entry->type) {
 290         case OUTPUT_TMDS:
 291         case OUTPUT_DP:
 292                 type = DRM_MODE_ENCODER_TMDS;
 293                 break;
 294         case OUTPUT_LVDS:
 295                 type = DRM_MODE_ENCODER_LVDS;
 296                 break;
 297         default:
 298                 return -EINVAL;
 299         }
 300
 301         nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
 302         if (!nv_encoder)
 303                 return -ENOMEM;
 304         encoder = to_drm_encoder(nv_encoder);
 305
 306         nv_encoder->dcb = entry;
 307         nv_encoder->or = ffs(entry->or) - 1;
 308         nv_encoder->last_dpms = DRM_MODE_DPMS_OFF;
 309
 310         drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
 311         drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);
 312
 313         encoder->possible_crtcs = entry->heads;
 314         encoder->possible_clones = 0;
 315
 316         if (nv_encoder->dcb->type == OUTPUT_DP) {
 317                 int or = nv_encoder->or, link = !(entry->dpconf.sor.link & 1);
 318                 uint32_t tmp;
 319
 320                 tmp = nv_rd32(dev, 0x61c700 + (or * 0x800));
 321                 if (!tmp)
 322                         tmp = nv_rd32(dev, 0x610798 + (or * 8));
 323
 324                 switch ((tmp & 0x00000f00) >> 8) {
 325                 case 8:
 326                 case 9:
 327                         nv_encoder->dp.mc_unknown = (tmp & 0x000f0000) >> 16;
 328                         tmp = nv_rd32(dev, NV50_SOR_DP_CTRL(or, link));
 329                         nv_encoder->dp.unk0 = tmp & 0x000001fc;
 330                         tmp = nv_rd32(dev, NV50_SOR_DP_UNK128(or, link));
 331                         nv_encoder->dp.unk1 = tmp & 0x010f7f3f;
 332                         break;
 333                 default:
 334                         break;
 335                 }
 336
 337                 if (!nv_encoder->dp.mc_unknown)
 338                         nv_encoder->dp.mc_unknown = 5;
 339         }
 340
 341         drm_mode_connector_attach_encoder(connector, encoder);
 342         return 0;
 343 }