Merge remote-tracking branch 'moduleh/module.h-split'
[linux-2.6/next.git] / drivers / media / video / tvp7002.c
blob3044e3536c0bdca4c8a09d6b1dc4040f189527de
1 /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
2 * Digitizer with Horizontal PLL registers
4 * Copyright (C) 2009 Texas Instruments Inc
5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
7 * This code is partially based upon the TVP5150 driver
8 * written by Mauro Carvalho Chehab (mchehab@infradead.org),
9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
10 * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
11 * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
27 #include <linux/delay.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/videodev2.h>
31 #include <linux/module.h>
32 #include <media/tvp7002.h>
33 #include <media/v4l2-device.h>
34 #include <media/v4l2-chip-ident.h>
35 #include <media/v4l2-common.h>
36 #include <media/v4l2-ctrls.h>
37 #include "tvp7002_reg.h"
39 MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
40 MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
41 MODULE_LICENSE("GPL");
43 /* Module Name */
44 #define TVP7002_MODULE_NAME "tvp7002"
46 /* I2C retry attempts */
47 #define I2C_RETRY_COUNT (5)
49 /* End of registers */
50 #define TVP7002_EOR 0x5c
52 /* Read write definition for registers */
53 #define TVP7002_READ 0
54 #define TVP7002_WRITE 1
55 #define TVP7002_RESERVED 2
57 /* Interlaced vs progressive mask and shift */
58 #define TVP7002_IP_SHIFT 5
59 #define TVP7002_INPR_MASK (0x01 << TVP7002_IP_SHIFT)
61 /* Shift for CPL and LPF registers */
62 #define TVP7002_CL_SHIFT 8
63 #define TVP7002_CL_MASK 0x0f
65 /* Debug functions */
66 static int debug;
67 module_param(debug, bool, 0644);
68 MODULE_PARM_DESC(debug, "Debug level (0-2)");
70 /* Structure for register values */
71 struct i2c_reg_value {
72 u8 reg;
73 u8 value;
74 u8 type;
78 * Register default values (according to tvp7002 datasheet)
79 * In the case of read-only registers, the value (0xff) is
80 * never written. R/W functionality is controlled by the
81 * writable bit in the register struct definition.
83 static const struct i2c_reg_value tvp7002_init_default[] = {
84 { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
85 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
86 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
87 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
88 { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
89 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
90 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
91 { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
92 { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
93 { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
94 { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
95 { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
96 { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
97 { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
98 { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
99 { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
100 { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
101 { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
102 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
103 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
104 { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
105 { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
106 { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
107 { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
108 { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
109 { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
110 { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
111 { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
112 { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
113 { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
114 { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
115 { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
116 { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
117 { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
118 { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
119 { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
120 { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
121 { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
122 { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
123 { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
124 { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
125 { 0x29, 0x08, TVP7002_RESERVED },
126 { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
127 /* PWR_CTL is controlled only by the probe and reset functions */
128 { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
129 { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
130 { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
131 { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
132 { TVP7002_RGB_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
133 { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
134 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
135 { 0x32, 0x18, TVP7002_RESERVED },
136 { 0x33, 0x60, TVP7002_RESERVED },
137 { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
138 { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
139 { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
140 { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
141 { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
142 { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
143 { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
144 { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
145 { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
146 { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
147 { 0x3e, 0x60, TVP7002_RESERVED },
148 { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
149 { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
150 { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
151 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
152 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
153 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
154 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
155 { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
156 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
157 { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
158 { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
159 { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
160 { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
161 { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
162 { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
163 { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
164 { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
165 { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
166 { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
167 { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
168 { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
169 { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
170 { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
171 { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
172 { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
173 { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
174 { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
175 { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
176 { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
177 /* This signals end of register values */
178 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
181 /* Register parameters for 480P */
182 static const struct i2c_reg_value tvp7002_parms_480P[] = {
183 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
184 { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE },
185 { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
186 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
187 { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
188 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
189 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
190 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
191 { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
192 { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
193 { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
194 { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
195 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
196 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
197 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
198 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
199 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
200 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
203 /* Register parameters for 576P */
204 static const struct i2c_reg_value tvp7002_parms_576P[] = {
205 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
206 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
207 { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
208 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
209 { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
210 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
211 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
212 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
213 { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
214 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
215 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
216 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
217 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
218 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
219 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
220 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
221 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
222 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
225 /* Register parameters for 1080I60 */
226 static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
227 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
228 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
229 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
230 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
231 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
232 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
233 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
234 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
235 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
236 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
237 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
238 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
239 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
240 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
241 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
242 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
243 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
244 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
247 /* Register parameters for 1080P60 */
248 static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
249 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
250 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
251 { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
252 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
253 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
254 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
255 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
256 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
257 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
258 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
259 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
260 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
261 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
262 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
263 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
264 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
265 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
266 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
269 /* Register parameters for 1080I50 */
270 static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
271 { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
272 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
273 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
274 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
275 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
276 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
277 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
278 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
279 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
280 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
281 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
282 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
283 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
284 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
285 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
286 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
287 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
288 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
291 /* Register parameters for 720P60 */
292 static const struct i2c_reg_value tvp7002_parms_720P60[] = {
293 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
294 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
295 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
296 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
297 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
298 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
299 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
300 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
301 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
302 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
303 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
304 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
305 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
306 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
307 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
308 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
309 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
310 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
313 /* Register parameters for 720P50 */
314 static const struct i2c_reg_value tvp7002_parms_720P50[] = {
315 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
316 { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE },
317 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
318 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
319 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
320 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
321 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
322 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
323 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
324 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
325 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
326 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
327 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
328 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
329 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
330 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
331 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
332 { TVP7002_EOR, 0xff, TVP7002_RESERVED }
335 /* Preset definition for handling device operation */
336 struct tvp7002_preset_definition {
337 u32 preset;
338 const struct i2c_reg_value *p_settings;
339 enum v4l2_colorspace color_space;
340 enum v4l2_field scanmode;
341 u16 progressive;
342 u16 lines_per_frame;
343 u16 cpl_min;
344 u16 cpl_max;
347 /* Struct list for digital video presets */
348 static const struct tvp7002_preset_definition tvp7002_presets[] = {
350 V4L2_DV_720P60,
351 tvp7002_parms_720P60,
352 V4L2_COLORSPACE_REC709,
353 V4L2_FIELD_NONE,
355 0x2EE,
356 135,
360 V4L2_DV_1080I60,
361 tvp7002_parms_1080I60,
362 V4L2_COLORSPACE_REC709,
363 V4L2_FIELD_INTERLACED,
365 0x465,
366 181,
370 V4L2_DV_1080I50,
371 tvp7002_parms_1080I50,
372 V4L2_COLORSPACE_REC709,
373 V4L2_FIELD_INTERLACED,
375 0x465,
376 217,
380 V4L2_DV_720P50,
381 tvp7002_parms_720P50,
382 V4L2_COLORSPACE_REC709,
383 V4L2_FIELD_NONE,
385 0x2EE,
386 163,
390 V4L2_DV_1080P60,
391 tvp7002_parms_1080P60,
392 V4L2_COLORSPACE_REC709,
393 V4L2_FIELD_NONE,
395 0x465,
400 V4L2_DV_480P59_94,
401 tvp7002_parms_480P,
402 V4L2_COLORSPACE_SMPTE170M,
403 V4L2_FIELD_NONE,
405 0x20D,
406 0xffff,
407 0xffff
410 V4L2_DV_576P50,
411 tvp7002_parms_576P,
412 V4L2_COLORSPACE_SMPTE170M,
413 V4L2_FIELD_NONE,
415 0x271,
416 0xffff,
417 0xffff
421 #define NUM_PRESETS ARRAY_SIZE(tvp7002_presets)
423 /* Device definition */
424 struct tvp7002 {
425 struct v4l2_subdev sd;
426 struct v4l2_ctrl_handler hdl;
427 const struct tvp7002_config *pdata;
429 int ver;
430 int streaming;
432 const struct tvp7002_preset_definition *current_preset;
436 * to_tvp7002 - Obtain device handler TVP7002
437 * @sd: ptr to v4l2_subdev struct
439 * Returns device handler tvp7002.
441 static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
443 return container_of(sd, struct tvp7002, sd);
446 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
448 return &container_of(ctrl->handler, struct tvp7002, hdl)->sd;
452 * tvp7002_read - Read a value from a register in an TVP7002
453 * @sd: ptr to v4l2_subdev struct
454 * @addr: TVP7002 register address
455 * @dst: pointer to 8-bit destination
457 * Returns value read if successful, or non-zero (-1) otherwise.
459 static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
461 struct i2c_client *c = v4l2_get_subdevdata(sd);
462 int retry;
463 int error;
465 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
466 error = i2c_smbus_read_byte_data(c, addr);
468 if (error >= 0) {
469 *dst = (u8)error;
470 return 0;
473 msleep_interruptible(10);
475 v4l2_err(sd, "TVP7002 read error %d\n", error);
476 return error;
480 * tvp7002_read_err() - Read a register value with error code
481 * @sd: pointer to standard V4L2 sub-device structure
482 * @reg: destination register
483 * @val: value to be read
484 * @err: pointer to error value
486 * Read a value in a register and save error value in pointer.
487 * Also update the register table if successful
489 static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
490 u8 *dst, int *err)
492 if (!*err)
493 *err = tvp7002_read(sd, reg, dst);
497 * tvp7002_write() - Write a value to a register in TVP7002
498 * @sd: ptr to v4l2_subdev struct
499 * @addr: TVP7002 register address
500 * @value: value to be written to the register
502 * Write a value to a register in an TVP7002 decoder device.
503 * Returns zero if successful, or non-zero otherwise.
505 static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
507 struct i2c_client *c;
508 int retry;
509 int error;
511 c = v4l2_get_subdevdata(sd);
513 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
514 error = i2c_smbus_write_byte_data(c, addr, value);
516 if (error >= 0)
517 return 0;
519 v4l2_warn(sd, "Write: retry ... %d\n", retry);
520 msleep_interruptible(10);
522 v4l2_err(sd, "TVP7002 write error %d\n", error);
523 return error;
527 * tvp7002_write_err() - Write a register value with error code
528 * @sd: pointer to standard V4L2 sub-device structure
529 * @reg: destination register
530 * @val: value to be written
531 * @err: pointer to error value
533 * Write a value in a register and save error value in pointer.
534 * Also update the register table if successful
536 static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
537 u8 val, int *err)
539 if (!*err)
540 *err = tvp7002_write(sd, reg, val);
544 * tvp7002_g_chip_ident() - Get chip identification number
545 * @sd: ptr to v4l2_subdev struct
546 * @chip: ptr to v4l2_dbg_chip_ident struct
548 * Obtains the chip's identification number.
549 * Returns zero or -EINVAL if read operation fails.
551 static int tvp7002_g_chip_ident(struct v4l2_subdev *sd,
552 struct v4l2_dbg_chip_ident *chip)
554 u8 rev;
555 int error;
556 struct i2c_client *client = v4l2_get_subdevdata(sd);
558 error = tvp7002_read(sd, TVP7002_CHIP_REV, &rev);
560 if (error < 0)
561 return error;
563 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP7002, rev);
567 * tvp7002_write_inittab() - Write initialization values
568 * @sd: ptr to v4l2_subdev struct
569 * @regs: ptr to i2c_reg_value struct
571 * Write initialization values.
572 * Returns zero or -EINVAL if read operation fails.
574 static int tvp7002_write_inittab(struct v4l2_subdev *sd,
575 const struct i2c_reg_value *regs)
577 int error = 0;
579 /* Initialize the first (defined) registers */
580 while (TVP7002_EOR != regs->reg) {
581 if (TVP7002_WRITE == regs->type)
582 tvp7002_write_err(sd, regs->reg, regs->value, &error);
583 regs++;
586 return error;
590 * tvp7002_s_dv_preset() - Set digital video preset
591 * @sd: ptr to v4l2_subdev struct
592 * @dv_preset: ptr to v4l2_dv_preset struct
594 * Set the digital video preset for a TVP7002 decoder device.
595 * Returns zero when successful or -EINVAL if register access fails.
597 static int tvp7002_s_dv_preset(struct v4l2_subdev *sd,
598 struct v4l2_dv_preset *dv_preset)
600 struct tvp7002 *device = to_tvp7002(sd);
601 u32 preset;
602 int i;
604 for (i = 0; i < NUM_PRESETS; i++) {
605 preset = tvp7002_presets[i].preset;
606 if (preset == dv_preset->preset) {
607 device->current_preset = &tvp7002_presets[i];
608 return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);
612 return -EINVAL;
616 * tvp7002_s_ctrl() - Set a control
617 * @ctrl: ptr to v4l2_ctrl struct
619 * Set a control in TVP7002 decoder device.
620 * Returns zero when successful or -EINVAL if register access fails.
622 static int tvp7002_s_ctrl(struct v4l2_ctrl *ctrl)
624 struct v4l2_subdev *sd = to_sd(ctrl);
625 int error = 0;
627 switch (ctrl->id) {
628 case V4L2_CID_GAIN:
629 tvp7002_write_err(sd, TVP7002_R_FINE_GAIN, ctrl->val, &error);
630 tvp7002_write_err(sd, TVP7002_G_FINE_GAIN, ctrl->val, &error);
631 tvp7002_write_err(sd, TVP7002_B_FINE_GAIN, ctrl->val, &error);
632 return error;
634 return -EINVAL;
638 * tvp7002_mbus_fmt() - V4L2 decoder interface handler for try/s/g_mbus_fmt
639 * @sd: pointer to standard V4L2 sub-device structure
640 * @f: pointer to mediabus format structure
642 * Negotiate the image capture size and mediabus format.
643 * There is only one possible format, so this single function works for
644 * get, set and try.
646 static int tvp7002_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *f)
648 struct tvp7002 *device = to_tvp7002(sd);
649 struct v4l2_dv_enum_preset e_preset;
650 int error;
652 /* Calculate height and width based on current standard */
653 error = v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset);
654 if (error)
655 return error;
657 f->width = e_preset.width;
658 f->height = e_preset.height;
659 f->code = V4L2_MBUS_FMT_YUYV10_1X20;
660 f->field = device->current_preset->scanmode;
661 f->colorspace = device->current_preset->color_space;
663 v4l2_dbg(1, debug, sd, "MBUS_FMT: Width - %d, Height - %d",
664 f->width, f->height);
665 return 0;
669 * tvp7002_query_dv_preset() - query DV preset
670 * @sd: pointer to standard V4L2 sub-device structure
671 * @qpreset: standard V4L2 v4l2_dv_preset structure
673 * Returns the current DV preset by TVP7002. If no active input is
674 * detected, returns -EINVAL
676 static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,
677 struct v4l2_dv_preset *qpreset)
679 const struct tvp7002_preset_definition *presets = tvp7002_presets;
680 struct tvp7002 *device;
681 u8 progressive;
682 u32 lpfr;
683 u32 cpln;
684 int error = 0;
685 u8 lpf_lsb;
686 u8 lpf_msb;
687 u8 cpl_lsb;
688 u8 cpl_msb;
689 int index;
691 device = to_tvp7002(sd);
693 /* Read standards from device registers */
694 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
695 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
697 if (error < 0)
698 return error;
700 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
701 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
703 if (error < 0)
704 return error;
706 /* Get lines per frame, clocks per line and interlaced/progresive */
707 lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
708 cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
709 progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
711 /* Do checking of video modes */
712 for (index = 0; index < NUM_PRESETS; index++, presets++)
713 if (lpfr == presets->lines_per_frame &&
714 progressive == presets->progressive) {
715 if (presets->cpl_min == 0xffff)
716 break;
717 if (cpln >= presets->cpl_min && cpln <= presets->cpl_max)
718 break;
721 if (index == NUM_PRESETS) {
722 v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n",
723 lpfr, cpln);
724 /* Could not detect a signal, so return the 'invalid' preset */
725 qpreset->preset = V4L2_DV_INVALID;
726 return 0;
729 /* Set values in found preset */
730 qpreset->preset = presets->preset;
732 /* Update lines per frame and clocks per line info */
733 v4l2_dbg(1, debug, sd, "detected preset: %d\n", presets->preset);
734 return 0;
737 #ifdef CONFIG_VIDEO_ADV_DEBUG
739 * tvp7002_g_register() - Get the value of a register
740 * @sd: ptr to v4l2_subdev struct
741 * @reg: ptr to v4l2_dbg_register struct
743 * Get the value of a TVP7002 decoder device register.
744 * Returns zero when successful, -EINVAL if register read fails or
745 * access to I2C client fails, -EPERM if the call is not allowed
746 * by disabled CAP_SYS_ADMIN.
748 static int tvp7002_g_register(struct v4l2_subdev *sd,
749 struct v4l2_dbg_register *reg)
751 struct i2c_client *client = v4l2_get_subdevdata(sd);
752 u8 val;
753 int ret;
755 if (!v4l2_chip_match_i2c_client(client, &reg->match))
756 return -EINVAL;
757 if (!capable(CAP_SYS_ADMIN))
758 return -EPERM;
760 ret = tvp7002_read(sd, reg->reg & 0xff, &val);
761 reg->val = val;
762 return ret;
766 * tvp7002_s_register() - set a control
767 * @sd: ptr to v4l2_subdev struct
768 * @reg: ptr to v4l2_dbg_register struct
770 * Get the value of a TVP7002 decoder device register.
771 * Returns zero when successful, -EINVAL if register read fails or
772 * -EPERM if call not allowed.
774 static int tvp7002_s_register(struct v4l2_subdev *sd,
775 struct v4l2_dbg_register *reg)
777 struct i2c_client *client = v4l2_get_subdevdata(sd);
779 if (!v4l2_chip_match_i2c_client(client, &reg->match))
780 return -EINVAL;
781 if (!capable(CAP_SYS_ADMIN))
782 return -EPERM;
784 return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
786 #endif
789 * tvp7002_enum_mbus_fmt() - Enum supported mediabus formats
790 * @sd: pointer to standard V4L2 sub-device structure
791 * @index: format index
792 * @code: pointer to mediabus format
794 * Enumerate supported mediabus formats.
797 static int tvp7002_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
798 enum v4l2_mbus_pixelcode *code)
800 /* Check requested format index is within range */
801 if (index)
802 return -EINVAL;
803 *code = V4L2_MBUS_FMT_YUYV10_1X20;
804 return 0;
808 * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
809 * @sd: pointer to standard V4L2 sub-device structure
810 * @enable: streaming enable or disable
812 * Sets streaming to enable or disable, if possible.
814 static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
816 struct tvp7002 *device = to_tvp7002(sd);
817 int error = 0;
819 if (device->streaming == enable)
820 return 0;
822 if (enable) {
823 /* Set output state on (low impedance means stream on) */
824 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00);
825 device->streaming = enable;
826 } else {
827 /* Set output state off (high impedance means stream off) */
828 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03);
829 if (error)
830 v4l2_dbg(1, debug, sd, "Unable to stop streaming\n");
832 device->streaming = enable;
835 return error;
839 * tvp7002_log_status() - Print information about register settings
840 * @sd: ptr to v4l2_subdev struct
842 * Log register values of a TVP7002 decoder device.
843 * Returns zero or -EINVAL if read operation fails.
845 static int tvp7002_log_status(struct v4l2_subdev *sd)
847 const struct tvp7002_preset_definition *presets = tvp7002_presets;
848 struct tvp7002 *device = to_tvp7002(sd);
849 struct v4l2_dv_enum_preset e_preset;
850 struct v4l2_dv_preset detected;
851 int i;
853 detected.preset = V4L2_DV_INVALID;
854 /* Find my current standard*/
855 tvp7002_query_dv_preset(sd, &detected);
857 /* Print standard related code values */
858 for (i = 0; i < NUM_PRESETS; i++, presets++)
859 if (presets->preset == detected.preset)
860 break;
862 if (v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset))
863 return -EINVAL;
865 v4l2_info(sd, "Selected DV Preset: %s\n", e_preset.name);
866 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
867 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
868 if (i == NUM_PRESETS) {
869 v4l2_info(sd, "Detected DV Preset: None\n");
870 } else {
871 if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
872 return -EINVAL;
873 v4l2_info(sd, "Detected DV Preset: %s\n", e_preset.name);
874 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
875 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
877 v4l2_info(sd, "Streaming enabled: %s\n",
878 device->streaming ? "yes" : "no");
880 /* Print the current value of the gain control */
881 v4l2_ctrl_handler_log_status(&device->hdl, sd->name);
883 return 0;
887 * tvp7002_enum_dv_presets() - Enum supported digital video formats
888 * @sd: pointer to standard V4L2 sub-device structure
889 * @preset: pointer to format struct
891 * Enumerate supported digital video formats.
893 static int tvp7002_enum_dv_presets(struct v4l2_subdev *sd,
894 struct v4l2_dv_enum_preset *preset)
896 /* Check requested format index is within range */
897 if (preset->index >= NUM_PRESETS)
898 return -EINVAL;
900 return v4l_fill_dv_preset_info(tvp7002_presets[preset->index].preset, preset);
903 static const struct v4l2_ctrl_ops tvp7002_ctrl_ops = {
904 .s_ctrl = tvp7002_s_ctrl,
907 /* V4L2 core operation handlers */
908 static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
909 .g_chip_ident = tvp7002_g_chip_ident,
910 .log_status = tvp7002_log_status,
911 .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
912 .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
913 .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
914 .g_ctrl = v4l2_subdev_g_ctrl,
915 .s_ctrl = v4l2_subdev_s_ctrl,
916 .queryctrl = v4l2_subdev_queryctrl,
917 .querymenu = v4l2_subdev_querymenu,
918 #ifdef CONFIG_VIDEO_ADV_DEBUG
919 .g_register = tvp7002_g_register,
920 .s_register = tvp7002_s_register,
921 #endif
924 /* Specific video subsystem operation handlers */
925 static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
926 .enum_dv_presets = tvp7002_enum_dv_presets,
927 .s_dv_preset = tvp7002_s_dv_preset,
928 .query_dv_preset = tvp7002_query_dv_preset,
929 .s_stream = tvp7002_s_stream,
930 .g_mbus_fmt = tvp7002_mbus_fmt,
931 .try_mbus_fmt = tvp7002_mbus_fmt,
932 .s_mbus_fmt = tvp7002_mbus_fmt,
933 .enum_mbus_fmt = tvp7002_enum_mbus_fmt,
936 /* V4L2 top level operation handlers */
937 static const struct v4l2_subdev_ops tvp7002_ops = {
938 .core = &tvp7002_core_ops,
939 .video = &tvp7002_video_ops,
943 * tvp7002_probe - Probe a TVP7002 device
944 * @c: ptr to i2c_client struct
945 * @id: ptr to i2c_device_id struct
947 * Initialize the TVP7002 device
948 * Returns zero when successful, -EINVAL if register read fails or
949 * -EIO if i2c access is not available.
951 static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
953 struct v4l2_subdev *sd;
954 struct tvp7002 *device;
955 struct v4l2_dv_preset preset;
956 int polarity_a;
957 int polarity_b;
958 u8 revision;
960 int error;
962 /* Check if the adapter supports the needed features */
963 if (!i2c_check_functionality(c->adapter,
964 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
965 return -EIO;
967 if (!c->dev.platform_data) {
968 v4l_err(c, "No platform data!!\n");
969 return -ENODEV;
972 device = kzalloc(sizeof(struct tvp7002), GFP_KERNEL);
974 if (!device)
975 return -ENOMEM;
977 sd = &device->sd;
978 device->pdata = c->dev.platform_data;
979 device->current_preset = tvp7002_presets;
981 /* Tell v4l2 the device is ready */
982 v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
983 v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
984 c->addr, c->adapter->name);
986 error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
987 if (error < 0)
988 goto found_error;
990 /* Get revision number */
991 v4l2_info(sd, "Rev. %02x detected.\n", revision);
992 if (revision != 0x02)
993 v4l2_info(sd, "Unknown revision detected.\n");
995 /* Initializes TVP7002 to its default values */
996 error = tvp7002_write_inittab(sd, tvp7002_init_default);
998 if (error < 0)
999 goto found_error;
1001 /* Set polarity information after registers have been set */
1002 polarity_a = 0x20 | device->pdata->hs_polarity << 5
1003 | device->pdata->vs_polarity << 2;
1004 error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
1005 if (error < 0)
1006 goto found_error;
1008 polarity_b = 0x01 | device->pdata->fid_polarity << 2
1009 | device->pdata->sog_polarity << 1
1010 | device->pdata->clk_polarity;
1011 error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
1012 if (error < 0)
1013 goto found_error;
1015 /* Set registers according to default video mode */
1016 preset.preset = device->current_preset->preset;
1017 error = tvp7002_s_dv_preset(sd, &preset);
1019 v4l2_ctrl_handler_init(&device->hdl, 1);
1020 v4l2_ctrl_new_std(&device->hdl, &tvp7002_ctrl_ops,
1021 V4L2_CID_GAIN, 0, 255, 1, 0);
1022 sd->ctrl_handler = &device->hdl;
1023 if (device->hdl.error) {
1024 int err = device->hdl.error;
1026 v4l2_ctrl_handler_free(&device->hdl);
1027 kfree(device);
1028 return err;
1030 v4l2_ctrl_handler_setup(&device->hdl);
1032 found_error:
1033 if (error < 0)
1034 kfree(device);
1036 return error;
1040 * tvp7002_remove - Remove TVP7002 device support
1041 * @c: ptr to i2c_client struct
1043 * Reset the TVP7002 device
1044 * Returns zero.
1046 static int tvp7002_remove(struct i2c_client *c)
1048 struct v4l2_subdev *sd = i2c_get_clientdata(c);
1049 struct tvp7002 *device = to_tvp7002(sd);
1051 v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
1052 "on address 0x%x\n", c->addr);
1054 v4l2_device_unregister_subdev(sd);
1055 v4l2_ctrl_handler_free(&device->hdl);
1056 kfree(device);
1057 return 0;
1060 /* I2C Device ID table */
1061 static const struct i2c_device_id tvp7002_id[] = {
1062 { "tvp7002", 0 },
1065 MODULE_DEVICE_TABLE(i2c, tvp7002_id);
1067 /* I2C driver data */
1068 static struct i2c_driver tvp7002_driver = {
1069 .driver = {
1070 .owner = THIS_MODULE,
1071 .name = TVP7002_MODULE_NAME,
1073 .probe = tvp7002_probe,
1074 .remove = tvp7002_remove,
1075 .id_table = tvp7002_id,
1079 * tvp7002_init - Initialize driver via I2C interface
1081 * Register the TVP7002 driver.
1082 * Return 0 on success or error code on failure.
1084 static int __init tvp7002_init(void)
1086 return i2c_add_driver(&tvp7002_driver);
1090 * tvp7002_exit - Remove driver via I2C interface
1092 * Unregister the TVP7002 driver.
1093 * Returns nothing.
1095 static void __exit tvp7002_exit(void)
1097 i2c_del_driver(&tvp7002_driver);
1100 module_init(tvp7002_init);
1101 module_exit(tvp7002_exit);