1 /*******************************************************************************
3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2008 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33 /* Local prototypes */
34 static u16
ixgb_shift_in_bits(struct ixgb_hw
*hw
);
36 static void ixgb_shift_out_bits(struct ixgb_hw
*hw
,
39 static void ixgb_standby_eeprom(struct ixgb_hw
*hw
);
41 static bool ixgb_wait_eeprom_command(struct ixgb_hw
*hw
);
43 static void ixgb_cleanup_eeprom(struct ixgb_hw
*hw
);
45 /******************************************************************************
46 * Raises the EEPROM's clock input.
48 * hw - Struct containing variables accessed by shared code
49 * eecd_reg - EECD's current value
50 *****************************************************************************/
52 ixgb_raise_clock(struct ixgb_hw
*hw
,
55 /* Raise the clock input to the EEPROM (by setting the SK bit), and then
56 * wait 50 microseconds.
58 *eecd_reg
= *eecd_reg
| IXGB_EECD_SK
;
59 IXGB_WRITE_REG(hw
, EECD
, *eecd_reg
);
64 /******************************************************************************
65 * Lowers the EEPROM's clock input.
67 * hw - Struct containing variables accessed by shared code
68 * eecd_reg - EECD's current value
69 *****************************************************************************/
71 ixgb_lower_clock(struct ixgb_hw
*hw
,
74 /* Lower the clock input to the EEPROM (by clearing the SK bit), and then
75 * wait 50 microseconds.
77 *eecd_reg
= *eecd_reg
& ~IXGB_EECD_SK
;
78 IXGB_WRITE_REG(hw
, EECD
, *eecd_reg
);
83 /******************************************************************************
84 * Shift data bits out to the EEPROM.
86 * hw - Struct containing variables accessed by shared code
87 * data - data to send to the EEPROM
88 * count - number of bits to shift out
89 *****************************************************************************/
91 ixgb_shift_out_bits(struct ixgb_hw
*hw
,
98 /* We need to shift "count" bits out to the EEPROM. So, value in the
99 * "data" parameter will be shifted out to the EEPROM one bit at a time.
100 * In order to do this, "data" must be broken down into bits.
102 mask
= 0x01 << (count
- 1);
103 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
104 eecd_reg
&= ~(IXGB_EECD_DO
| IXGB_EECD_DI
);
106 /* A "1" is shifted out to the EEPROM by setting bit "DI" to a "1",
107 * and then raising and then lowering the clock (the SK bit controls
108 * the clock input to the EEPROM). A "0" is shifted out to the EEPROM
109 * by setting "DI" to "0" and then raising and then lowering the clock.
111 eecd_reg
&= ~IXGB_EECD_DI
;
114 eecd_reg
|= IXGB_EECD_DI
;
116 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
117 IXGB_WRITE_FLUSH(hw
);
121 ixgb_raise_clock(hw
, &eecd_reg
);
122 ixgb_lower_clock(hw
, &eecd_reg
);
128 /* We leave the "DI" bit set to "0" when we leave this routine. */
129 eecd_reg
&= ~IXGB_EECD_DI
;
130 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
133 /******************************************************************************
134 * Shift data bits in from the EEPROM
136 * hw - Struct containing variables accessed by shared code
137 *****************************************************************************/
139 ixgb_shift_in_bits(struct ixgb_hw
*hw
)
145 /* In order to read a register from the EEPROM, we need to shift 16 bits
146 * in from the EEPROM. Bits are "shifted in" by raising the clock input to
147 * the EEPROM (setting the SK bit), and then reading the value of the "DO"
148 * bit. During this "shifting in" process the "DI" bit should always be
152 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
154 eecd_reg
&= ~(IXGB_EECD_DO
| IXGB_EECD_DI
);
157 for (i
= 0; i
< 16; i
++) {
159 ixgb_raise_clock(hw
, &eecd_reg
);
161 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
163 eecd_reg
&= ~(IXGB_EECD_DI
);
164 if (eecd_reg
& IXGB_EECD_DO
)
167 ixgb_lower_clock(hw
, &eecd_reg
);
173 /******************************************************************************
174 * Prepares EEPROM for access
176 * hw - Struct containing variables accessed by shared code
178 * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This
179 * function should be called before issuing a command to the EEPROM.
180 *****************************************************************************/
182 ixgb_setup_eeprom(struct ixgb_hw
*hw
)
186 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
188 /* Clear SK and DI */
189 eecd_reg
&= ~(IXGB_EECD_SK
| IXGB_EECD_DI
);
190 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
193 eecd_reg
|= IXGB_EECD_CS
;
194 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
197 /******************************************************************************
198 * Returns EEPROM to a "standby" state
200 * hw - Struct containing variables accessed by shared code
201 *****************************************************************************/
203 ixgb_standby_eeprom(struct ixgb_hw
*hw
)
207 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
209 /* Deselect EEPROM */
210 eecd_reg
&= ~(IXGB_EECD_CS
| IXGB_EECD_SK
);
211 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
212 IXGB_WRITE_FLUSH(hw
);
216 eecd_reg
|= IXGB_EECD_SK
;
217 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
218 IXGB_WRITE_FLUSH(hw
);
222 eecd_reg
|= IXGB_EECD_CS
;
223 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
224 IXGB_WRITE_FLUSH(hw
);
228 eecd_reg
&= ~IXGB_EECD_SK
;
229 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
230 IXGB_WRITE_FLUSH(hw
);
234 /******************************************************************************
235 * Raises then lowers the EEPROM's clock pin
237 * hw - Struct containing variables accessed by shared code
238 *****************************************************************************/
240 ixgb_clock_eeprom(struct ixgb_hw
*hw
)
244 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
246 /* Rising edge of clock */
247 eecd_reg
|= IXGB_EECD_SK
;
248 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
249 IXGB_WRITE_FLUSH(hw
);
252 /* Falling edge of clock */
253 eecd_reg
&= ~IXGB_EECD_SK
;
254 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
255 IXGB_WRITE_FLUSH(hw
);
259 /******************************************************************************
260 * Terminates a command by lowering the EEPROM's chip select pin
262 * hw - Struct containing variables accessed by shared code
263 *****************************************************************************/
265 ixgb_cleanup_eeprom(struct ixgb_hw
*hw
)
269 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
271 eecd_reg
&= ~(IXGB_EECD_CS
| IXGB_EECD_DI
);
273 IXGB_WRITE_REG(hw
, EECD
, eecd_reg
);
275 ixgb_clock_eeprom(hw
);
278 /******************************************************************************
279 * Waits for the EEPROM to finish the current command.
281 * hw - Struct containing variables accessed by shared code
283 * The command is done when the EEPROM's data out pin goes high.
286 * true: EEPROM data pin is high before timeout.
287 * false: Time expired.
288 *****************************************************************************/
290 ixgb_wait_eeprom_command(struct ixgb_hw
*hw
)
295 /* Toggle the CS line. This in effect tells to EEPROM to actually execute
296 * the command in question.
298 ixgb_standby_eeprom(hw
);
300 /* Now read DO repeatedly until is high (equal to '1'). The EEPROM will
301 * signal that the command has been completed by raising the DO signal.
302 * If DO does not go high in 10 milliseconds, then error out.
304 for (i
= 0; i
< 200; i
++) {
305 eecd_reg
= IXGB_READ_REG(hw
, EECD
);
307 if (eecd_reg
& IXGB_EECD_DO
)
316 /******************************************************************************
317 * Verifies that the EEPROM has a valid checksum
319 * hw - Struct containing variables accessed by shared code
321 * Reads the first 64 16 bit words of the EEPROM and sums the values read.
322 * If the sum of the 64 16 bit words is 0xBABA, the EEPROM's checksum is
326 * true: Checksum is valid
327 * false: Checksum is not valid.
328 *****************************************************************************/
330 ixgb_validate_eeprom_checksum(struct ixgb_hw
*hw
)
335 for (i
= 0; i
< (EEPROM_CHECKSUM_REG
+ 1); i
++)
336 checksum
+= ixgb_read_eeprom(hw
, i
);
338 if (checksum
== (u16
) EEPROM_SUM
)
344 /******************************************************************************
345 * Calculates the EEPROM checksum and writes it to the EEPROM
347 * hw - Struct containing variables accessed by shared code
349 * Sums the first 63 16 bit words of the EEPROM. Subtracts the sum from 0xBABA.
350 * Writes the difference to word offset 63 of the EEPROM.
351 *****************************************************************************/
353 ixgb_update_eeprom_checksum(struct ixgb_hw
*hw
)
358 for (i
= 0; i
< EEPROM_CHECKSUM_REG
; i
++)
359 checksum
+= ixgb_read_eeprom(hw
, i
);
361 checksum
= (u16
) EEPROM_SUM
- checksum
;
363 ixgb_write_eeprom(hw
, EEPROM_CHECKSUM_REG
, checksum
);
366 /******************************************************************************
367 * Writes a 16 bit word to a given offset in the EEPROM.
369 * hw - Struct containing variables accessed by shared code
370 * reg - offset within the EEPROM to be written to
371 * data - 16 bit word to be written to the EEPROM
373 * If ixgb_update_eeprom_checksum is not called after this function, the
374 * EEPROM will most likely contain an invalid checksum.
376 *****************************************************************************/
378 ixgb_write_eeprom(struct ixgb_hw
*hw
, u16 offset
, u16 data
)
380 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
382 /* Prepare the EEPROM for writing */
383 ixgb_setup_eeprom(hw
);
385 /* Send the 9-bit EWEN (write enable) command to the EEPROM (5-bit opcode
386 * plus 4-bit dummy). This puts the EEPROM into write/erase mode.
388 ixgb_shift_out_bits(hw
, EEPROM_EWEN_OPCODE
, 5);
389 ixgb_shift_out_bits(hw
, 0, 4);
391 /* Prepare the EEPROM */
392 ixgb_standby_eeprom(hw
);
394 /* Send the Write command (3-bit opcode + 6-bit addr) */
395 ixgb_shift_out_bits(hw
, EEPROM_WRITE_OPCODE
, 3);
396 ixgb_shift_out_bits(hw
, offset
, 6);
399 ixgb_shift_out_bits(hw
, data
, 16);
401 ixgb_wait_eeprom_command(hw
);
403 /* Recover from write */
404 ixgb_standby_eeprom(hw
);
406 /* Send the 9-bit EWDS (write disable) command to the EEPROM (5-bit
407 * opcode plus 4-bit dummy). This takes the EEPROM out of write/erase
410 ixgb_shift_out_bits(hw
, EEPROM_EWDS_OPCODE
, 5);
411 ixgb_shift_out_bits(hw
, 0, 4);
413 /* Done with writing */
414 ixgb_cleanup_eeprom(hw
);
416 /* clear the init_ctrl_reg_1 to signify that the cache is invalidated */
417 ee_map
->init_ctrl_reg_1
= cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR
);
420 /******************************************************************************
421 * Reads a 16 bit word from the EEPROM.
423 * hw - Struct containing variables accessed by shared code
424 * offset - offset of 16 bit word in the EEPROM to read
427 * The 16-bit value read from the eeprom
428 *****************************************************************************/
430 ixgb_read_eeprom(struct ixgb_hw
*hw
,
435 /* Prepare the EEPROM for reading */
436 ixgb_setup_eeprom(hw
);
438 /* Send the READ command (opcode + addr) */
439 ixgb_shift_out_bits(hw
, EEPROM_READ_OPCODE
, 3);
441 * We have a 64 word EEPROM, there are 6 address bits
443 ixgb_shift_out_bits(hw
, offset
, 6);
446 data
= ixgb_shift_in_bits(hw
);
448 /* End this read operation */
449 ixgb_standby_eeprom(hw
);
454 /******************************************************************************
455 * Reads eeprom and stores data in shared structure.
456 * Validates eeprom checksum and eeprom signature.
458 * hw - Struct containing variables accessed by shared code
461 * true: if eeprom read is successful
463 *****************************************************************************/
465 ixgb_get_eeprom_data(struct ixgb_hw
*hw
)
469 struct ixgb_ee_map_type
*ee_map
;
473 ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
475 pr_debug("Reading eeprom data\n");
476 for (i
= 0; i
< IXGB_EEPROM_SIZE
; i
++) {
478 ee_data
= ixgb_read_eeprom(hw
, i
);
480 hw
->eeprom
[i
] = cpu_to_le16(ee_data
);
483 if (checksum
!= (u16
) EEPROM_SUM
) {
484 pr_debug("Checksum invalid\n");
485 /* clear the init_ctrl_reg_1 to signify that the cache is
487 ee_map
->init_ctrl_reg_1
= cpu_to_le16(EEPROM_ICW1_SIGNATURE_CLEAR
);
491 if ((ee_map
->init_ctrl_reg_1
& cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK
))
492 != cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID
)) {
493 pr_debug("Signature invalid\n");
500 /******************************************************************************
501 * Local function to check if the eeprom signature is good
502 * If the eeprom signature is good, calls ixgb)get_eeprom_data.
504 * hw - Struct containing variables accessed by shared code
507 * true: eeprom signature was good and the eeprom read was successful
509 ******************************************************************************/
511 ixgb_check_and_get_eeprom_data (struct ixgb_hw
* hw
)
513 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
515 if ((ee_map
->init_ctrl_reg_1
& cpu_to_le16(EEPROM_ICW1_SIGNATURE_MASK
))
516 == cpu_to_le16(EEPROM_ICW1_SIGNATURE_VALID
)) {
519 return ixgb_get_eeprom_data(hw
);
523 /******************************************************************************
524 * return a word from the eeprom
526 * hw - Struct containing variables accessed by shared code
527 * index - Offset of eeprom word
530 * Word at indexed offset in eeprom, if valid, 0 otherwise.
531 ******************************************************************************/
533 ixgb_get_eeprom_word(struct ixgb_hw
*hw
, u16 index
)
536 if ((index
< IXGB_EEPROM_SIZE
) &&
537 (ixgb_check_and_get_eeprom_data(hw
) == true)) {
538 return hw
->eeprom
[index
];
544 /******************************************************************************
545 * return the mac address from EEPROM
547 * hw - Struct containing variables accessed by shared code
548 * mac_addr - Ethernet Address if EEPROM contents are valid, 0 otherwise
551 ******************************************************************************/
553 ixgb_get_ee_mac_addr(struct ixgb_hw
*hw
,
557 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
561 if (ixgb_check_and_get_eeprom_data(hw
) == true) {
562 for (i
= 0; i
< IXGB_ETH_LENGTH_OF_ADDRESS
; i
++) {
563 mac_addr
[i
] = ee_map
->mac_addr
[i
];
565 pr_debug("eeprom mac address = %pM\n", mac_addr
);
570 /******************************************************************************
571 * return the Printed Board Assembly number from EEPROM
573 * hw - Struct containing variables accessed by shared code
576 * PBA number if EEPROM contents are valid, 0 otherwise
577 ******************************************************************************/
579 ixgb_get_ee_pba_number(struct ixgb_hw
*hw
)
581 if (ixgb_check_and_get_eeprom_data(hw
) == true)
582 return le16_to_cpu(hw
->eeprom
[EEPROM_PBA_1_2_REG
])
583 | (le16_to_cpu(hw
->eeprom
[EEPROM_PBA_3_4_REG
])<<16);
589 /******************************************************************************
590 * return the Device Id from EEPROM
592 * hw - Struct containing variables accessed by shared code
595 * Device Id if EEPROM contents are valid, 0 otherwise
596 ******************************************************************************/
598 ixgb_get_ee_device_id(struct ixgb_hw
*hw
)
600 struct ixgb_ee_map_type
*ee_map
= (struct ixgb_ee_map_type
*)hw
->eeprom
;
602 if (ixgb_check_and_get_eeprom_data(hw
) == true)
603 return le16_to_cpu(ee_map
->device_id
);