3 8139too.c: A RealTek RTL-8139 Fast Ethernet driver for Linux.
5 Maintained by Jeff Garzik <jgarzik@pobox.com>
6 Copyright 2000-2002 Jeff Garzik
8 Much code comes from Donald Becker's rtl8139.c driver,
9 versions 1.13 and older. This driver was originally based
10 on rtl8139.c version 1.07. Header of rtl8139.c version 1.13:
14 Written 1997-2001 by Donald Becker.
15 This software may be used and distributed according to the
16 terms of the GNU General Public License (GPL), incorporated
17 herein by reference. Drivers based on or derived from this
18 code fall under the GPL and must retain the authorship,
19 copyright and license notice. This file is not a complete
20 program and may only be used when the entire operating
21 system is licensed under the GPL.
23 This driver is for boards based on the RTL8129 and RTL8139
26 The author may be reached as becker@scyld.com, or C/O Scyld
27 Computing Corporation 410 Severn Ave., Suite 210 Annapolis
30 Support and updates available at
31 http://www.scyld.com/network/rtl8139.html
33 Twister-tuning table provided by Kinston
34 <shangh@realtek.com.tw>.
38 This software may be used and distributed according to the terms
39 of the GNU General Public License, incorporated herein by reference.
43 Donald Becker - he wrote the original driver, kudos to him!
44 (but please don't e-mail him for support, this isn't his driver)
46 Tigran Aivazian - bug fixes, skbuff free cleanup
48 Martin Mares - suggestions for PCI cleanup
50 David S. Miller - PCI DMA and softnet updates
52 Ernst Gill - fixes ported from BSD driver
54 Daniel Kobras - identified specific locations of
55 posted MMIO write bugginess
57 Gerard Sharp - bug fix, testing and feedback
59 David Ford - Rx ring wrap fix
61 Dan DeMaggio - swapped RTL8139 cards with me, and allowed me
62 to find and fix a crucial bug on older chipsets.
64 Donald Becker/Chris Butterworth/Marcus Westergren -
65 Noticed various Rx packet size-related buglets.
67 Santiago Garcia Mantinan - testing and feedback
69 Jens David - 2.2.x kernel backports
71 Martin Dennett - incredibly helpful insight on undocumented
72 features of the 8139 chips
74 Jean-Jacques Michel - bug fix
76 Tobias Ringström - Rx interrupt status checking suggestion
78 Andrew Morton - Clear blocked signals, avoid
79 buffer overrun setting current->comm.
81 Kalle Olavi Niemitalo - Wake-on-LAN ioctls
83 Robert Kuebel - Save kernel thread from dying on any signal.
85 Submitting bug reports:
87 "rtl8139-diag -mmmaaavvveefN" output
88 enable RTL8139_DEBUG below, and look at 'dmesg' or kernel log
92 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
94 #define DRV_NAME "8139too"
95 #define DRV_VERSION "0.9.28"
98 #include <linux/module.h>
99 #include <linux/kernel.h>
100 #include <linux/compiler.h>
101 #include <linux/pci.h>
102 #include <linux/init.h>
103 #include <linux/interrupt.h>
104 #include <linux/netdevice.h>
105 #include <linux/etherdevice.h>
106 #include <linux/rtnetlink.h>
107 #include <linux/delay.h>
108 #include <linux/ethtool.h>
109 #include <linux/mii.h>
110 #include <linux/completion.h>
111 #include <linux/crc32.h>
112 #include <linux/io.h>
113 #include <linux/uaccess.h>
114 #include <linux/gfp.h>
117 #define RTL8139_DRIVER_NAME DRV_NAME " Fast Ethernet driver " DRV_VERSION
119 /* Default Message level */
120 #define RTL8139_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
125 /* define to 1, 2 or 3 to enable copious debugging info */
126 #define RTL8139_DEBUG 0
128 /* define to 1 to disable lightweight runtime debugging checks */
129 #undef RTL8139_NDEBUG
132 #ifdef RTL8139_NDEBUG
133 # define assert(expr) do {} while (0)
135 # define assert(expr) \
136 if (unlikely(!(expr))) { \
137 pr_err("Assertion failed! %s,%s,%s,line=%d\n", \
138 #expr, __FILE__, __func__, __LINE__); \
143 /* A few user-configurable values. */
146 static int media
[MAX_UNITS
] = {-1, -1, -1, -1, -1, -1, -1, -1};
147 static int full_duplex
[MAX_UNITS
] = {-1, -1, -1, -1, -1, -1, -1, -1};
149 /* Whether to use MMIO or PIO. Default to MMIO. */
150 #ifdef CONFIG_8139TOO_PIO
151 static int use_io
= 1;
153 static int use_io
= 0;
156 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
157 The RTL chips use a 64 element hash table based on the Ethernet CRC. */
158 static int multicast_filter_limit
= 32;
160 /* bitmapped message enable number */
161 static int debug
= -1;
165 * Warning: 64K ring has hardware issues and may lock up.
167 #if defined(CONFIG_SH_DREAMCAST)
168 #define RX_BUF_IDX 0 /* 8K ring */
170 #define RX_BUF_IDX 2 /* 32K ring */
172 #define RX_BUF_LEN (8192 << RX_BUF_IDX)
173 #define RX_BUF_PAD 16
174 #define RX_BUF_WRAP_PAD 2048 /* spare padding to handle lack of packet wrap */
176 #if RX_BUF_LEN == 65536
177 #define RX_BUF_TOT_LEN RX_BUF_LEN
179 #define RX_BUF_TOT_LEN (RX_BUF_LEN + RX_BUF_PAD + RX_BUF_WRAP_PAD)
182 /* Number of Tx descriptor registers. */
183 #define NUM_TX_DESC 4
185 /* max supported ethernet frame size -- must be at least (dev->mtu+14+4).*/
186 #define MAX_ETH_FRAME_SIZE 1536
188 /* Size of the Tx bounce buffers -- must be at least (dev->mtu+14+4). */
189 #define TX_BUF_SIZE MAX_ETH_FRAME_SIZE
190 #define TX_BUF_TOT_LEN (TX_BUF_SIZE * NUM_TX_DESC)
192 /* PCI Tuning Parameters
193 Threshold is bytes transferred to chip before transmission starts. */
194 #define TX_FIFO_THRESH 256 /* In bytes, rounded down to 32 byte units. */
196 /* The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024, 7==end of packet. */
197 #define RX_FIFO_THRESH 7 /* Rx buffer level before first PCI xfer. */
198 #define RX_DMA_BURST 7 /* Maximum PCI burst, '6' is 1024 */
199 #define TX_DMA_BURST 6 /* Maximum PCI burst, '6' is 1024 */
200 #define TX_RETRY 8 /* 0-15. retries = 16 + (TX_RETRY * 16) */
202 /* Operational parameters that usually are not changed. */
203 /* Time in jiffies before concluding the transmitter is hung. */
204 #define TX_TIMEOUT (6*HZ)
208 HAS_MII_XCVR
= 0x010000,
209 HAS_CHIP_XCVR
= 0x020000,
210 HAS_LNK_CHNG
= 0x040000,
213 #define RTL_NUM_STATS 4 /* number of ETHTOOL_GSTATS u64's */
214 #define RTL_REGS_VER 1 /* version of reg. data in ETHTOOL_GREGS */
215 #define RTL_MIN_IO_SIZE 0x80
216 #define RTL8139B_IO_SIZE 256
218 #define RTL8129_CAPS HAS_MII_XCVR
219 #define RTL8139_CAPS (HAS_CHIP_XCVR|HAS_LNK_CHNG)
227 /* indexed by board_t, above */
228 static const struct {
231 } board_info
[] __devinitdata
= {
232 { "RealTek RTL8139", RTL8139_CAPS
},
233 { "RealTek RTL8129", RTL8129_CAPS
},
237 static DEFINE_PCI_DEVICE_TABLE(rtl8139_pci_tbl
) = {
238 {0x10ec, 0x8139, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
239 {0x10ec, 0x8138, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
240 {0x1113, 0x1211, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
241 {0x1500, 0x1360, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
242 {0x4033, 0x1360, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
243 {0x1186, 0x1300, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
244 {0x1186, 0x1340, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
245 {0x13d1, 0xab06, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
246 {0x1259, 0xa117, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
247 {0x1259, 0xa11e, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
248 {0x14ea, 0xab06, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
249 {0x14ea, 0xab07, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
250 {0x11db, 0x1234, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
251 {0x1432, 0x9130, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
252 {0x02ac, 0x1012, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
253 {0x018a, 0x0106, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
254 {0x126c, 0x1211, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
255 {0x1743, 0x8139, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
256 {0x021b, 0x8139, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
258 #ifdef CONFIG_SH_SECUREEDGE5410
259 /* Bogus 8139 silicon reports 8129 without external PROM :-( */
260 {0x10ec, 0x8129, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8139
},
262 #ifdef CONFIG_8139TOO_8129
263 {0x10ec, 0x8129, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0, RTL8129
},
266 /* some crazy cards report invalid vendor ids like
267 * 0x0001 here. The other ids are valid and constant,
268 * so we simply don't match on the main vendor id.
270 {PCI_ANY_ID
, 0x8139, 0x10ec, 0x8139, 0, 0, RTL8139
},
271 {PCI_ANY_ID
, 0x8139, 0x1186, 0x1300, 0, 0, RTL8139
},
272 {PCI_ANY_ID
, 0x8139, 0x13d1, 0xab06, 0, 0, RTL8139
},
276 MODULE_DEVICE_TABLE (pci
, rtl8139_pci_tbl
);
279 const char str
[ETH_GSTRING_LEN
];
280 } ethtool_stats_keys
[] = {
284 { "rx_lost_in_ring" },
287 /* The rest of these values should never change. */
289 /* Symbolic offsets to registers. */
290 enum RTL8139_registers
{
291 MAC0
= 0, /* Ethernet hardware address. */
292 MAR0
= 8, /* Multicast filter. */
293 TxStatus0
= 0x10, /* Transmit status (Four 32bit registers). */
294 TxAddr0
= 0x20, /* Tx descriptors (also four 32bit). */
303 Timer
= 0x48, /* A general-purpose counter. */
304 RxMissed
= 0x4C, /* 24 bits valid, write clears. */
311 Config4
= 0x5A, /* absent on RTL-8139A */
315 BasicModeCtrl
= 0x62,
316 BasicModeStatus
= 0x64,
319 NWayExpansion
= 0x6A,
320 /* Undocumented registers, but required for proper operation. */
321 FIFOTMS
= 0x70, /* FIFO Control and test. */
322 CSCR
= 0x74, /* Chip Status and Configuration Register. */
324 FlashReg
= 0xD4, /* Communication with Flash ROM, four bytes. */
325 PARA7c
= 0x7c, /* Magic transceiver parameter register. */
326 Config5
= 0xD8, /* absent on RTL-8139A */
330 MultiIntrClear
= 0xF000,
332 Config1Clear
= (1<<7)|(1<<6)|(1<<3)|(1<<2)|(1<<1),
342 /* Interrupt register bits, using my own meaningful names. */
343 enum IntrStatusBits
{
354 RxAckBits
= RxFIFOOver
| RxOverflow
| RxOK
,
361 TxOutOfWindow
= 0x20000000,
362 TxAborted
= 0x40000000,
363 TxCarrierLost
= 0x80000000,
366 RxMulticast
= 0x8000,
368 RxBroadcast
= 0x2000,
369 RxBadSymbol
= 0x0020,
377 /* Bits in RxConfig. */
381 AcceptBroadcast
= 0x08,
382 AcceptMulticast
= 0x04,
384 AcceptAllPhys
= 0x01,
387 /* Bits in TxConfig. */
388 enum tx_config_bits
{
389 /* Interframe Gap Time. Only TxIFG96 doesn't violate IEEE 802.3 */
391 TxIFG84
= (0 << TxIFGShift
), /* 8.4us / 840ns (10 / 100Mbps) */
392 TxIFG88
= (1 << TxIFGShift
), /* 8.8us / 880ns (10 / 100Mbps) */
393 TxIFG92
= (2 << TxIFGShift
), /* 9.2us / 920ns (10 / 100Mbps) */
394 TxIFG96
= (3 << TxIFGShift
), /* 9.6us / 960ns (10 / 100Mbps) */
396 TxLoopBack
= (1 << 18) | (1 << 17), /* enable loopback test mode */
397 TxCRC
= (1 << 16), /* DISABLE Tx pkt CRC append */
398 TxClearAbt
= (1 << 0), /* Clear abort (WO) */
399 TxDMAShift
= 8, /* DMA burst value (0-7) is shifted X many bits */
400 TxRetryShift
= 4, /* TXRR value (0-15) is shifted X many bits */
402 TxVersionMask
= 0x7C800000, /* mask out version bits 30-26, 23 */
405 /* Bits in Config1 */
407 Cfg1_PM_Enable
= 0x01,
408 Cfg1_VPD_Enable
= 0x02,
411 LWAKE
= 0x10, /* not on 8139, 8139A */
412 Cfg1_Driver_Load
= 0x20,
415 SLEEP
= (1 << 1), /* only on 8139, 8139A */
416 PWRDN
= (1 << 0), /* only on 8139, 8139A */
419 /* Bits in Config3 */
421 Cfg3_FBtBEn
= (1 << 0), /* 1 = Fast Back to Back */
422 Cfg3_FuncRegEn
= (1 << 1), /* 1 = enable CardBus Function registers */
423 Cfg3_CLKRUN_En
= (1 << 2), /* 1 = enable CLKRUN */
424 Cfg3_CardB_En
= (1 << 3), /* 1 = enable CardBus registers */
425 Cfg3_LinkUp
= (1 << 4), /* 1 = wake up on link up */
426 Cfg3_Magic
= (1 << 5), /* 1 = wake up on Magic Packet (tm) */
427 Cfg3_PARM_En
= (1 << 6), /* 0 = software can set twister parameters */
428 Cfg3_GNTSel
= (1 << 7), /* 1 = delay 1 clock from PCI GNT signal */
431 /* Bits in Config4 */
433 LWPTN
= (1 << 2), /* not on 8139, 8139A */
436 /* Bits in Config5 */
438 Cfg5_PME_STS
= (1 << 0), /* 1 = PCI reset resets PME_Status */
439 Cfg5_LANWake
= (1 << 1), /* 1 = enable LANWake signal */
440 Cfg5_LDPS
= (1 << 2), /* 0 = save power when link is down */
441 Cfg5_FIFOAddrPtr
= (1 << 3), /* Realtek internal SRAM testing */
442 Cfg5_UWF
= (1 << 4), /* 1 = accept unicast wakeup frame */
443 Cfg5_MWF
= (1 << 5), /* 1 = accept multicast wakeup frame */
444 Cfg5_BWF
= (1 << 6), /* 1 = accept broadcast wakeup frame */
448 /* rx fifo threshold */
450 RxCfgFIFONone
= (7 << RxCfgFIFOShift
),
454 RxCfgDMAUnlimited
= (7 << RxCfgDMAShift
),
456 /* rx ring buffer length */
458 RxCfgRcv16K
= (1 << 11),
459 RxCfgRcv32K
= (1 << 12),
460 RxCfgRcv64K
= (1 << 11) | (1 << 12),
462 /* Disable packet wrap at end of Rx buffer. (not possible with 64k) */
466 /* Twister tuning parameters from RealTek.
467 Completely undocumented, but required to tune bad links on some boards. */
469 CSCR_LinkOKBit
= 0x0400,
470 CSCR_LinkChangeBit
= 0x0800,
471 CSCR_LinkStatusBits
= 0x0f000,
472 CSCR_LinkDownOffCmd
= 0x003c0,
473 CSCR_LinkDownCmd
= 0x0f3c0,
478 Cfg9346_Unlock
= 0xC0,
495 HasHltClk
= (1 << 0),
499 #define HW_REVID(b30, b29, b28, b27, b26, b23, b22) \
500 (b30<<30 | b29<<29 | b28<<28 | b27<<27 | b26<<26 | b23<<23 | b22<<22)
501 #define HW_REVID_MASK HW_REVID(1, 1, 1, 1, 1, 1, 1)
503 /* directly indexed by chip_t, above */
504 static const struct {
506 u32 version
; /* from RTL8139C/RTL8139D docs */
508 } rtl_chip_info
[] = {
510 HW_REVID(1, 0, 0, 0, 0, 0, 0),
515 HW_REVID(1, 1, 0, 0, 0, 0, 0),
520 HW_REVID(1, 1, 1, 0, 0, 0, 0),
521 HasHltClk
, /* XXX undocumented? */
525 HW_REVID(1, 1, 1, 0, 0, 1, 0),
526 HasHltClk
, /* XXX undocumented? */
530 HW_REVID(1, 1, 1, 1, 0, 0, 0),
535 HW_REVID(1, 1, 1, 1, 1, 0, 0),
540 HW_REVID(1, 1, 1, 0, 1, 0, 0),
545 HW_REVID(1, 1, 1, 1, 0, 1, 0),
550 HW_REVID(1, 1, 1, 0, 1, 0, 1),
551 HasHltClk
/* XXX undocumented? */
556 HW_REVID(1, 1, 1, 0, 1, 1, 1),
561 struct rtl_extra_stats
{
562 unsigned long early_rx
;
563 unsigned long tx_buf_mapped
;
564 unsigned long tx_timeouts
;
565 unsigned long rx_lost_in_ring
;
568 struct rtl8139_private
{
569 void __iomem
*mmio_addr
;
571 struct pci_dev
*pci_dev
;
573 struct napi_struct napi
;
574 struct net_device
*dev
;
576 unsigned char *rx_ring
;
577 unsigned int cur_rx
; /* RX buf index of next pkt */
578 dma_addr_t rx_ring_dma
;
580 unsigned int tx_flag
;
581 unsigned long cur_tx
;
582 unsigned long dirty_tx
;
583 unsigned char *tx_buf
[NUM_TX_DESC
]; /* Tx bounce buffers */
584 unsigned char *tx_bufs
; /* Tx bounce buffer region. */
585 dma_addr_t tx_bufs_dma
;
587 signed char phys
[4]; /* MII device addresses. */
589 /* Twister tune state. */
590 char twistie
, twist_row
, twist_col
;
592 unsigned int watchdog_fired
: 1;
593 unsigned int default_port
: 4; /* Last dev->if_port value. */
594 unsigned int have_thread
: 1;
601 struct rtl_extra_stats xstats
;
603 struct delayed_work thread
;
605 struct mii_if_info mii
;
606 unsigned int regs_len
;
607 unsigned long fifo_copy_timeout
;
610 MODULE_AUTHOR ("Jeff Garzik <jgarzik@pobox.com>");
611 MODULE_DESCRIPTION ("RealTek RTL-8139 Fast Ethernet driver");
612 MODULE_LICENSE("GPL");
613 MODULE_VERSION(DRV_VERSION
);
615 module_param(use_io
, int, 0);
616 MODULE_PARM_DESC(use_io
, "Force use of I/O access mode. 0=MMIO 1=PIO");
617 module_param(multicast_filter_limit
, int, 0);
618 module_param_array(media
, int, NULL
, 0);
619 module_param_array(full_duplex
, int, NULL
, 0);
620 module_param(debug
, int, 0);
621 MODULE_PARM_DESC (debug
, "8139too bitmapped message enable number");
622 MODULE_PARM_DESC (multicast_filter_limit
, "8139too maximum number of filtered multicast addresses");
623 MODULE_PARM_DESC (media
, "8139too: Bits 4+9: force full duplex, bit 5: 100Mbps");
624 MODULE_PARM_DESC (full_duplex
, "8139too: Force full duplex for board(s) (1)");
626 static int read_eeprom (void __iomem
*ioaddr
, int location
, int addr_len
);
627 static int rtl8139_open (struct net_device
*dev
);
628 static int mdio_read (struct net_device
*dev
, int phy_id
, int location
);
629 static void mdio_write (struct net_device
*dev
, int phy_id
, int location
,
631 static void rtl8139_start_thread(struct rtl8139_private
*tp
);
632 static void rtl8139_tx_timeout (struct net_device
*dev
);
633 static void rtl8139_init_ring (struct net_device
*dev
);
634 static netdev_tx_t
rtl8139_start_xmit (struct sk_buff
*skb
,
635 struct net_device
*dev
);
636 #ifdef CONFIG_NET_POLL_CONTROLLER
637 static void rtl8139_poll_controller(struct net_device
*dev
);
639 static int rtl8139_set_mac_address(struct net_device
*dev
, void *p
);
640 static int rtl8139_poll(struct napi_struct
*napi
, int budget
);
641 static irqreturn_t
rtl8139_interrupt (int irq
, void *dev_instance
);
642 static int rtl8139_close (struct net_device
*dev
);
643 static int netdev_ioctl (struct net_device
*dev
, struct ifreq
*rq
, int cmd
);
644 static struct net_device_stats
*rtl8139_get_stats (struct net_device
*dev
);
645 static void rtl8139_set_rx_mode (struct net_device
*dev
);
646 static void __set_rx_mode (struct net_device
*dev
);
647 static void rtl8139_hw_start (struct net_device
*dev
);
648 static void rtl8139_thread (struct work_struct
*work
);
649 static void rtl8139_tx_timeout_task(struct work_struct
*work
);
650 static const struct ethtool_ops rtl8139_ethtool_ops
;
652 /* write MMIO register, with flush */
653 /* Flush avoids rtl8139 bug w/ posted MMIO writes */
654 #define RTL_W8_F(reg, val8) do { iowrite8 ((val8), ioaddr + (reg)); ioread8 (ioaddr + (reg)); } while (0)
655 #define RTL_W16_F(reg, val16) do { iowrite16 ((val16), ioaddr + (reg)); ioread16 (ioaddr + (reg)); } while (0)
656 #define RTL_W32_F(reg, val32) do { iowrite32 ((val32), ioaddr + (reg)); ioread32 (ioaddr + (reg)); } while (0)
658 /* write MMIO register */
659 #define RTL_W8(reg, val8) iowrite8 ((val8), ioaddr + (reg))
660 #define RTL_W16(reg, val16) iowrite16 ((val16), ioaddr + (reg))
661 #define RTL_W32(reg, val32) iowrite32 ((val32), ioaddr + (reg))
663 /* read MMIO register */
664 #define RTL_R8(reg) ioread8 (ioaddr + (reg))
665 #define RTL_R16(reg) ioread16 (ioaddr + (reg))
666 #define RTL_R32(reg) ioread32 (ioaddr + (reg))
669 static const u16 rtl8139_intr_mask
=
670 PCIErr
| PCSTimeout
| RxUnderrun
| RxOverflow
| RxFIFOOver
|
671 TxErr
| TxOK
| RxErr
| RxOK
;
673 static const u16 rtl8139_norx_intr_mask
=
674 PCIErr
| PCSTimeout
| RxUnderrun
|
675 TxErr
| TxOK
| RxErr
;
678 static const unsigned int rtl8139_rx_config
=
679 RxCfgRcv8K
| RxNoWrap
|
680 (RX_FIFO_THRESH
<< RxCfgFIFOShift
) |
681 (RX_DMA_BURST
<< RxCfgDMAShift
);
682 #elif RX_BUF_IDX == 1
683 static const unsigned int rtl8139_rx_config
=
684 RxCfgRcv16K
| RxNoWrap
|
685 (RX_FIFO_THRESH
<< RxCfgFIFOShift
) |
686 (RX_DMA_BURST
<< RxCfgDMAShift
);
687 #elif RX_BUF_IDX == 2
688 static const unsigned int rtl8139_rx_config
=
689 RxCfgRcv32K
| RxNoWrap
|
690 (RX_FIFO_THRESH
<< RxCfgFIFOShift
) |
691 (RX_DMA_BURST
<< RxCfgDMAShift
);
692 #elif RX_BUF_IDX == 3
693 static const unsigned int rtl8139_rx_config
=
695 (RX_FIFO_THRESH
<< RxCfgFIFOShift
) |
696 (RX_DMA_BURST
<< RxCfgDMAShift
);
698 #error "Invalid configuration for 8139_RXBUF_IDX"
701 static const unsigned int rtl8139_tx_config
=
702 TxIFG96
| (TX_DMA_BURST
<< TxDMAShift
) | (TX_RETRY
<< TxRetryShift
);
704 static void __rtl8139_cleanup_dev (struct net_device
*dev
)
706 struct rtl8139_private
*tp
= netdev_priv(dev
);
707 struct pci_dev
*pdev
;
709 assert (dev
!= NULL
);
710 assert (tp
->pci_dev
!= NULL
);
714 pci_iounmap (pdev
, tp
->mmio_addr
);
716 /* it's ok to call this even if we have no regions to free */
717 pci_release_regions (pdev
);
720 pci_set_drvdata (pdev
, NULL
);
724 static void rtl8139_chip_reset (void __iomem
*ioaddr
)
728 /* Soft reset the chip. */
729 RTL_W8 (ChipCmd
, CmdReset
);
731 /* Check that the chip has finished the reset. */
732 for (i
= 1000; i
> 0; i
--) {
734 if ((RTL_R8 (ChipCmd
) & CmdReset
) == 0)
741 static __devinit
struct net_device
* rtl8139_init_board (struct pci_dev
*pdev
)
743 void __iomem
*ioaddr
;
744 struct net_device
*dev
;
745 struct rtl8139_private
*tp
;
747 int rc
, disable_dev_on_err
= 0;
749 unsigned long pio_start
, pio_end
, pio_flags
, pio_len
;
750 unsigned long mmio_start
, mmio_end
, mmio_flags
, mmio_len
;
753 assert (pdev
!= NULL
);
755 /* dev and priv zeroed in alloc_etherdev */
756 dev
= alloc_etherdev (sizeof (*tp
));
758 dev_err(&pdev
->dev
, "Unable to alloc new net device\n");
759 return ERR_PTR(-ENOMEM
);
761 SET_NETDEV_DEV(dev
, &pdev
->dev
);
763 tp
= netdev_priv(dev
);
766 /* enable device (incl. PCI PM wakeup and hotplug setup) */
767 rc
= pci_enable_device (pdev
);
771 pio_start
= pci_resource_start (pdev
, 0);
772 pio_end
= pci_resource_end (pdev
, 0);
773 pio_flags
= pci_resource_flags (pdev
, 0);
774 pio_len
= pci_resource_len (pdev
, 0);
776 mmio_start
= pci_resource_start (pdev
, 1);
777 mmio_end
= pci_resource_end (pdev
, 1);
778 mmio_flags
= pci_resource_flags (pdev
, 1);
779 mmio_len
= pci_resource_len (pdev
, 1);
781 /* set this immediately, we need to know before
782 * we talk to the chip directly */
783 pr_debug("PIO region size == 0x%02lX\n", pio_len
);
784 pr_debug("MMIO region size == 0x%02lX\n", mmio_len
);
788 /* make sure PCI base addr 0 is PIO */
789 if (!(pio_flags
& IORESOURCE_IO
)) {
790 dev_err(&pdev
->dev
, "region #0 not a PIO resource, aborting\n");
794 /* check for weird/broken PCI region reporting */
795 if (pio_len
< RTL_MIN_IO_SIZE
) {
796 dev_err(&pdev
->dev
, "Invalid PCI I/O region size(s), aborting\n");
801 /* make sure PCI base addr 1 is MMIO */
802 if (!(mmio_flags
& IORESOURCE_MEM
)) {
803 dev_err(&pdev
->dev
, "region #1 not an MMIO resource, aborting\n");
807 if (mmio_len
< RTL_MIN_IO_SIZE
) {
808 dev_err(&pdev
->dev
, "Invalid PCI mem region size(s), aborting\n");
814 rc
= pci_request_regions (pdev
, DRV_NAME
);
817 disable_dev_on_err
= 1;
819 /* enable PCI bus-mastering */
820 pci_set_master (pdev
);
823 ioaddr
= pci_iomap(pdev
, 0, 0);
825 dev_err(&pdev
->dev
, "cannot map PIO, aborting\n");
829 dev
->base_addr
= pio_start
;
830 tp
->regs_len
= pio_len
;
832 /* ioremap MMIO region */
833 ioaddr
= pci_iomap(pdev
, 1, 0);
834 if (ioaddr
== NULL
) {
835 dev_err(&pdev
->dev
, "cannot remap MMIO, trying PIO\n");
836 pci_release_regions(pdev
);
840 dev
->base_addr
= (long) ioaddr
;
841 tp
->regs_len
= mmio_len
;
843 tp
->mmio_addr
= ioaddr
;
845 /* Bring old chips out of low-power mode. */
846 RTL_W8 (HltClk
, 'R');
848 /* check for missing/broken hardware */
849 if (RTL_R32 (TxConfig
) == 0xFFFFFFFF) {
850 dev_err(&pdev
->dev
, "Chip not responding, ignoring board\n");
855 /* identify chip attached to board */
856 version
= RTL_R32 (TxConfig
) & HW_REVID_MASK
;
857 for (i
= 0; i
< ARRAY_SIZE (rtl_chip_info
); i
++)
858 if (version
== rtl_chip_info
[i
].version
) {
863 /* if unknown chip, assume array element #0, original RTL-8139 in this case */
865 dev_dbg(&pdev
->dev
, "unknown chip version, assuming RTL-8139\n");
866 dev_dbg(&pdev
->dev
, "TxConfig = 0x%x\n", RTL_R32 (TxConfig
));
870 pr_debug("chipset id (%d) == index %d, '%s'\n",
871 version
, i
, rtl_chip_info
[i
].name
);
873 if (tp
->chipset
>= CH_8139B
) {
874 u8 new_tmp8
= tmp8
= RTL_R8 (Config1
);
875 pr_debug("PCI PM wakeup\n");
876 if ((rtl_chip_info
[tp
->chipset
].flags
& HasLWake
) &&
879 new_tmp8
|= Cfg1_PM_Enable
;
880 if (new_tmp8
!= tmp8
) {
881 RTL_W8 (Cfg9346
, Cfg9346_Unlock
);
882 RTL_W8 (Config1
, tmp8
);
883 RTL_W8 (Cfg9346
, Cfg9346_Lock
);
885 if (rtl_chip_info
[tp
->chipset
].flags
& HasLWake
) {
886 tmp8
= RTL_R8 (Config4
);
888 RTL_W8 (Cfg9346
, Cfg9346_Unlock
);
889 RTL_W8 (Config4
, tmp8
& ~LWPTN
);
890 RTL_W8 (Cfg9346
, Cfg9346_Lock
);
894 pr_debug("Old chip wakeup\n");
895 tmp8
= RTL_R8 (Config1
);
896 tmp8
&= ~(SLEEP
| PWRDN
);
897 RTL_W8 (Config1
, tmp8
);
900 rtl8139_chip_reset (ioaddr
);
905 __rtl8139_cleanup_dev (dev
);
906 if (disable_dev_on_err
)
907 pci_disable_device (pdev
);
911 static const struct net_device_ops rtl8139_netdev_ops
= {
912 .ndo_open
= rtl8139_open
,
913 .ndo_stop
= rtl8139_close
,
914 .ndo_get_stats
= rtl8139_get_stats
,
915 .ndo_change_mtu
= eth_change_mtu
,
916 .ndo_validate_addr
= eth_validate_addr
,
917 .ndo_set_mac_address
= rtl8139_set_mac_address
,
918 .ndo_start_xmit
= rtl8139_start_xmit
,
919 .ndo_set_rx_mode
= rtl8139_set_rx_mode
,
920 .ndo_do_ioctl
= netdev_ioctl
,
921 .ndo_tx_timeout
= rtl8139_tx_timeout
,
922 #ifdef CONFIG_NET_POLL_CONTROLLER
923 .ndo_poll_controller
= rtl8139_poll_controller
,
927 static int __devinit
rtl8139_init_one (struct pci_dev
*pdev
,
928 const struct pci_device_id
*ent
)
930 struct net_device
*dev
= NULL
;
931 struct rtl8139_private
*tp
;
932 int i
, addr_len
, option
;
933 void __iomem
*ioaddr
;
934 static int board_idx
= -1;
936 assert (pdev
!= NULL
);
937 assert (ent
!= NULL
);
941 /* when we're built into the kernel, the driver version message
942 * is only printed if at least one 8139 board has been found
946 static int printed_version
;
947 if (!printed_version
++)
948 pr_info(RTL8139_DRIVER_NAME
"\n");
952 if (pdev
->vendor
== PCI_VENDOR_ID_REALTEK
&&
953 pdev
->device
== PCI_DEVICE_ID_REALTEK_8139
&& pdev
->revision
>= 0x20) {
955 "This (id %04x:%04x rev %02x) is an enhanced 8139C+ chip, use 8139cp\n",
956 pdev
->vendor
, pdev
->device
, pdev
->revision
);
960 if (pdev
->vendor
== PCI_VENDOR_ID_REALTEK
&&
961 pdev
->device
== PCI_DEVICE_ID_REALTEK_8139
&&
962 pdev
->subsystem_vendor
== PCI_VENDOR_ID_ATHEROS
&&
963 pdev
->subsystem_device
== PCI_DEVICE_ID_REALTEK_8139
) {
964 pr_info("OQO Model 2 detected. Forcing PIO\n");
968 dev
= rtl8139_init_board (pdev
);
972 assert (dev
!= NULL
);
973 tp
= netdev_priv(dev
);
976 ioaddr
= tp
->mmio_addr
;
977 assert (ioaddr
!= NULL
);
979 addr_len
= read_eeprom (ioaddr
, 0, 8) == 0x8129 ? 8 : 6;
980 for (i
= 0; i
< 3; i
++)
981 ((__le16
*) (dev
->dev_addr
))[i
] =
982 cpu_to_le16(read_eeprom (ioaddr
, i
+ 7, addr_len
));
983 memcpy(dev
->perm_addr
, dev
->dev_addr
, dev
->addr_len
);
985 /* The Rtl8139-specific entries in the device structure. */
986 dev
->netdev_ops
= &rtl8139_netdev_ops
;
987 dev
->ethtool_ops
= &rtl8139_ethtool_ops
;
988 dev
->watchdog_timeo
= TX_TIMEOUT
;
989 netif_napi_add(dev
, &tp
->napi
, rtl8139_poll
, 64);
991 /* note: the hardware is not capable of sg/csum/highdma, however
992 * through the use of skb_copy_and_csum_dev we enable these
995 dev
->features
|= NETIF_F_SG
| NETIF_F_HW_CSUM
| NETIF_F_HIGHDMA
;
996 dev
->vlan_features
= dev
->features
;
998 dev
->irq
= pdev
->irq
;
1000 /* tp zeroed and aligned in alloc_etherdev */
1001 tp
= netdev_priv(dev
);
1003 /* note: tp->chipset set in rtl8139_init_board */
1004 tp
->drv_flags
= board_info
[ent
->driver_data
].hw_flags
;
1005 tp
->mmio_addr
= ioaddr
;
1007 (debug
< 0 ? RTL8139_DEF_MSG_ENABLE
: ((1 << debug
) - 1));
1008 spin_lock_init (&tp
->lock
);
1009 spin_lock_init (&tp
->rx_lock
);
1010 INIT_DELAYED_WORK(&tp
->thread
, rtl8139_thread
);
1012 tp
->mii
.mdio_read
= mdio_read
;
1013 tp
->mii
.mdio_write
= mdio_write
;
1014 tp
->mii
.phy_id_mask
= 0x3f;
1015 tp
->mii
.reg_num_mask
= 0x1f;
1017 /* dev is fully set up and ready to use now */
1018 pr_debug("about to register device named %s (%p)...\n",
1020 i
= register_netdev (dev
);
1021 if (i
) goto err_out
;
1023 pci_set_drvdata (pdev
, dev
);
1025 netdev_info(dev
, "%s at 0x%lx, %pM, IRQ %d\n",
1026 board_info
[ent
->driver_data
].name
,
1027 dev
->base_addr
, dev
->dev_addr
, dev
->irq
);
1029 netdev_dbg(dev
, "Identified 8139 chip type '%s'\n",
1030 rtl_chip_info
[tp
->chipset
].name
);
1032 /* Find the connected MII xcvrs.
1033 Doing this in open() would allow detecting external xcvrs later, but
1034 takes too much time. */
1035 #ifdef CONFIG_8139TOO_8129
1036 if (tp
->drv_flags
& HAS_MII_XCVR
) {
1037 int phy
, phy_idx
= 0;
1038 for (phy
= 0; phy
< 32 && phy_idx
< sizeof(tp
->phys
); phy
++) {
1039 int mii_status
= mdio_read(dev
, phy
, 1);
1040 if (mii_status
!= 0xffff && mii_status
!= 0x0000) {
1041 u16 advertising
= mdio_read(dev
, phy
, 4);
1042 tp
->phys
[phy_idx
++] = phy
;
1043 netdev_info(dev
, "MII transceiver %d status 0x%04x advertising %04x\n",
1044 phy
, mii_status
, advertising
);
1048 netdev_info(dev
, "No MII transceivers found! Assuming SYM transceiver\n");
1054 tp
->mii
.phy_id
= tp
->phys
[0];
1056 /* The lower four bits are the media type. */
1057 option
= (board_idx
>= MAX_UNITS
) ? 0 : media
[board_idx
];
1059 tp
->mii
.full_duplex
= (option
& 0x210) ? 1 : 0;
1060 tp
->default_port
= option
& 0xFF;
1061 if (tp
->default_port
)
1062 tp
->mii
.force_media
= 1;
1064 if (board_idx
< MAX_UNITS
&& full_duplex
[board_idx
] > 0)
1065 tp
->mii
.full_duplex
= full_duplex
[board_idx
];
1066 if (tp
->mii
.full_duplex
) {
1067 netdev_info(dev
, "Media type forced to Full Duplex\n");
1068 /* Changing the MII-advertised media because might prevent
1070 tp
->mii
.force_media
= 1;
1072 if (tp
->default_port
) {
1073 netdev_info(dev
, " Forcing %dMbps %s-duplex operation\n",
1074 (option
& 0x20 ? 100 : 10),
1075 (option
& 0x10 ? "full" : "half"));
1076 mdio_write(dev
, tp
->phys
[0], 0,
1077 ((option
& 0x20) ? 0x2000 : 0) | /* 100Mbps? */
1078 ((option
& 0x10) ? 0x0100 : 0)); /* Full duplex? */
1081 /* Put the chip into low-power mode. */
1082 if (rtl_chip_info
[tp
->chipset
].flags
& HasHltClk
)
1083 RTL_W8 (HltClk
, 'H'); /* 'R' would leave the clock running. */
1088 __rtl8139_cleanup_dev (dev
);
1089 pci_disable_device (pdev
);
1094 static void __devexit
rtl8139_remove_one (struct pci_dev
*pdev
)
1096 struct net_device
*dev
= pci_get_drvdata (pdev
);
1097 struct rtl8139_private
*tp
= netdev_priv(dev
);
1099 assert (dev
!= NULL
);
1101 cancel_delayed_work_sync(&tp
->thread
);
1103 unregister_netdev (dev
);
1105 __rtl8139_cleanup_dev (dev
);
1106 pci_disable_device (pdev
);
1110 /* Serial EEPROM section. */
1112 /* EEPROM_Ctrl bits. */
1113 #define EE_SHIFT_CLK 0x04 /* EEPROM shift clock. */
1114 #define EE_CS 0x08 /* EEPROM chip select. */
1115 #define EE_DATA_WRITE 0x02 /* EEPROM chip data in. */
1116 #define EE_WRITE_0 0x00
1117 #define EE_WRITE_1 0x02
1118 #define EE_DATA_READ 0x01 /* EEPROM chip data out. */
1119 #define EE_ENB (0x80 | EE_CS)
1121 /* Delay between EEPROM clock transitions.
1122 No extra delay is needed with 33Mhz PCI, but 66Mhz may change this.
1125 #define eeprom_delay() (void)RTL_R32(Cfg9346)
1127 /* The EEPROM commands include the alway-set leading bit. */
1128 #define EE_WRITE_CMD (5)
1129 #define EE_READ_CMD (6)
1130 #define EE_ERASE_CMD (7)
1132 static int __devinit
read_eeprom (void __iomem
*ioaddr
, int location
, int addr_len
)
1135 unsigned retval
= 0;
1136 int read_cmd
= location
| (EE_READ_CMD
<< addr_len
);
1138 RTL_W8 (Cfg9346
, EE_ENB
& ~EE_CS
);
1139 RTL_W8 (Cfg9346
, EE_ENB
);
1142 /* Shift the read command bits out. */
1143 for (i
= 4 + addr_len
; i
>= 0; i
--) {
1144 int dataval
= (read_cmd
& (1 << i
)) ? EE_DATA_WRITE
: 0;
1145 RTL_W8 (Cfg9346
, EE_ENB
| dataval
);
1147 RTL_W8 (Cfg9346
, EE_ENB
| dataval
| EE_SHIFT_CLK
);
1150 RTL_W8 (Cfg9346
, EE_ENB
);
1153 for (i
= 16; i
> 0; i
--) {
1154 RTL_W8 (Cfg9346
, EE_ENB
| EE_SHIFT_CLK
);
1157 (retval
<< 1) | ((RTL_R8 (Cfg9346
) & EE_DATA_READ
) ? 1 :
1159 RTL_W8 (Cfg9346
, EE_ENB
);
1163 /* Terminate the EEPROM access. */
1164 RTL_W8 (Cfg9346
, ~EE_CS
);
1170 /* MII serial management: mostly bogus for now. */
1171 /* Read and write the MII management registers using software-generated
1172 serial MDIO protocol.
1173 The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
1174 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
1175 "overclocking" issues. */
1176 #define MDIO_DIR 0x80
1177 #define MDIO_DATA_OUT 0x04
1178 #define MDIO_DATA_IN 0x02
1179 #define MDIO_CLK 0x01
1180 #define MDIO_WRITE0 (MDIO_DIR)
1181 #define MDIO_WRITE1 (MDIO_DIR | MDIO_DATA_OUT)
1183 #define mdio_delay() RTL_R8(Config4)
1186 static const char mii_2_8139_map
[8] = {
1198 #ifdef CONFIG_8139TOO_8129
1199 /* Syncronize the MII management interface by shifting 32 one bits out. */
1200 static void mdio_sync (void __iomem
*ioaddr
)
1204 for (i
= 32; i
>= 0; i
--) {
1205 RTL_W8 (Config4
, MDIO_WRITE1
);
1207 RTL_W8 (Config4
, MDIO_WRITE1
| MDIO_CLK
);
1213 static int mdio_read (struct net_device
*dev
, int phy_id
, int location
)
1215 struct rtl8139_private
*tp
= netdev_priv(dev
);
1217 #ifdef CONFIG_8139TOO_8129
1218 void __iomem
*ioaddr
= tp
->mmio_addr
;
1219 int mii_cmd
= (0xf6 << 10) | (phy_id
<< 5) | location
;
1223 if (phy_id
> 31) { /* Really a 8139. Use internal registers. */
1224 void __iomem
*ioaddr
= tp
->mmio_addr
;
1225 return location
< 8 && mii_2_8139_map
[location
] ?
1226 RTL_R16 (mii_2_8139_map
[location
]) : 0;
1229 #ifdef CONFIG_8139TOO_8129
1231 /* Shift the read command bits out. */
1232 for (i
= 15; i
>= 0; i
--) {
1233 int dataval
= (mii_cmd
& (1 << i
)) ? MDIO_DATA_OUT
: 0;
1235 RTL_W8 (Config4
, MDIO_DIR
| dataval
);
1237 RTL_W8 (Config4
, MDIO_DIR
| dataval
| MDIO_CLK
);
1241 /* Read the two transition, 16 data, and wire-idle bits. */
1242 for (i
= 19; i
> 0; i
--) {
1243 RTL_W8 (Config4
, 0);
1245 retval
= (retval
<< 1) | ((RTL_R8 (Config4
) & MDIO_DATA_IN
) ? 1 : 0);
1246 RTL_W8 (Config4
, MDIO_CLK
);
1251 return (retval
>> 1) & 0xffff;
1255 static void mdio_write (struct net_device
*dev
, int phy_id
, int location
,
1258 struct rtl8139_private
*tp
= netdev_priv(dev
);
1259 #ifdef CONFIG_8139TOO_8129
1260 void __iomem
*ioaddr
= tp
->mmio_addr
;
1261 int mii_cmd
= (0x5002 << 16) | (phy_id
<< 23) | (location
<< 18) | value
;
1265 if (phy_id
> 31) { /* Really a 8139. Use internal registers. */
1266 void __iomem
*ioaddr
= tp
->mmio_addr
;
1267 if (location
== 0) {
1268 RTL_W8 (Cfg9346
, Cfg9346_Unlock
);
1269 RTL_W16 (BasicModeCtrl
, value
);
1270 RTL_W8 (Cfg9346
, Cfg9346_Lock
);
1271 } else if (location
< 8 && mii_2_8139_map
[location
])
1272 RTL_W16 (mii_2_8139_map
[location
], value
);
1276 #ifdef CONFIG_8139TOO_8129
1279 /* Shift the command bits out. */
1280 for (i
= 31; i
>= 0; i
--) {
1282 (mii_cmd
& (1 << i
)) ? MDIO_WRITE1
: MDIO_WRITE0
;
1283 RTL_W8 (Config4
, dataval
);
1285 RTL_W8 (Config4
, dataval
| MDIO_CLK
);
1288 /* Clear out extra bits. */
1289 for (i
= 2; i
> 0; i
--) {
1290 RTL_W8 (Config4
, 0);
1292 RTL_W8 (Config4
, MDIO_CLK
);
1299 static int rtl8139_open (struct net_device
*dev
)
1301 struct rtl8139_private
*tp
= netdev_priv(dev
);
1303 void __iomem
*ioaddr
= tp
->mmio_addr
;
1305 retval
= request_irq (dev
->irq
, rtl8139_interrupt
, IRQF_SHARED
, dev
->name
, dev
);
1309 tp
->tx_bufs
= dma_alloc_coherent(&tp
->pci_dev
->dev
, TX_BUF_TOT_LEN
,
1310 &tp
->tx_bufs_dma
, GFP_KERNEL
);
1311 tp
->rx_ring
= dma_alloc_coherent(&tp
->pci_dev
->dev
, RX_BUF_TOT_LEN
,
1312 &tp
->rx_ring_dma
, GFP_KERNEL
);
1313 if (tp
->tx_bufs
== NULL
|| tp
->rx_ring
== NULL
) {
1314 free_irq(dev
->irq
, dev
);
1317 dma_free_coherent(&tp
->pci_dev
->dev
, TX_BUF_TOT_LEN
,
1318 tp
->tx_bufs
, tp
->tx_bufs_dma
);
1320 dma_free_coherent(&tp
->pci_dev
->dev
, RX_BUF_TOT_LEN
,
1321 tp
->rx_ring
, tp
->rx_ring_dma
);
1327 napi_enable(&tp
->napi
);
1329 tp
->mii
.full_duplex
= tp
->mii
.force_media
;
1330 tp
->tx_flag
= (TX_FIFO_THRESH
<< 11) & 0x003f0000;
1332 rtl8139_init_ring (dev
);
1333 rtl8139_hw_start (dev
);
1334 netif_start_queue (dev
);
1336 netif_dbg(tp
, ifup
, dev
,
1337 "%s() ioaddr %#llx IRQ %d GP Pins %02x %s-duplex\n",
1339 (unsigned long long)pci_resource_start (tp
->pci_dev
, 1),
1340 dev
->irq
, RTL_R8 (MediaStatus
),
1341 tp
->mii
.full_duplex
? "full" : "half");
1343 rtl8139_start_thread(tp
);
1349 static void rtl_check_media (struct net_device
*dev
, unsigned int init_media
)
1351 struct rtl8139_private
*tp
= netdev_priv(dev
);
1353 if (tp
->phys
[0] >= 0) {
1354 mii_check_media(&tp
->mii
, netif_msg_link(tp
), init_media
);
1358 /* Start the hardware at open or resume. */
1359 static void rtl8139_hw_start (struct net_device
*dev
)
1361 struct rtl8139_private
*tp
= netdev_priv(dev
);
1362 void __iomem
*ioaddr
= tp
->mmio_addr
;
1366 /* Bring old chips out of low-power mode. */
1367 if (rtl_chip_info
[tp
->chipset
].flags
& HasHltClk
)
1368 RTL_W8 (HltClk
, 'R');
1370 rtl8139_chip_reset (ioaddr
);
1372 /* unlock Config[01234] and BMCR register writes */
1373 RTL_W8_F (Cfg9346
, Cfg9346_Unlock
);
1374 /* Restore our idea of the MAC address. */
1375 RTL_W32_F (MAC0
+ 0, le32_to_cpu (*(__le32
*) (dev
->dev_addr
+ 0)));
1376 RTL_W32_F (MAC0
+ 4, le16_to_cpu (*(__le16
*) (dev
->dev_addr
+ 4)));
1380 /* init Rx ring buffer DMA address */
1381 RTL_W32_F (RxBuf
, tp
->rx_ring_dma
);
1383 /* Must enable Tx/Rx before setting transfer thresholds! */
1384 RTL_W8 (ChipCmd
, CmdRxEnb
| CmdTxEnb
);
1386 tp
->rx_config
= rtl8139_rx_config
| AcceptBroadcast
| AcceptMyPhys
;
1387 RTL_W32 (RxConfig
, tp
->rx_config
);
1388 RTL_W32 (TxConfig
, rtl8139_tx_config
);
1390 rtl_check_media (dev
, 1);
1392 if (tp
->chipset
>= CH_8139B
) {
1393 /* Disable magic packet scanning, which is enabled
1394 * when PM is enabled in Config1. It can be reenabled
1395 * via ETHTOOL_SWOL if desired. */
1396 RTL_W8 (Config3
, RTL_R8 (Config3
) & ~Cfg3_Magic
);
1399 netdev_dbg(dev
, "init buffer addresses\n");
1401 /* Lock Config[01234] and BMCR register writes */
1402 RTL_W8 (Cfg9346
, Cfg9346_Lock
);
1404 /* init Tx buffer DMA addresses */
1405 for (i
= 0; i
< NUM_TX_DESC
; i
++)
1406 RTL_W32_F (TxAddr0
+ (i
* 4), tp
->tx_bufs_dma
+ (tp
->tx_buf
[i
] - tp
->tx_bufs
));
1408 RTL_W32 (RxMissed
, 0);
1410 rtl8139_set_rx_mode (dev
);
1412 /* no early-rx interrupts */
1413 RTL_W16 (MultiIntr
, RTL_R16 (MultiIntr
) & MultiIntrClear
);
1415 /* make sure RxTx has started */
1416 tmp
= RTL_R8 (ChipCmd
);
1417 if ((!(tmp
& CmdRxEnb
)) || (!(tmp
& CmdTxEnb
)))
1418 RTL_W8 (ChipCmd
, CmdRxEnb
| CmdTxEnb
);
1420 /* Enable all known interrupts by setting the interrupt mask. */
1421 RTL_W16 (IntrMask
, rtl8139_intr_mask
);
1425 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1426 static void rtl8139_init_ring (struct net_device
*dev
)
1428 struct rtl8139_private
*tp
= netdev_priv(dev
);
1435 for (i
= 0; i
< NUM_TX_DESC
; i
++)
1436 tp
->tx_buf
[i
] = &tp
->tx_bufs
[i
* TX_BUF_SIZE
];
1440 /* This must be global for CONFIG_8139TOO_TUNE_TWISTER case */
1441 static int next_tick
= 3 * HZ
;
1443 #ifndef CONFIG_8139TOO_TUNE_TWISTER
1444 static inline void rtl8139_tune_twister (struct net_device
*dev
,
1445 struct rtl8139_private
*tp
) {}
1447 enum TwisterParamVals
{
1448 PARA78_default
= 0x78fa8388,
1449 PARA7c_default
= 0xcb38de43, /* param[0][3] */
1450 PARA7c_xxx
= 0xcb38de43,
1453 static const unsigned long param
[4][4] = {
1454 {0xcb39de43, 0xcb39ce43, 0xfb38de03, 0xcb38de43},
1455 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
1456 {0xcb39de43, 0xcb39ce43, 0xcb39ce83, 0xcb39ce83},
1457 {0xbb39de43, 0xbb39ce43, 0xbb39ce83, 0xbb39ce83}
1460 static void rtl8139_tune_twister (struct net_device
*dev
,
1461 struct rtl8139_private
*tp
)
1464 void __iomem
*ioaddr
= tp
->mmio_addr
;
1466 /* This is a complicated state machine to configure the "twister" for
1467 impedance/echos based on the cable length.
1468 All of this is magic and undocumented.
1470 switch (tp
->twistie
) {
1472 if (RTL_R16 (CSCR
) & CSCR_LinkOKBit
) {
1473 /* We have link beat, let us tune the twister. */
1474 RTL_W16 (CSCR
, CSCR_LinkDownOffCmd
);
1475 tp
->twistie
= 2; /* Change to state 2. */
1476 next_tick
= HZ
/ 10;
1478 /* Just put in some reasonable defaults for when beat returns. */
1479 RTL_W16 (CSCR
, CSCR_LinkDownCmd
);
1480 RTL_W32 (FIFOTMS
, 0x20); /* Turn on cable test mode. */
1481 RTL_W32 (PARA78
, PARA78_default
);
1482 RTL_W32 (PARA7c
, PARA7c_default
);
1483 tp
->twistie
= 0; /* Bail from future actions. */
1487 /* Read how long it took to hear the echo. */
1488 linkcase
= RTL_R16 (CSCR
) & CSCR_LinkStatusBits
;
1489 if (linkcase
== 0x7000)
1491 else if (linkcase
== 0x3000)
1493 else if (linkcase
== 0x1000)
1498 tp
->twistie
= 3; /* Change to state 2. */
1499 next_tick
= HZ
/ 10;
1502 /* Put out four tuning parameters, one per 100msec. */
1503 if (tp
->twist_col
== 0)
1504 RTL_W16 (FIFOTMS
, 0);
1505 RTL_W32 (PARA7c
, param
[(int) tp
->twist_row
]
1506 [(int) tp
->twist_col
]);
1507 next_tick
= HZ
/ 10;
1508 if (++tp
->twist_col
>= 4) {
1509 /* For short cables we are done.
1510 For long cables (row == 3) check for mistune. */
1512 (tp
->twist_row
== 3) ? 4 : 0;
1516 /* Special case for long cables: check for mistune. */
1517 if ((RTL_R16 (CSCR
) &
1518 CSCR_LinkStatusBits
) == 0x7000) {
1522 RTL_W32 (PARA7c
, 0xfb38de03);
1524 next_tick
= HZ
/ 10;
1528 /* Retune for shorter cable (column 2). */
1529 RTL_W32 (FIFOTMS
, 0x20);
1530 RTL_W32 (PARA78
, PARA78_default
);
1531 RTL_W32 (PARA7c
, PARA7c_default
);
1532 RTL_W32 (FIFOTMS
, 0x00);
1536 next_tick
= HZ
/ 10;
1544 #endif /* CONFIG_8139TOO_TUNE_TWISTER */
1546 static inline void rtl8139_thread_iter (struct net_device
*dev
,
1547 struct rtl8139_private
*tp
,
1548 void __iomem
*ioaddr
)
1552 mii_lpa
= mdio_read (dev
, tp
->phys
[0], MII_LPA
);
1554 if (!tp
->mii
.force_media
&& mii_lpa
!= 0xffff) {
1555 int duplex
= ((mii_lpa
& LPA_100FULL
) ||
1556 (mii_lpa
& 0x01C0) == 0x0040);
1557 if (tp
->mii
.full_duplex
!= duplex
) {
1558 tp
->mii
.full_duplex
= duplex
;
1561 netdev_info(dev
, "Setting %s-duplex based on MII #%d link partner ability of %04x\n",
1562 tp
->mii
.full_duplex
? "full" : "half",
1563 tp
->phys
[0], mii_lpa
);
1565 netdev_info(dev
, "media is unconnected, link down, or incompatible connection\n");
1568 RTL_W8 (Cfg9346
, Cfg9346_Unlock
);
1569 RTL_W8 (Config1
, tp
->mii
.full_duplex
? 0x60 : 0x20);
1570 RTL_W8 (Cfg9346
, Cfg9346_Lock
);
1575 next_tick
= HZ
* 60;
1577 rtl8139_tune_twister (dev
, tp
);
1579 netdev_dbg(dev
, "Media selection tick, Link partner %04x\n",
1581 netdev_dbg(dev
, "Other registers are IntMask %04x IntStatus %04x\n",
1582 RTL_R16(IntrMask
), RTL_R16(IntrStatus
));
1583 netdev_dbg(dev
, "Chip config %02x %02x\n",
1584 RTL_R8(Config0
), RTL_R8(Config1
));
1587 static void rtl8139_thread (struct work_struct
*work
)
1589 struct rtl8139_private
*tp
=
1590 container_of(work
, struct rtl8139_private
, thread
.work
);
1591 struct net_device
*dev
= tp
->mii
.dev
;
1592 unsigned long thr_delay
= next_tick
;
1596 if (!netif_running(dev
))
1599 if (tp
->watchdog_fired
) {
1600 tp
->watchdog_fired
= 0;
1601 rtl8139_tx_timeout_task(work
);
1603 rtl8139_thread_iter(dev
, tp
, tp
->mmio_addr
);
1605 if (tp
->have_thread
)
1606 schedule_delayed_work(&tp
->thread
, thr_delay
);
1611 static void rtl8139_start_thread(struct rtl8139_private
*tp
)
1614 if (tp
->chipset
== CH_8139_K
)
1616 else if (tp
->drv_flags
& HAS_LNK_CHNG
)
1619 tp
->have_thread
= 1;
1620 tp
->watchdog_fired
= 0;
1622 schedule_delayed_work(&tp
->thread
, next_tick
);
1625 static inline void rtl8139_tx_clear (struct rtl8139_private
*tp
)
1630 /* XXX account for unsent Tx packets in tp->stats.tx_dropped */
1633 static void rtl8139_tx_timeout_task (struct work_struct
*work
)
1635 struct rtl8139_private
*tp
=
1636 container_of(work
, struct rtl8139_private
, thread
.work
);
1637 struct net_device
*dev
= tp
->mii
.dev
;
1638 void __iomem
*ioaddr
= tp
->mmio_addr
;
1642 netdev_dbg(dev
, "Transmit timeout, status %02x %04x %04x media %02x\n",
1643 RTL_R8(ChipCmd
), RTL_R16(IntrStatus
),
1644 RTL_R16(IntrMask
), RTL_R8(MediaStatus
));
1645 /* Emit info to figure out what went wrong. */
1646 netdev_dbg(dev
, "Tx queue start entry %ld dirty entry %ld\n",
1647 tp
->cur_tx
, tp
->dirty_tx
);
1648 for (i
= 0; i
< NUM_TX_DESC
; i
++)
1649 netdev_dbg(dev
, "Tx descriptor %d is %08x%s\n",
1650 i
, RTL_R32(TxStatus0
+ (i
* 4)),
1651 i
== tp
->dirty_tx
% NUM_TX_DESC
?
1652 " (queue head)" : "");
1654 tp
->xstats
.tx_timeouts
++;
1656 /* disable Tx ASAP, if not already */
1657 tmp8
= RTL_R8 (ChipCmd
);
1658 if (tmp8
& CmdTxEnb
)
1659 RTL_W8 (ChipCmd
, CmdRxEnb
);
1661 spin_lock_bh(&tp
->rx_lock
);
1662 /* Disable interrupts by clearing the interrupt mask. */
1663 RTL_W16 (IntrMask
, 0x0000);
1665 /* Stop a shared interrupt from scavenging while we are. */
1666 spin_lock_irq(&tp
->lock
);
1667 rtl8139_tx_clear (tp
);
1668 spin_unlock_irq(&tp
->lock
);
1670 /* ...and finally, reset everything */
1671 if (netif_running(dev
)) {
1672 rtl8139_hw_start (dev
);
1673 netif_wake_queue (dev
);
1675 spin_unlock_bh(&tp
->rx_lock
);
1678 static void rtl8139_tx_timeout (struct net_device
*dev
)
1680 struct rtl8139_private
*tp
= netdev_priv(dev
);
1682 tp
->watchdog_fired
= 1;
1683 if (!tp
->have_thread
) {
1684 INIT_DELAYED_WORK(&tp
->thread
, rtl8139_thread
);
1685 schedule_delayed_work(&tp
->thread
, next_tick
);
1689 static netdev_tx_t
rtl8139_start_xmit (struct sk_buff
*skb
,
1690 struct net_device
*dev
)
1692 struct rtl8139_private
*tp
= netdev_priv(dev
);
1693 void __iomem
*ioaddr
= tp
->mmio_addr
;
1695 unsigned int len
= skb
->len
;
1696 unsigned long flags
;
1698 /* Calculate the next Tx descriptor entry. */
1699 entry
= tp
->cur_tx
% NUM_TX_DESC
;
1701 /* Note: the chip doesn't have auto-pad! */
1702 if (likely(len
< TX_BUF_SIZE
)) {
1704 memset(tp
->tx_buf
[entry
], 0, ETH_ZLEN
);
1705 skb_copy_and_csum_dev(skb
, tp
->tx_buf
[entry
]);
1709 dev
->stats
.tx_dropped
++;
1710 return NETDEV_TX_OK
;
1713 spin_lock_irqsave(&tp
->lock
, flags
);
1715 * Writing to TxStatus triggers a DMA transfer of the data
1716 * copied to tp->tx_buf[entry] above. Use a memory barrier
1717 * to make sure that the device sees the updated data.
1720 RTL_W32_F (TxStatus0
+ (entry
* sizeof (u32
)),
1721 tp
->tx_flag
| max(len
, (unsigned int)ETH_ZLEN
));
1725 if ((tp
->cur_tx
- NUM_TX_DESC
) == tp
->dirty_tx
)
1726 netif_stop_queue (dev
);
1727 spin_unlock_irqrestore(&tp
->lock
, flags
);
1729 netif_dbg(tp
, tx_queued
, dev
, "Queued Tx packet size %u to slot %d\n",
1732 return NETDEV_TX_OK
;
1736 static void rtl8139_tx_interrupt (struct net_device
*dev
,
1737 struct rtl8139_private
*tp
,
1738 void __iomem
*ioaddr
)
1740 unsigned long dirty_tx
, tx_left
;
1742 assert (dev
!= NULL
);
1743 assert (ioaddr
!= NULL
);
1745 dirty_tx
= tp
->dirty_tx
;
1746 tx_left
= tp
->cur_tx
- dirty_tx
;
1747 while (tx_left
> 0) {
1748 int entry
= dirty_tx
% NUM_TX_DESC
;
1751 txstatus
= RTL_R32 (TxStatus0
+ (entry
* sizeof (u32
)));
1753 if (!(txstatus
& (TxStatOK
| TxUnderrun
| TxAborted
)))
1754 break; /* It still hasn't been Txed */
1756 /* Note: TxCarrierLost is always asserted at 100mbps. */
1757 if (txstatus
& (TxOutOfWindow
| TxAborted
)) {
1758 /* There was an major error, log it. */
1759 netif_dbg(tp
, tx_err
, dev
, "Transmit error, Tx status %08x\n",
1761 dev
->stats
.tx_errors
++;
1762 if (txstatus
& TxAborted
) {
1763 dev
->stats
.tx_aborted_errors
++;
1764 RTL_W32 (TxConfig
, TxClearAbt
);
1765 RTL_W16 (IntrStatus
, TxErr
);
1768 if (txstatus
& TxCarrierLost
)
1769 dev
->stats
.tx_carrier_errors
++;
1770 if (txstatus
& TxOutOfWindow
)
1771 dev
->stats
.tx_window_errors
++;
1773 if (txstatus
& TxUnderrun
) {
1774 /* Add 64 to the Tx FIFO threshold. */
1775 if (tp
->tx_flag
< 0x00300000)
1776 tp
->tx_flag
+= 0x00020000;
1777 dev
->stats
.tx_fifo_errors
++;
1779 dev
->stats
.collisions
+= (txstatus
>> 24) & 15;
1780 dev
->stats
.tx_bytes
+= txstatus
& 0x7ff;
1781 dev
->stats
.tx_packets
++;
1788 #ifndef RTL8139_NDEBUG
1789 if (tp
->cur_tx
- dirty_tx
> NUM_TX_DESC
) {
1790 netdev_err(dev
, "Out-of-sync dirty pointer, %ld vs. %ld\n",
1791 dirty_tx
, tp
->cur_tx
);
1792 dirty_tx
+= NUM_TX_DESC
;
1794 #endif /* RTL8139_NDEBUG */
1796 /* only wake the queue if we did work, and the queue is stopped */
1797 if (tp
->dirty_tx
!= dirty_tx
) {
1798 tp
->dirty_tx
= dirty_tx
;
1800 netif_wake_queue (dev
);
1805 /* TODO: clean this up! Rx reset need not be this intensive */
1806 static void rtl8139_rx_err (u32 rx_status
, struct net_device
*dev
,
1807 struct rtl8139_private
*tp
, void __iomem
*ioaddr
)
1810 #ifdef CONFIG_8139_OLD_RX_RESET
1814 netif_dbg(tp
, rx_err
, dev
, "Ethernet frame had errors, status %08x\n",
1816 dev
->stats
.rx_errors
++;
1817 if (!(rx_status
& RxStatusOK
)) {
1818 if (rx_status
& RxTooLong
) {
1819 netdev_dbg(dev
, "Oversized Ethernet frame, status %04x!\n",
1821 /* A.C.: The chip hangs here. */
1823 if (rx_status
& (RxBadSymbol
| RxBadAlign
))
1824 dev
->stats
.rx_frame_errors
++;
1825 if (rx_status
& (RxRunt
| RxTooLong
))
1826 dev
->stats
.rx_length_errors
++;
1827 if (rx_status
& RxCRCErr
)
1828 dev
->stats
.rx_crc_errors
++;
1830 tp
->xstats
.rx_lost_in_ring
++;
1833 #ifndef CONFIG_8139_OLD_RX_RESET
1834 tmp8
= RTL_R8 (ChipCmd
);
1835 RTL_W8 (ChipCmd
, tmp8
& ~CmdRxEnb
);
1836 RTL_W8 (ChipCmd
, tmp8
);
1837 RTL_W32 (RxConfig
, tp
->rx_config
);
1840 /* Reset the receiver, based on RealTek recommendation. (Bug?) */
1842 /* disable receive */
1843 RTL_W8_F (ChipCmd
, CmdTxEnb
);
1845 while (--tmp_work
> 0) {
1847 tmp8
= RTL_R8 (ChipCmd
);
1848 if (!(tmp8
& CmdRxEnb
))
1852 netdev_warn(dev
, "rx stop wait too long\n");
1853 /* restart receive */
1855 while (--tmp_work
> 0) {
1856 RTL_W8_F (ChipCmd
, CmdRxEnb
| CmdTxEnb
);
1858 tmp8
= RTL_R8 (ChipCmd
);
1859 if ((tmp8
& CmdRxEnb
) && (tmp8
& CmdTxEnb
))
1863 netdev_warn(dev
, "tx/rx enable wait too long\n");
1865 /* and reinitialize all rx related registers */
1866 RTL_W8_F (Cfg9346
, Cfg9346_Unlock
);
1867 /* Must enable Tx/Rx before setting transfer thresholds! */
1868 RTL_W8 (ChipCmd
, CmdRxEnb
| CmdTxEnb
);
1870 tp
->rx_config
= rtl8139_rx_config
| AcceptBroadcast
| AcceptMyPhys
;
1871 RTL_W32 (RxConfig
, tp
->rx_config
);
1874 netdev_dbg(dev
, "init buffer addresses\n");
1876 /* Lock Config[01234] and BMCR register writes */
1877 RTL_W8 (Cfg9346
, Cfg9346_Lock
);
1879 /* init Rx ring buffer DMA address */
1880 RTL_W32_F (RxBuf
, tp
->rx_ring_dma
);
1882 /* A.C.: Reset the multicast list. */
1883 __set_rx_mode (dev
);
1888 static inline void wrap_copy(struct sk_buff
*skb
, const unsigned char *ring
,
1889 u32 offset
, unsigned int size
)
1891 u32 left
= RX_BUF_LEN
- offset
;
1894 skb_copy_to_linear_data(skb
, ring
+ offset
, left
);
1895 skb_copy_to_linear_data_offset(skb
, left
, ring
, size
- left
);
1897 skb_copy_to_linear_data(skb
, ring
+ offset
, size
);
1901 static void rtl8139_isr_ack(struct rtl8139_private
*tp
)
1903 void __iomem
*ioaddr
= tp
->mmio_addr
;
1906 status
= RTL_R16 (IntrStatus
) & RxAckBits
;
1908 /* Clear out errors and receive interrupts */
1909 if (likely(status
!= 0)) {
1910 if (unlikely(status
& (RxFIFOOver
| RxOverflow
))) {
1911 tp
->dev
->stats
.rx_errors
++;
1912 if (status
& RxFIFOOver
)
1913 tp
->dev
->stats
.rx_fifo_errors
++;
1915 RTL_W16_F (IntrStatus
, RxAckBits
);
1919 static int rtl8139_rx(struct net_device
*dev
, struct rtl8139_private
*tp
,
1922 void __iomem
*ioaddr
= tp
->mmio_addr
;
1924 unsigned char *rx_ring
= tp
->rx_ring
;
1925 unsigned int cur_rx
= tp
->cur_rx
;
1926 unsigned int rx_size
= 0;
1928 netdev_dbg(dev
, "In %s(), current %04x BufAddr %04x, free to %04x, Cmd %02x\n",
1929 __func__
, (u16
)cur_rx
,
1930 RTL_R16(RxBufAddr
), RTL_R16(RxBufPtr
), RTL_R8(ChipCmd
));
1932 while (netif_running(dev
) && received
< budget
&&
1933 (RTL_R8 (ChipCmd
) & RxBufEmpty
) == 0) {
1934 u32 ring_offset
= cur_rx
% RX_BUF_LEN
;
1936 unsigned int pkt_size
;
1937 struct sk_buff
*skb
;
1941 /* read size+status of next frame from DMA ring buffer */
1942 rx_status
= le32_to_cpu (*(__le32
*) (rx_ring
+ ring_offset
));
1943 rx_size
= rx_status
>> 16;
1944 pkt_size
= rx_size
- 4;
1946 netif_dbg(tp
, rx_status
, dev
, "%s() status %04x, size %04x, cur %04x\n",
1947 __func__
, rx_status
, rx_size
, cur_rx
);
1948 #if RTL8139_DEBUG > 2
1949 print_hex_dump(KERN_DEBUG
, "Frame contents: ",
1950 DUMP_PREFIX_OFFSET
, 16, 1,
1951 &rx_ring
[ring_offset
], 70, true);
1954 /* Packet copy from FIFO still in progress.
1955 * Theoretically, this should never happen
1956 * since EarlyRx is disabled.
1958 if (unlikely(rx_size
== 0xfff0)) {
1959 if (!tp
->fifo_copy_timeout
)
1960 tp
->fifo_copy_timeout
= jiffies
+ 2;
1961 else if (time_after(jiffies
, tp
->fifo_copy_timeout
)) {
1962 netdev_dbg(dev
, "hung FIFO. Reset\n");
1966 netif_dbg(tp
, intr
, dev
, "fifo copy in progress\n");
1967 tp
->xstats
.early_rx
++;
1972 tp
->fifo_copy_timeout
= 0;
1974 /* If Rx err or invalid rx_size/rx_status received
1975 * (which happens if we get lost in the ring),
1976 * Rx process gets reset, so we abort any further
1979 if (unlikely((rx_size
> (MAX_ETH_FRAME_SIZE
+4)) ||
1981 (!(rx_status
& RxStatusOK
)))) {
1982 rtl8139_rx_err (rx_status
, dev
, tp
, ioaddr
);
1987 /* Malloc up new buffer, compatible with net-2e. */
1988 /* Omit the four octet CRC from the length. */
1990 skb
= netdev_alloc_skb_ip_align(dev
, pkt_size
);
1993 wrap_copy(skb
, rx_ring
, ring_offset
+4, pkt_size
);
1995 skb_copy_to_linear_data (skb
, &rx_ring
[ring_offset
+ 4], pkt_size
);
1997 skb_put (skb
, pkt_size
);
1999 skb
->protocol
= eth_type_trans (skb
, dev
);
2001 dev
->stats
.rx_bytes
+= pkt_size
;
2002 dev
->stats
.rx_packets
++;
2004 netif_receive_skb (skb
);
2006 if (net_ratelimit())
2007 netdev_warn(dev
, "Memory squeeze, dropping packet\n");
2008 dev
->stats
.rx_dropped
++;
2012 cur_rx
= (cur_rx
+ rx_size
+ 4 + 3) & ~3;
2013 RTL_W16 (RxBufPtr
, (u16
) (cur_rx
- 16));
2015 rtl8139_isr_ack(tp
);
2018 if (unlikely(!received
|| rx_size
== 0xfff0))
2019 rtl8139_isr_ack(tp
);
2021 netdev_dbg(dev
, "Done %s(), current %04x BufAddr %04x, free to %04x, Cmd %02x\n",
2023 RTL_R16(RxBufAddr
), RTL_R16(RxBufPtr
), RTL_R8(ChipCmd
));
2025 tp
->cur_rx
= cur_rx
;
2028 * The receive buffer should be mostly empty.
2029 * Tell NAPI to reenable the Rx irq.
2031 if (tp
->fifo_copy_timeout
)
2039 static void rtl8139_weird_interrupt (struct net_device
*dev
,
2040 struct rtl8139_private
*tp
,
2041 void __iomem
*ioaddr
,
2042 int status
, int link_changed
)
2044 netdev_dbg(dev
, "Abnormal interrupt, status %08x\n", status
);
2046 assert (dev
!= NULL
);
2047 assert (tp
!= NULL
);
2048 assert (ioaddr
!= NULL
);
2050 /* Update the error count. */
2051 dev
->stats
.rx_missed_errors
+= RTL_R32 (RxMissed
);
2052 RTL_W32 (RxMissed
, 0);
2054 if ((status
& RxUnderrun
) && link_changed
&&
2055 (tp
->drv_flags
& HAS_LNK_CHNG
)) {
2056 rtl_check_media(dev
, 0);
2057 status
&= ~RxUnderrun
;
2060 if (status
& (RxUnderrun
| RxErr
))
2061 dev
->stats
.rx_errors
++;
2063 if (status
& PCSTimeout
)
2064 dev
->stats
.rx_length_errors
++;
2065 if (status
& RxUnderrun
)
2066 dev
->stats
.rx_fifo_errors
++;
2067 if (status
& PCIErr
) {
2069 pci_read_config_word (tp
->pci_dev
, PCI_STATUS
, &pci_cmd_status
);
2070 pci_write_config_word (tp
->pci_dev
, PCI_STATUS
, pci_cmd_status
);
2072 netdev_err(dev
, "PCI Bus error %04x\n", pci_cmd_status
);
2076 static int rtl8139_poll(struct napi_struct
*napi
, int budget
)
2078 struct rtl8139_private
*tp
= container_of(napi
, struct rtl8139_private
, napi
);
2079 struct net_device
*dev
= tp
->dev
;
2080 void __iomem
*ioaddr
= tp
->mmio_addr
;
2083 spin_lock(&tp
->rx_lock
);
2085 if (likely(RTL_R16(IntrStatus
) & RxAckBits
))
2086 work_done
+= rtl8139_rx(dev
, tp
, budget
);
2088 if (work_done
< budget
) {
2089 unsigned long flags
;
2091 * Order is important since data can get interrupted
2092 * again when we think we are done.
2094 spin_lock_irqsave(&tp
->lock
, flags
);
2095 __napi_complete(napi
);
2096 RTL_W16_F(IntrMask
, rtl8139_intr_mask
);
2097 spin_unlock_irqrestore(&tp
->lock
, flags
);
2099 spin_unlock(&tp
->rx_lock
);
2104 /* The interrupt handler does all of the Rx thread work and cleans up
2105 after the Tx thread. */
2106 static irqreturn_t
rtl8139_interrupt (int irq
, void *dev_instance
)
2108 struct net_device
*dev
= (struct net_device
*) dev_instance
;
2109 struct rtl8139_private
*tp
= netdev_priv(dev
);
2110 void __iomem
*ioaddr
= tp
->mmio_addr
;
2111 u16 status
, ackstat
;
2112 int link_changed
= 0; /* avoid bogus "uninit" warning */
2115 spin_lock (&tp
->lock
);
2116 status
= RTL_R16 (IntrStatus
);
2119 if (unlikely((status
& rtl8139_intr_mask
) == 0))
2124 /* h/w no longer present (hotplug?) or major error, bail */
2125 if (unlikely(status
== 0xFFFF))
2128 /* close possible race's with dev_close */
2129 if (unlikely(!netif_running(dev
))) {
2130 RTL_W16 (IntrMask
, 0);
2134 /* Acknowledge all of the current interrupt sources ASAP, but
2135 an first get an additional status bit from CSCR. */
2136 if (unlikely(status
& RxUnderrun
))
2137 link_changed
= RTL_R16 (CSCR
) & CSCR_LinkChangeBit
;
2139 ackstat
= status
& ~(RxAckBits
| TxErr
);
2141 RTL_W16 (IntrStatus
, ackstat
);
2143 /* Receive packets are processed by poll routine.
2144 If not running start it now. */
2145 if (status
& RxAckBits
){
2146 if (napi_schedule_prep(&tp
->napi
)) {
2147 RTL_W16_F (IntrMask
, rtl8139_norx_intr_mask
);
2148 __napi_schedule(&tp
->napi
);
2152 /* Check uncommon events with one test. */
2153 if (unlikely(status
& (PCIErr
| PCSTimeout
| RxUnderrun
| RxErr
)))
2154 rtl8139_weird_interrupt (dev
, tp
, ioaddr
,
2155 status
, link_changed
);
2157 if (status
& (TxOK
| TxErr
)) {
2158 rtl8139_tx_interrupt (dev
, tp
, ioaddr
);
2160 RTL_W16 (IntrStatus
, TxErr
);
2163 spin_unlock (&tp
->lock
);
2165 netdev_dbg(dev
, "exiting interrupt, intr_status=%#4.4x\n",
2166 RTL_R16(IntrStatus
));
2167 return IRQ_RETVAL(handled
);
2170 #ifdef CONFIG_NET_POLL_CONTROLLER
2172 * Polling receive - used by netconsole and other diagnostic tools
2173 * to allow network i/o with interrupts disabled.
2175 static void rtl8139_poll_controller(struct net_device
*dev
)
2177 disable_irq(dev
->irq
);
2178 rtl8139_interrupt(dev
->irq
, dev
);
2179 enable_irq(dev
->irq
);
2183 static int rtl8139_set_mac_address(struct net_device
*dev
, void *p
)
2185 struct rtl8139_private
*tp
= netdev_priv(dev
);
2186 void __iomem
*ioaddr
= tp
->mmio_addr
;
2187 struct sockaddr
*addr
= p
;
2189 if (!is_valid_ether_addr(addr
->sa_data
))
2190 return -EADDRNOTAVAIL
;
2192 memcpy(dev
->dev_addr
, addr
->sa_data
, dev
->addr_len
);
2194 spin_lock_irq(&tp
->lock
);
2196 RTL_W8_F(Cfg9346
, Cfg9346_Unlock
);
2197 RTL_W32_F(MAC0
+ 0, cpu_to_le32 (*(u32
*) (dev
->dev_addr
+ 0)));
2198 RTL_W32_F(MAC0
+ 4, cpu_to_le32 (*(u32
*) (dev
->dev_addr
+ 4)));
2199 RTL_W8_F(Cfg9346
, Cfg9346_Lock
);
2201 spin_unlock_irq(&tp
->lock
);
2206 static int rtl8139_close (struct net_device
*dev
)
2208 struct rtl8139_private
*tp
= netdev_priv(dev
);
2209 void __iomem
*ioaddr
= tp
->mmio_addr
;
2210 unsigned long flags
;
2212 netif_stop_queue(dev
);
2213 napi_disable(&tp
->napi
);
2215 netif_dbg(tp
, ifdown
, dev
, "Shutting down ethercard, status was 0x%04x\n",
2216 RTL_R16(IntrStatus
));
2218 spin_lock_irqsave (&tp
->lock
, flags
);
2220 /* Stop the chip's Tx and Rx DMA processes. */
2221 RTL_W8 (ChipCmd
, 0);
2223 /* Disable interrupts by clearing the interrupt mask. */
2224 RTL_W16 (IntrMask
, 0);
2226 /* Update the error counts. */
2227 dev
->stats
.rx_missed_errors
+= RTL_R32 (RxMissed
);
2228 RTL_W32 (RxMissed
, 0);
2230 spin_unlock_irqrestore (&tp
->lock
, flags
);
2232 free_irq (dev
->irq
, dev
);
2234 rtl8139_tx_clear (tp
);
2236 dma_free_coherent(&tp
->pci_dev
->dev
, RX_BUF_TOT_LEN
,
2237 tp
->rx_ring
, tp
->rx_ring_dma
);
2238 dma_free_coherent(&tp
->pci_dev
->dev
, TX_BUF_TOT_LEN
,
2239 tp
->tx_bufs
, tp
->tx_bufs_dma
);
2243 /* Green! Put the chip in low-power mode. */
2244 RTL_W8 (Cfg9346
, Cfg9346_Unlock
);
2246 if (rtl_chip_info
[tp
->chipset
].flags
& HasHltClk
)
2247 RTL_W8 (HltClk
, 'H'); /* 'R' would leave the clock running. */
2253 /* Get the ethtool Wake-on-LAN settings. Assumes that wol points to
2254 kernel memory, *wol has been initialized as {ETHTOOL_GWOL}, and
2255 other threads or interrupts aren't messing with the 8139. */
2256 static void rtl8139_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
2258 struct rtl8139_private
*tp
= netdev_priv(dev
);
2259 void __iomem
*ioaddr
= tp
->mmio_addr
;
2261 spin_lock_irq(&tp
->lock
);
2262 if (rtl_chip_info
[tp
->chipset
].flags
& HasLWake
) {
2263 u8 cfg3
= RTL_R8 (Config3
);
2264 u8 cfg5
= RTL_R8 (Config5
);
2266 wol
->supported
= WAKE_PHY
| WAKE_MAGIC
2267 | WAKE_UCAST
| WAKE_MCAST
| WAKE_BCAST
;
2270 if (cfg3
& Cfg3_LinkUp
)
2271 wol
->wolopts
|= WAKE_PHY
;
2272 if (cfg3
& Cfg3_Magic
)
2273 wol
->wolopts
|= WAKE_MAGIC
;
2274 /* (KON)FIXME: See how netdev_set_wol() handles the
2275 following constants. */
2276 if (cfg5
& Cfg5_UWF
)
2277 wol
->wolopts
|= WAKE_UCAST
;
2278 if (cfg5
& Cfg5_MWF
)
2279 wol
->wolopts
|= WAKE_MCAST
;
2280 if (cfg5
& Cfg5_BWF
)
2281 wol
->wolopts
|= WAKE_BCAST
;
2283 spin_unlock_irq(&tp
->lock
);
2287 /* Set the ethtool Wake-on-LAN settings. Return 0 or -errno. Assumes
2288 that wol points to kernel memory and other threads or interrupts
2289 aren't messing with the 8139. */
2290 static int rtl8139_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
2292 struct rtl8139_private
*tp
= netdev_priv(dev
);
2293 void __iomem
*ioaddr
= tp
->mmio_addr
;
2297 support
= ((rtl_chip_info
[tp
->chipset
].flags
& HasLWake
)
2298 ? (WAKE_PHY
| WAKE_MAGIC
2299 | WAKE_UCAST
| WAKE_MCAST
| WAKE_BCAST
)
2301 if (wol
->wolopts
& ~support
)
2304 spin_lock_irq(&tp
->lock
);
2305 cfg3
= RTL_R8 (Config3
) & ~(Cfg3_LinkUp
| Cfg3_Magic
);
2306 if (wol
->wolopts
& WAKE_PHY
)
2307 cfg3
|= Cfg3_LinkUp
;
2308 if (wol
->wolopts
& WAKE_MAGIC
)
2310 RTL_W8 (Cfg9346
, Cfg9346_Unlock
);
2311 RTL_W8 (Config3
, cfg3
);
2312 RTL_W8 (Cfg9346
, Cfg9346_Lock
);
2314 cfg5
= RTL_R8 (Config5
) & ~(Cfg5_UWF
| Cfg5_MWF
| Cfg5_BWF
);
2315 /* (KON)FIXME: These are untested. We may have to set the
2316 CRC0, Wakeup0 and LSBCRC0 registers too, but I have no
2318 if (wol
->wolopts
& WAKE_UCAST
)
2320 if (wol
->wolopts
& WAKE_MCAST
)
2322 if (wol
->wolopts
& WAKE_BCAST
)
2324 RTL_W8 (Config5
, cfg5
); /* need not unlock via Cfg9346 */
2325 spin_unlock_irq(&tp
->lock
);
2330 static void rtl8139_get_drvinfo(struct net_device
*dev
, struct ethtool_drvinfo
*info
)
2332 struct rtl8139_private
*tp
= netdev_priv(dev
);
2333 strcpy(info
->driver
, DRV_NAME
);
2334 strcpy(info
->version
, DRV_VERSION
);
2335 strcpy(info
->bus_info
, pci_name(tp
->pci_dev
));
2336 info
->regdump_len
= tp
->regs_len
;
2339 static int rtl8139_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
2341 struct rtl8139_private
*tp
= netdev_priv(dev
);
2342 spin_lock_irq(&tp
->lock
);
2343 mii_ethtool_gset(&tp
->mii
, cmd
);
2344 spin_unlock_irq(&tp
->lock
);
2348 static int rtl8139_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
2350 struct rtl8139_private
*tp
= netdev_priv(dev
);
2352 spin_lock_irq(&tp
->lock
);
2353 rc
= mii_ethtool_sset(&tp
->mii
, cmd
);
2354 spin_unlock_irq(&tp
->lock
);
2358 static int rtl8139_nway_reset(struct net_device
*dev
)
2360 struct rtl8139_private
*tp
= netdev_priv(dev
);
2361 return mii_nway_restart(&tp
->mii
);
2364 static u32
rtl8139_get_link(struct net_device
*dev
)
2366 struct rtl8139_private
*tp
= netdev_priv(dev
);
2367 return mii_link_ok(&tp
->mii
);
2370 static u32
rtl8139_get_msglevel(struct net_device
*dev
)
2372 struct rtl8139_private
*tp
= netdev_priv(dev
);
2373 return tp
->msg_enable
;
2376 static void rtl8139_set_msglevel(struct net_device
*dev
, u32 datum
)
2378 struct rtl8139_private
*tp
= netdev_priv(dev
);
2379 tp
->msg_enable
= datum
;
2382 static int rtl8139_get_regs_len(struct net_device
*dev
)
2384 struct rtl8139_private
*tp
;
2385 /* TODO: we are too slack to do reg dumping for pio, for now */
2388 tp
= netdev_priv(dev
);
2389 return tp
->regs_len
;
2392 static void rtl8139_get_regs(struct net_device
*dev
, struct ethtool_regs
*regs
, void *regbuf
)
2394 struct rtl8139_private
*tp
;
2396 /* TODO: we are too slack to do reg dumping for pio, for now */
2399 tp
= netdev_priv(dev
);
2401 regs
->version
= RTL_REGS_VER
;
2403 spin_lock_irq(&tp
->lock
);
2404 memcpy_fromio(regbuf
, tp
->mmio_addr
, regs
->len
);
2405 spin_unlock_irq(&tp
->lock
);
2408 static int rtl8139_get_sset_count(struct net_device
*dev
, int sset
)
2412 return RTL_NUM_STATS
;
2418 static void rtl8139_get_ethtool_stats(struct net_device
*dev
, struct ethtool_stats
*stats
, u64
*data
)
2420 struct rtl8139_private
*tp
= netdev_priv(dev
);
2422 data
[0] = tp
->xstats
.early_rx
;
2423 data
[1] = tp
->xstats
.tx_buf_mapped
;
2424 data
[2] = tp
->xstats
.tx_timeouts
;
2425 data
[3] = tp
->xstats
.rx_lost_in_ring
;
2428 static void rtl8139_get_strings(struct net_device
*dev
, u32 stringset
, u8
*data
)
2430 memcpy(data
, ethtool_stats_keys
, sizeof(ethtool_stats_keys
));
2433 static const struct ethtool_ops rtl8139_ethtool_ops
= {
2434 .get_drvinfo
= rtl8139_get_drvinfo
,
2435 .get_settings
= rtl8139_get_settings
,
2436 .set_settings
= rtl8139_set_settings
,
2437 .get_regs_len
= rtl8139_get_regs_len
,
2438 .get_regs
= rtl8139_get_regs
,
2439 .nway_reset
= rtl8139_nway_reset
,
2440 .get_link
= rtl8139_get_link
,
2441 .get_msglevel
= rtl8139_get_msglevel
,
2442 .set_msglevel
= rtl8139_set_msglevel
,
2443 .get_wol
= rtl8139_get_wol
,
2444 .set_wol
= rtl8139_set_wol
,
2445 .get_strings
= rtl8139_get_strings
,
2446 .get_sset_count
= rtl8139_get_sset_count
,
2447 .get_ethtool_stats
= rtl8139_get_ethtool_stats
,
2450 static int netdev_ioctl(struct net_device
*dev
, struct ifreq
*rq
, int cmd
)
2452 struct rtl8139_private
*tp
= netdev_priv(dev
);
2455 if (!netif_running(dev
))
2458 spin_lock_irq(&tp
->lock
);
2459 rc
= generic_mii_ioctl(&tp
->mii
, if_mii(rq
), cmd
, NULL
);
2460 spin_unlock_irq(&tp
->lock
);
2466 static struct net_device_stats
*rtl8139_get_stats (struct net_device
*dev
)
2468 struct rtl8139_private
*tp
= netdev_priv(dev
);
2469 void __iomem
*ioaddr
= tp
->mmio_addr
;
2470 unsigned long flags
;
2472 if (netif_running(dev
)) {
2473 spin_lock_irqsave (&tp
->lock
, flags
);
2474 dev
->stats
.rx_missed_errors
+= RTL_R32 (RxMissed
);
2475 RTL_W32 (RxMissed
, 0);
2476 spin_unlock_irqrestore (&tp
->lock
, flags
);
2482 /* Set or clear the multicast filter for this adaptor.
2483 This routine is not state sensitive and need not be SMP locked. */
2485 static void __set_rx_mode (struct net_device
*dev
)
2487 struct rtl8139_private
*tp
= netdev_priv(dev
);
2488 void __iomem
*ioaddr
= tp
->mmio_addr
;
2489 u32 mc_filter
[2]; /* Multicast hash filter */
2493 netdev_dbg(dev
, "rtl8139_set_rx_mode(%04x) done -- Rx config %08x\n",
2494 dev
->flags
, RTL_R32(RxConfig
));
2496 /* Note: do not reorder, GCC is clever about common statements. */
2497 if (dev
->flags
& IFF_PROMISC
) {
2499 AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
|
2501 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2502 } else if ((netdev_mc_count(dev
) > multicast_filter_limit
) ||
2503 (dev
->flags
& IFF_ALLMULTI
)) {
2504 /* Too many to filter perfectly -- accept all multicasts. */
2505 rx_mode
= AcceptBroadcast
| AcceptMulticast
| AcceptMyPhys
;
2506 mc_filter
[1] = mc_filter
[0] = 0xffffffff;
2508 struct netdev_hw_addr
*ha
;
2509 rx_mode
= AcceptBroadcast
| AcceptMyPhys
;
2510 mc_filter
[1] = mc_filter
[0] = 0;
2511 netdev_for_each_mc_addr(ha
, dev
) {
2512 int bit_nr
= ether_crc(ETH_ALEN
, ha
->addr
) >> 26;
2514 mc_filter
[bit_nr
>> 5] |= 1 << (bit_nr
& 31);
2515 rx_mode
|= AcceptMulticast
;
2519 /* We can safely update without stopping the chip. */
2520 tmp
= rtl8139_rx_config
| rx_mode
;
2521 if (tp
->rx_config
!= tmp
) {
2522 RTL_W32_F (RxConfig
, tmp
);
2523 tp
->rx_config
= tmp
;
2525 RTL_W32_F (MAR0
+ 0, mc_filter
[0]);
2526 RTL_W32_F (MAR0
+ 4, mc_filter
[1]);
2529 static void rtl8139_set_rx_mode (struct net_device
*dev
)
2531 unsigned long flags
;
2532 struct rtl8139_private
*tp
= netdev_priv(dev
);
2534 spin_lock_irqsave (&tp
->lock
, flags
);
2536 spin_unlock_irqrestore (&tp
->lock
, flags
);
2541 static int rtl8139_suspend (struct pci_dev
*pdev
, pm_message_t state
)
2543 struct net_device
*dev
= pci_get_drvdata (pdev
);
2544 struct rtl8139_private
*tp
= netdev_priv(dev
);
2545 void __iomem
*ioaddr
= tp
->mmio_addr
;
2546 unsigned long flags
;
2548 pci_save_state (pdev
);
2550 if (!netif_running (dev
))
2553 netif_device_detach (dev
);
2555 spin_lock_irqsave (&tp
->lock
, flags
);
2557 /* Disable interrupts, stop Tx and Rx. */
2558 RTL_W16 (IntrMask
, 0);
2559 RTL_W8 (ChipCmd
, 0);
2561 /* Update the error counts. */
2562 dev
->stats
.rx_missed_errors
+= RTL_R32 (RxMissed
);
2563 RTL_W32 (RxMissed
, 0);
2565 spin_unlock_irqrestore (&tp
->lock
, flags
);
2567 pci_set_power_state (pdev
, PCI_D3hot
);
2573 static int rtl8139_resume (struct pci_dev
*pdev
)
2575 struct net_device
*dev
= pci_get_drvdata (pdev
);
2577 pci_restore_state (pdev
);
2578 if (!netif_running (dev
))
2580 pci_set_power_state (pdev
, PCI_D0
);
2581 rtl8139_init_ring (dev
);
2582 rtl8139_hw_start (dev
);
2583 netif_device_attach (dev
);
2587 #endif /* CONFIG_PM */
2590 static struct pci_driver rtl8139_pci_driver
= {
2592 .id_table
= rtl8139_pci_tbl
,
2593 .probe
= rtl8139_init_one
,
2594 .remove
= __devexit_p(rtl8139_remove_one
),
2596 .suspend
= rtl8139_suspend
,
2597 .resume
= rtl8139_resume
,
2598 #endif /* CONFIG_PM */
2602 static int __init
rtl8139_init_module (void)
2604 /* when we're a module, we always print a version message,
2605 * even if no 8139 board is found.
2608 pr_info(RTL8139_DRIVER_NAME
"\n");
2611 return pci_register_driver(&rtl8139_pci_driver
);
2615 static void __exit
rtl8139_cleanup_module (void)
2617 pci_unregister_driver (&rtl8139_pci_driver
);
2621 module_init(rtl8139_init_module
);
2622 module_exit(rtl8139_cleanup_module
);