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Merge remote-tracking branch 'moduleh/module.h-split'
[linux-2.6/next.git] / drivers / net / ethernet / stmicro / stmmac / stmmac_main.c
blob68fb5b0593a09056dc581ae8913c5d7ac74f5c32
1 /*******************************************************************************
2 This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
3 ST Ethernet IPs are built around a Synopsys IP Core.
4
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
6
7 This program is free software; you can redistribute it and/or modify it
8 under the terms and conditions of the GNU General Public License,
9 version 2, as published by the Free Software Foundation.
10
11 This program is distributed in the hope it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc.,
18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19
20 The full GNU General Public License is included in this distribution in
21 the file called "COPYING".
22
23 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
24
25 Documentation available at:
26 http://www.stlinux.com
27 Support available at:
28 https://bugzilla.stlinux.com/
29 *******************************************************************************/
30
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/kernel.h>
34 #include <linux/interrupt.h>
35 #include <linux/etherdevice.h>
36 #include <linux/platform_device.h>
37 #include <linux/ip.h>
38 #include <linux/tcp.h>
39 #include <linux/skbuff.h>
40 #include <linux/ethtool.h>
41 #include <linux/if_ether.h>
42 #include <linux/crc32.h>
43 #include <linux/mii.h>
44 #include <linux/phy.h>
45 #include <linux/if.h>
46 #include <linux/if_vlan.h>
47 #include <linux/dma-mapping.h>
48 #include <linux/slab.h>
49 #include <linux/prefetch.h>
50 #include "stmmac.h"
51
52 #define STMMAC_RESOURCE_NAME "stmmaceth"
53
54 #undef STMMAC_DEBUG
55 /*#define STMMAC_DEBUG*/
56 #ifdef STMMAC_DEBUG
57 #define DBG(nlevel, klevel, fmt, args...) \
58 ((void)(netif_msg_##nlevel(priv) && \
59 printk(KERN_##klevel fmt, ## args)))
60 #else
61 #define DBG(nlevel, klevel, fmt, args...) do { } while (0)
62 #endif
63
64 #undef STMMAC_RX_DEBUG
65 /*#define STMMAC_RX_DEBUG*/
66 #ifdef STMMAC_RX_DEBUG
67 #define RX_DBG(fmt, args...) printk(fmt, ## args)
68 #else
69 #define RX_DBG(fmt, args...) do { } while (0)
70 #endif
71
72 #undef STMMAC_XMIT_DEBUG
73 /*#define STMMAC_XMIT_DEBUG*/
74 #ifdef STMMAC_TX_DEBUG
75 #define TX_DBG(fmt, args...) printk(fmt, ## args)
76 #else
77 #define TX_DBG(fmt, args...) do { } while (0)
78 #endif
79
80 #define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
81 #define JUMBO_LEN 9000
82
83 /* Module parameters */
84 #define TX_TIMEO 5000 /* default 5 seconds */
85 static int watchdog = TX_TIMEO;
86 module_param(watchdog, int, S_IRUGO | S_IWUSR);
87 MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
88
89 static int debug = -1; /* -1: default, 0: no output, 16: all */
90 module_param(debug, int, S_IRUGO | S_IWUSR);
91 MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
92
93 static int phyaddr = -1;
94 module_param(phyaddr, int, S_IRUGO);
95 MODULE_PARM_DESC(phyaddr, "Physical device address");
96
97 #define DMA_TX_SIZE 256
98 static int dma_txsize = DMA_TX_SIZE;
99 module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
100 MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
101
102 #define DMA_RX_SIZE 256
103 static int dma_rxsize = DMA_RX_SIZE;
104 module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
105 MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
106
107 static int flow_ctrl = FLOW_OFF;
108 module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
109 MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
110
111 static int pause = PAUSE_TIME;
112 module_param(pause, int, S_IRUGO | S_IWUSR);
113 MODULE_PARM_DESC(pause, "Flow Control Pause Time");
114
115 #define TC_DEFAULT 64
116 static int tc = TC_DEFAULT;
117 module_param(tc, int, S_IRUGO | S_IWUSR);
118 MODULE_PARM_DESC(tc, "DMA threshold control value");
119
120 /* Pay attention to tune this parameter; take care of both
121 * hardware capability and network stabitily/performance impact.
122 * Many tests showed that ~4ms latency seems to be good enough. */
123 #ifdef CONFIG_STMMAC_TIMER
124 #define DEFAULT_PERIODIC_RATE 256
125 static int tmrate = DEFAULT_PERIODIC_RATE;
126 module_param(tmrate, int, S_IRUGO | S_IWUSR);
127 MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
128 #endif
129
130 #define DMA_BUFFER_SIZE BUF_SIZE_2KiB
131 static int buf_sz = DMA_BUFFER_SIZE;
132 module_param(buf_sz, int, S_IRUGO | S_IWUSR);
133 MODULE_PARM_DESC(buf_sz, "DMA buffer size");
134
135 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
136 NETIF_MSG_LINK | NETIF_MSG_IFUP |
137 NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
138
139 static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
140
141 /**
142 * stmmac_verify_args - verify the driver parameters.
143 * Description: it verifies if some wrong parameter is passed to the driver.
144 * Note that wrong parameters are replaced with the default values.
145 */
146 static void stmmac_verify_args(void)
147 {
148 if (unlikely(watchdog < 0))
149 watchdog = TX_TIMEO;
150 if (unlikely(dma_rxsize < 0))
151 dma_rxsize = DMA_RX_SIZE;
152 if (unlikely(dma_txsize < 0))
153 dma_txsize = DMA_TX_SIZE;
154 if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
155 buf_sz = DMA_BUFFER_SIZE;
156 if (unlikely(flow_ctrl > 1))
157 flow_ctrl = FLOW_AUTO;
158 else if (likely(flow_ctrl < 0))
159 flow_ctrl = FLOW_OFF;
160 if (unlikely((pause < 0) || (pause > 0xffff)))
161 pause = PAUSE_TIME;
162 }
163
164 #if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
165 static void print_pkt(unsigned char *buf, int len)
166 {
167 int j;
168 pr_info("len = %d byte, buf addr: 0x%p", len, buf);
169 for (j = 0; j < len; j++) {
170 if ((j % 16) == 0)
171 pr_info("\n %03x:", j);
172 pr_info(" %02x", buf[j]);
173 }
174 pr_info("\n");
175 }
176 #endif
177
178 /* minimum number of free TX descriptors required to wake up TX process */
179 #define STMMAC_TX_THRESH(x) (x->dma_tx_size/4)
180
181 static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
182 {
183 return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
184 }
185
186 /* On some ST platforms, some HW system configuraton registers have to be
187 * set according to the link speed negotiated.
188 */
189 static inline void stmmac_hw_fix_mac_speed(struct stmmac_priv *priv)
190 {
191 struct phy_device *phydev = priv->phydev;
192
193 if (likely(priv->plat->fix_mac_speed))
194 priv->plat->fix_mac_speed(priv->plat->bsp_priv,
195 phydev->speed);
196 }
197
198 /**
199 * stmmac_adjust_link
200 * @dev: net device structure
201 * Description: it adjusts the link parameters.
202 */
203 static void stmmac_adjust_link(struct net_device *dev)
204 {
205 struct stmmac_priv *priv = netdev_priv(dev);
206 struct phy_device *phydev = priv->phydev;
207 unsigned long flags;
208 int new_state = 0;
209 unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
210
211 if (phydev == NULL)
212 return;
213
214 DBG(probe, DEBUG, "stmmac_adjust_link: called. address %d link %d\n",
215 phydev->addr, phydev->link);
216
217 spin_lock_irqsave(&priv->lock, flags);
218 if (phydev->link) {
219 u32 ctrl = readl(priv->ioaddr + MAC_CTRL_REG);
220
221 /* Now we make sure that we can be in full duplex mode.
222 * If not, we operate in half-duplex mode. */
223 if (phydev->duplex != priv->oldduplex) {
224 new_state = 1;
225 if (!(phydev->duplex))
226 ctrl &= ~priv->hw->link.duplex;
227 else
228 ctrl |= priv->hw->link.duplex;
229 priv->oldduplex = phydev->duplex;
230 }
231 /* Flow Control operation */
232 if (phydev->pause)
233 priv->hw->mac->flow_ctrl(priv->ioaddr, phydev->duplex,
234 fc, pause_time);
235
236 if (phydev->speed != priv->speed) {
237 new_state = 1;
238 switch (phydev->speed) {
239 case 1000:
240 if (likely(priv->plat->has_gmac))
241 ctrl &= ~priv->hw->link.port;
242 stmmac_hw_fix_mac_speed(priv);
243 break;
244 case 100:
245 case 10:
246 if (priv->plat->has_gmac) {
247 ctrl |= priv->hw->link.port;
248 if (phydev->speed == SPEED_100) {
249 ctrl |= priv->hw->link.speed;
250 } else {
251 ctrl &= ~(priv->hw->link.speed);
252 }
253 } else {
254 ctrl &= ~priv->hw->link.port;
255 }
256 stmmac_hw_fix_mac_speed(priv);
257 break;
258 default:
259 if (netif_msg_link(priv))
260 pr_warning("%s: Speed (%d) is not 10"
261 " or 100!\n", dev->name, phydev->speed);
262 break;
263 }
264
265 priv->speed = phydev->speed;
266 }
267
268 writel(ctrl, priv->ioaddr + MAC_CTRL_REG);
269
270 if (!priv->oldlink) {
271 new_state = 1;
272 priv->oldlink = 1;
273 }
274 } else if (priv->oldlink) {
275 new_state = 1;
276 priv->oldlink = 0;
277 priv->speed = 0;
278 priv->oldduplex = -1;
279 }
280
281 if (new_state && netif_msg_link(priv))
282 phy_print_status(phydev);
283
284 spin_unlock_irqrestore(&priv->lock, flags);
285
286 DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
287 }
288
289 /**
290 * stmmac_init_phy - PHY initialization
291 * @dev: net device structure
292 * Description: it initializes the driver's PHY state, and attaches the PHY
293 * to the mac driver.
294 * Return value:
295 * 0 on success
296 */
297 static int stmmac_init_phy(struct net_device *dev)
298 {
299 struct stmmac_priv *priv = netdev_priv(dev);
300 struct phy_device *phydev;
301 char phy_id[MII_BUS_ID_SIZE + 3];
302 char bus_id[MII_BUS_ID_SIZE];
303
304 priv->oldlink = 0;
305 priv->speed = 0;
306 priv->oldduplex = -1;
307
308 snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->plat->bus_id);
309 snprintf(phy_id, MII_BUS_ID_SIZE + 3, PHY_ID_FMT, bus_id,
310 priv->plat->phy_addr);
311 pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id);
312
313 phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
314 priv->plat->interface);
315
316 if (IS_ERR(phydev)) {
317 pr_err("%s: Could not attach to PHY\n", dev->name);
318 return PTR_ERR(phydev);
319 }
320
321 /*
322 * Broken HW is sometimes missing the pull-up resistor on the
323 * MDIO line, which results in reads to non-existent devices returning
324 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
325 * device as well.
326 * Note: phydev->phy_id is the result of reading the UID PHY registers.
327 */
328 if (phydev->phy_id == 0) {
329 phy_disconnect(phydev);
330 return -ENODEV;
331 }
332 pr_debug("stmmac_init_phy: %s: attached to PHY (UID 0x%x)"
333 " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
334
335 priv->phydev = phydev;
336
337 return 0;
338 }
339
340 static inline void stmmac_enable_mac(void __iomem *ioaddr)
341 {
342 u32 value = readl(ioaddr + MAC_CTRL_REG);
343
344 value |= MAC_RNABLE_RX | MAC_ENABLE_TX;
345 writel(value, ioaddr + MAC_CTRL_REG);
346 }
347
348 static inline void stmmac_disable_mac(void __iomem *ioaddr)
349 {
350 u32 value = readl(ioaddr + MAC_CTRL_REG);
351
352 value &= ~(MAC_ENABLE_TX | MAC_RNABLE_RX);
353 writel(value, ioaddr + MAC_CTRL_REG);
354 }
355
356 /**
357 * display_ring
358 * @p: pointer to the ring.
359 * @size: size of the ring.
360 * Description: display all the descriptors within the ring.
361 */
362 static void display_ring(struct dma_desc *p, int size)
363 {
364 struct tmp_s {
365 u64 a;
366 unsigned int b;
367 unsigned int c;
368 };
369 int i;
370 for (i = 0; i < size; i++) {
371 struct tmp_s *x = (struct tmp_s *)(p + i);
372 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
373 i, (unsigned int)virt_to_phys(&p[i]),
374 (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
375 x->b, x->c);
376 pr_info("\n");
377 }
378 }
379
380 /**
381 * init_dma_desc_rings - init the RX/TX descriptor rings
382 * @dev: net device structure
383 * Description: this function initializes the DMA RX/TX descriptors
384 * and allocates the socket buffers.
385 */
386 static void init_dma_desc_rings(struct net_device *dev)
387 {
388 int i;
389 struct stmmac_priv *priv = netdev_priv(dev);
390 struct sk_buff *skb;
391 unsigned int txsize = priv->dma_tx_size;
392 unsigned int rxsize = priv->dma_rx_size;
393 unsigned int bfsize = priv->dma_buf_sz;
394 int buff2_needed = 0, dis_ic = 0;
395
396 /* Set the Buffer size according to the MTU;
397 * indeed, in case of jumbo we need to bump-up the buffer sizes.
398 */
399 if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
400 bfsize = BUF_SIZE_16KiB;
401 else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
402 bfsize = BUF_SIZE_8KiB;
403 else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
404 bfsize = BUF_SIZE_4KiB;
405 else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
406 bfsize = BUF_SIZE_2KiB;
407 else
408 bfsize = DMA_BUFFER_SIZE;
409
410 #ifdef CONFIG_STMMAC_TIMER
411 /* Disable interrupts on completion for the reception if timer is on */
412 if (likely(priv->tm->enable))
413 dis_ic = 1;
414 #endif
415 /* If the MTU exceeds 8k so use the second buffer in the chain */
416 if (bfsize >= BUF_SIZE_8KiB)
417 buff2_needed = 1;
418
419 DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
420 txsize, rxsize, bfsize);
421
422 priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
423 priv->rx_skbuff =
424 kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
425 priv->dma_rx =
426 (struct dma_desc *)dma_alloc_coherent(priv->device,
427 rxsize *
428 sizeof(struct dma_desc),
429 &priv->dma_rx_phy,
430 GFP_KERNEL);
431 priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
432 GFP_KERNEL);
433 priv->dma_tx =
434 (struct dma_desc *)dma_alloc_coherent(priv->device,
435 txsize *
436 sizeof(struct dma_desc),
437 &priv->dma_tx_phy,
438 GFP_KERNEL);
439
440 if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
441 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
442 return;
443 }
444
445 DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
446 "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
447 dev->name, priv->dma_rx, priv->dma_tx,
448 (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
449
450 /* RX INITIALIZATION */
451 DBG(probe, INFO, "stmmac: SKB addresses:\n"
452 "skb\t\tskb data\tdma data\n");
453
454 for (i = 0; i < rxsize; i++) {
455 struct dma_desc *p = priv->dma_rx + i;
456
457 skb = netdev_alloc_skb_ip_align(dev, bfsize);
458 if (unlikely(skb == NULL)) {
459 pr_err("%s: Rx init fails; skb is NULL\n", __func__);
460 break;
461 }
462 priv->rx_skbuff[i] = skb;
463 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
464 bfsize, DMA_FROM_DEVICE);
465
466 p->des2 = priv->rx_skbuff_dma[i];
467 if (unlikely(buff2_needed))
468 p->des3 = p->des2 + BUF_SIZE_8KiB;
469 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
470 priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
471 }
472 priv->cur_rx = 0;
473 priv->dirty_rx = (unsigned int)(i - rxsize);
474 priv->dma_buf_sz = bfsize;
475 buf_sz = bfsize;
476
477 /* TX INITIALIZATION */
478 for (i = 0; i < txsize; i++) {
479 priv->tx_skbuff[i] = NULL;
480 priv->dma_tx[i].des2 = 0;
481 }
482 priv->dirty_tx = 0;
483 priv->cur_tx = 0;
484
485 /* Clear the Rx/Tx descriptors */
486 priv->hw->desc->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
487 priv->hw->desc->init_tx_desc(priv->dma_tx, txsize);
488
489 if (netif_msg_hw(priv)) {
490 pr_info("RX descriptor ring:\n");
491 display_ring(priv->dma_rx, rxsize);
492 pr_info("TX descriptor ring:\n");
493 display_ring(priv->dma_tx, txsize);
494 }
495 }
496
497 static void dma_free_rx_skbufs(struct stmmac_priv *priv)
498 {
499 int i;
500
501 for (i = 0; i < priv->dma_rx_size; i++) {
502 if (priv->rx_skbuff[i]) {
503 dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
504 priv->dma_buf_sz, DMA_FROM_DEVICE);
505 dev_kfree_skb_any(priv->rx_skbuff[i]);
506 }
507 priv->rx_skbuff[i] = NULL;
508 }
509 }
510
511 static void dma_free_tx_skbufs(struct stmmac_priv *priv)
512 {
513 int i;
514
515 for (i = 0; i < priv->dma_tx_size; i++) {
516 if (priv->tx_skbuff[i] != NULL) {
517 struct dma_desc *p = priv->dma_tx + i;
518 if (p->des2)
519 dma_unmap_single(priv->device, p->des2,
520 priv->hw->desc->get_tx_len(p),
521 DMA_TO_DEVICE);
522 dev_kfree_skb_any(priv->tx_skbuff[i]);
523 priv->tx_skbuff[i] = NULL;
524 }
525 }
526 }
527
528 static void free_dma_desc_resources(struct stmmac_priv *priv)
529 {
530 /* Release the DMA TX/RX socket buffers */
531 dma_free_rx_skbufs(priv);
532 dma_free_tx_skbufs(priv);
533
534 /* Free the region of consistent memory previously allocated for
535 * the DMA */
536 dma_free_coherent(priv->device,
537 priv->dma_tx_size * sizeof(struct dma_desc),
538 priv->dma_tx, priv->dma_tx_phy);
539 dma_free_coherent(priv->device,
540 priv->dma_rx_size * sizeof(struct dma_desc),
541 priv->dma_rx, priv->dma_rx_phy);
542 kfree(priv->rx_skbuff_dma);
543 kfree(priv->rx_skbuff);
544 kfree(priv->tx_skbuff);
545 }
546
547 /**
548 * stmmac_dma_operation_mode - HW DMA operation mode
549 * @priv : pointer to the private device structure.
550 * Description: it sets the DMA operation mode: tx/rx DMA thresholds
551 * or Store-And-Forward capability.
552 */
553 static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
554 {
555 if (likely(priv->plat->force_sf_dma_mode ||
556 ((priv->plat->tx_coe) && (!priv->no_csum_insertion)))) {
557 /*
558 * In case of GMAC, SF mode can be enabled
559 * to perform the TX COE in HW. This depends on:
560 * 1) TX COE if actually supported
561 * 2) There is no bugged Jumbo frame support
562 * that needs to not insert csum in the TDES.
563 */
564 priv->hw->dma->dma_mode(priv->ioaddr,
565 SF_DMA_MODE, SF_DMA_MODE);
566 tc = SF_DMA_MODE;
567 } else
568 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
569 }
570
571 /**
572 * stmmac_tx:
573 * @priv: private driver structure
574 * Description: it reclaims resources after transmission completes.
575 */
576 static void stmmac_tx(struct stmmac_priv *priv)
577 {
578 unsigned int txsize = priv->dma_tx_size;
579
580 while (priv->dirty_tx != priv->cur_tx) {
581 int last;
582 unsigned int entry = priv->dirty_tx % txsize;
583 struct sk_buff *skb = priv->tx_skbuff[entry];
584 struct dma_desc *p = priv->dma_tx + entry;
585
586 /* Check if the descriptor is owned by the DMA. */
587 if (priv->hw->desc->get_tx_owner(p))
588 break;
589
590 /* Verify tx error by looking at the last segment */
591 last = priv->hw->desc->get_tx_ls(p);
592 if (likely(last)) {
593 int tx_error =
594 priv->hw->desc->tx_status(&priv->dev->stats,
595 &priv->xstats, p,
596 priv->ioaddr);
597 if (likely(tx_error == 0)) {
598 priv->dev->stats.tx_packets++;
599 priv->xstats.tx_pkt_n++;
600 } else
601 priv->dev->stats.tx_errors++;
602 }
603 TX_DBG("%s: curr %d, dirty %d\n", __func__,
604 priv->cur_tx, priv->dirty_tx);
605
606 if (likely(p->des2))
607 dma_unmap_single(priv->device, p->des2,
608 priv->hw->desc->get_tx_len(p),
609 DMA_TO_DEVICE);
610 if (unlikely(p->des3))
611 p->des3 = 0;
612
613 if (likely(skb != NULL)) {
614 /*
615 * If there's room in the queue (limit it to size)
616 * we add this skb back into the pool,
617 * if it's the right size.
618 */
619 if ((skb_queue_len(&priv->rx_recycle) <
620 priv->dma_rx_size) &&
621 skb_recycle_check(skb, priv->dma_buf_sz))
622 __skb_queue_head(&priv->rx_recycle, skb);
623 else
624 dev_kfree_skb(skb);
625
626 priv->tx_skbuff[entry] = NULL;
627 }
628
629 priv->hw->desc->release_tx_desc(p);
630
631 entry = (++priv->dirty_tx) % txsize;
632 }
633 if (unlikely(netif_queue_stopped(priv->dev) &&
634 stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
635 netif_tx_lock(priv->dev);
636 if (netif_queue_stopped(priv->dev) &&
637 stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
638 TX_DBG("%s: restart transmit\n", __func__);
639 netif_wake_queue(priv->dev);
640 }
641 netif_tx_unlock(priv->dev);
642 }
643 }
644
645 static inline void stmmac_enable_irq(struct stmmac_priv *priv)
646 {
647 #ifdef CONFIG_STMMAC_TIMER
648 if (likely(priv->tm->enable))
649 priv->tm->timer_start(tmrate);
650 else
651 #endif
652 priv->hw->dma->enable_dma_irq(priv->ioaddr);
653 }
654
655 static inline void stmmac_disable_irq(struct stmmac_priv *priv)
656 {
657 #ifdef CONFIG_STMMAC_TIMER
658 if (likely(priv->tm->enable))
659 priv->tm->timer_stop();
660 else
661 #endif
662 priv->hw->dma->disable_dma_irq(priv->ioaddr);
663 }
664
665 static int stmmac_has_work(struct stmmac_priv *priv)
666 {
667 unsigned int has_work = 0;
668 int rxret, tx_work = 0;
669
670 rxret = priv->hw->desc->get_rx_owner(priv->dma_rx +
671 (priv->cur_rx % priv->dma_rx_size));
672
673 if (priv->dirty_tx != priv->cur_tx)
674 tx_work = 1;
675
676 if (likely(!rxret || tx_work))
677 has_work = 1;
678
679 return has_work;
680 }
681
682 static inline void _stmmac_schedule(struct stmmac_priv *priv)
683 {
684 if (likely(stmmac_has_work(priv))) {
685 stmmac_disable_irq(priv);
686 napi_schedule(&priv->napi);
687 }
688 }
689
690 #ifdef CONFIG_STMMAC_TIMER
691 void stmmac_schedule(struct net_device *dev)
692 {
693 struct stmmac_priv *priv = netdev_priv(dev);
694
695 priv->xstats.sched_timer_n++;
696
697 _stmmac_schedule(priv);
698 }
699
700 static void stmmac_no_timer_started(unsigned int x)
701 {;
702 };
703
704 static void stmmac_no_timer_stopped(void)
705 {;
706 };
707 #endif
708
709 /**
710 * stmmac_tx_err:
711 * @priv: pointer to the private device structure
712 * Description: it cleans the descriptors and restarts the transmission
713 * in case of errors.
714 */
715 static void stmmac_tx_err(struct stmmac_priv *priv)
716 {
717
718 netif_stop_queue(priv->dev);
719
720 priv->hw->dma->stop_tx(priv->ioaddr);
721 dma_free_tx_skbufs(priv);
722 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
723 priv->dirty_tx = 0;
724 priv->cur_tx = 0;
725 priv->hw->dma->start_tx(priv->ioaddr);
726
727 priv->dev->stats.tx_errors++;
728 netif_wake_queue(priv->dev);
729 }
730
731
732 static void stmmac_dma_interrupt(struct stmmac_priv *priv)
733 {
734 int status;
735
736 status = priv->hw->dma->dma_interrupt(priv->ioaddr, &priv->xstats);
737 if (likely(status == handle_tx_rx))
738 _stmmac_schedule(priv);
739
740 else if (unlikely(status == tx_hard_error_bump_tc)) {
741 /* Try to bump up the dma threshold on this failure */
742 if (unlikely(tc != SF_DMA_MODE) && (tc <= 256)) {
743 tc += 64;
744 priv->hw->dma->dma_mode(priv->ioaddr, tc, SF_DMA_MODE);
745 priv->xstats.threshold = tc;
746 }
747 } else if (unlikely(status == tx_hard_error))
748 stmmac_tx_err(priv);
749 }
750
751 /**
752 * stmmac_open - open entry point of the driver
753 * @dev : pointer to the device structure.
754 * Description:
755 * This function is the open entry point of the driver.
756 * Return value:
757 * 0 on success and an appropriate (-)ve integer as defined in errno.h
758 * file on failure.
759 */
760 static int stmmac_open(struct net_device *dev)
761 {
762 struct stmmac_priv *priv = netdev_priv(dev);
763 int ret;
764
765 /* Check that the MAC address is valid. If its not, refuse
766 * to bring the device up. The user must specify an
767 * address using the following linux command:
768 * ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx */
769 if (!is_valid_ether_addr(dev->dev_addr)) {
770 random_ether_addr(dev->dev_addr);
771 pr_warning("%s: generated random MAC address %pM\n", dev->name,
772 dev->dev_addr);
773 }
774
775 stmmac_verify_args();
776
777 #ifdef CONFIG_STMMAC_TIMER
778 priv->tm = kzalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
779 if (unlikely(priv->tm == NULL)) {
780 pr_err("%s: ERROR: timer memory alloc failed\n", __func__);
781 return -ENOMEM;
782 }
783 priv->tm->freq = tmrate;
784
785 /* Test if the external timer can be actually used.
786 * In case of failure continue without timer. */
787 if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
788 pr_warning("stmmaceth: cannot attach the external timer.\n");
789 priv->tm->freq = 0;
790 priv->tm->timer_start = stmmac_no_timer_started;
791 priv->tm->timer_stop = stmmac_no_timer_stopped;
792 } else
793 priv->tm->enable = 1;
794 #endif
795 ret = stmmac_init_phy(dev);
796 if (unlikely(ret)) {
797 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
798 goto open_error;
799 }
800
801 /* Create and initialize the TX/RX descriptors chains. */
802 priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
803 priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
804 priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
805 init_dma_desc_rings(dev);
806
807 /* DMA initialization and SW reset */
808 ret = priv->hw->dma->init(priv->ioaddr, priv->plat->pbl,
809 priv->dma_tx_phy, priv->dma_rx_phy);
810 if (ret < 0) {
811 pr_err("%s: DMA initialization failed\n", __func__);
812 goto open_error;
813 }
814
815 /* Copy the MAC addr into the HW */
816 priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
817 /* If required, perform hw setup of the bus. */
818 if (priv->plat->bus_setup)
819 priv->plat->bus_setup(priv->ioaddr);
820 /* Initialize the MAC Core */
821 priv->hw->mac->core_init(priv->ioaddr);
822
823 priv->rx_coe = priv->hw->mac->rx_coe(priv->ioaddr);
824 if (priv->rx_coe)
825 pr_info("stmmac: Rx Checksum Offload Engine supported\n");
826 if (priv->plat->tx_coe)
827 pr_info("\tTX Checksum insertion supported\n");
828 netdev_update_features(dev);
829
830 /* Initialise the MMC (if present) to disable all interrupts. */
831 writel(0xffffffff, priv->ioaddr + MMC_HIGH_INTR_MASK);
832 writel(0xffffffff, priv->ioaddr + MMC_LOW_INTR_MASK);
833
834 /* Request the IRQ lines */
835 ret = request_irq(dev->irq, stmmac_interrupt,
836 IRQF_SHARED, dev->name, dev);
837 if (unlikely(ret < 0)) {
838 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
839 __func__, dev->irq, ret);
840 goto open_error;
841 }
842
843 /* Enable the MAC Rx/Tx */
844 stmmac_enable_mac(priv->ioaddr);
845
846 /* Set the HW DMA mode and the COE */
847 stmmac_dma_operation_mode(priv);
848
849 /* Extra statistics */
850 memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
851 priv->xstats.threshold = tc;
852
853 /* Start the ball rolling... */
854 DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
855 priv->hw->dma->start_tx(priv->ioaddr);
856 priv->hw->dma->start_rx(priv->ioaddr);
857
858 #ifdef CONFIG_STMMAC_TIMER
859 priv->tm->timer_start(tmrate);
860 #endif
861 /* Dump DMA/MAC registers */
862 if (netif_msg_hw(priv)) {
863 priv->hw->mac->dump_regs(priv->ioaddr);
864 priv->hw->dma->dump_regs(priv->ioaddr);
865 }
866
867 if (priv->phydev)
868 phy_start(priv->phydev);
869
870 napi_enable(&priv->napi);
871 skb_queue_head_init(&priv->rx_recycle);
872 netif_start_queue(dev);
873
874 return 0;
875
876 open_error:
877 #ifdef CONFIG_STMMAC_TIMER
878 kfree(priv->tm);
879 #endif
880 if (priv->phydev)
881 phy_disconnect(priv->phydev);
882
883 return ret;
884 }
885
886 /**
887 * stmmac_release - close entry point of the driver
888 * @dev : device pointer.
889 * Description:
890 * This is the stop entry point of the driver.
891 */
892 static int stmmac_release(struct net_device *dev)
893 {
894 struct stmmac_priv *priv = netdev_priv(dev);
895
896 /* Stop and disconnect the PHY */
897 if (priv->phydev) {
898 phy_stop(priv->phydev);
899 phy_disconnect(priv->phydev);
900 priv->phydev = NULL;
901 }
902
903 netif_stop_queue(dev);
904
905 #ifdef CONFIG_STMMAC_TIMER
906 /* Stop and release the timer */
907 stmmac_close_ext_timer();
908 if (priv->tm != NULL)
909 kfree(priv->tm);
910 #endif
911 napi_disable(&priv->napi);
912 skb_queue_purge(&priv->rx_recycle);
913
914 /* Free the IRQ lines */
915 free_irq(dev->irq, dev);
916
917 /* Stop TX/RX DMA and clear the descriptors */
918 priv->hw->dma->stop_tx(priv->ioaddr);
919 priv->hw->dma->stop_rx(priv->ioaddr);
920
921 /* Release and free the Rx/Tx resources */
922 free_dma_desc_resources(priv);
923
924 /* Disable the MAC Rx/Tx */
925 stmmac_disable_mac(priv->ioaddr);
926
927 netif_carrier_off(dev);
928
929 return 0;
930 }
931
932 static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
933 struct net_device *dev,
934 int csum_insertion)
935 {
936 struct stmmac_priv *priv = netdev_priv(dev);
937 unsigned int nopaged_len = skb_headlen(skb);
938 unsigned int txsize = priv->dma_tx_size;
939 unsigned int entry = priv->cur_tx % txsize;
940 struct dma_desc *desc = priv->dma_tx + entry;
941
942 if (nopaged_len > BUF_SIZE_8KiB) {
943
944 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
945
946 desc->des2 = dma_map_single(priv->device, skb->data,
947 BUF_SIZE_8KiB, DMA_TO_DEVICE);
948 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
949 priv->hw->desc->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
950 csum_insertion);
951
952 entry = (++priv->cur_tx) % txsize;
953 desc = priv->dma_tx + entry;
954
955 desc->des2 = dma_map_single(priv->device,
956 skb->data + BUF_SIZE_8KiB,
957 buf2_size, DMA_TO_DEVICE);
958 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
959 priv->hw->desc->prepare_tx_desc(desc, 0, buf2_size,
960 csum_insertion);
961 priv->hw->desc->set_tx_owner(desc);
962 priv->tx_skbuff[entry] = NULL;
963 } else {
964 desc->des2 = dma_map_single(priv->device, skb->data,
965 nopaged_len, DMA_TO_DEVICE);
966 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
967 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
968 csum_insertion);
969 }
970 return entry;
971 }
972
973 /**
974 * stmmac_xmit:
975 * @skb : the socket buffer
976 * @dev : device pointer
977 * Description : Tx entry point of the driver.
978 */
979 static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
980 {
981 struct stmmac_priv *priv = netdev_priv(dev);
982 unsigned int txsize = priv->dma_tx_size;
983 unsigned int entry;
984 int i, csum_insertion = 0;
985 int nfrags = skb_shinfo(skb)->nr_frags;
986 struct dma_desc *desc, *first;
987
988 if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
989 if (!netif_queue_stopped(dev)) {
990 netif_stop_queue(dev);
991 /* This is a hard error, log it. */
992 pr_err("%s: BUG! Tx Ring full when queue awake\n",
993 __func__);
994 }
995 return NETDEV_TX_BUSY;
996 }
997
998 entry = priv->cur_tx % txsize;
999
1000 #ifdef STMMAC_XMIT_DEBUG
1001 if ((skb->len > ETH_FRAME_LEN) || nfrags)
1002 pr_info("stmmac xmit:\n"
1003 "\tskb addr %p - len: %d - nopaged_len: %d\n"
1004 "\tn_frags: %d - ip_summed: %d - %s gso\n",
1005 skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1006 !skb_is_gso(skb) ? "isn't" : "is");
1007 #endif
1008
1009 csum_insertion = (skb->ip_summed == CHECKSUM_PARTIAL);
1010
1011 desc = priv->dma_tx + entry;
1012 first = desc;
1013
1014 #ifdef STMMAC_XMIT_DEBUG
1015 if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1016 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1017 "\t\tn_frags: %d, ip_summed: %d\n",
1018 skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1019 #endif
1020 priv->tx_skbuff[entry] = skb;
1021 if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1022 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1023 desc = priv->dma_tx + entry;
1024 } else {
1025 unsigned int nopaged_len = skb_headlen(skb);
1026 desc->des2 = dma_map_single(priv->device, skb->data,
1027 nopaged_len, DMA_TO_DEVICE);
1028 priv->hw->desc->prepare_tx_desc(desc, 1, nopaged_len,
1029 csum_insertion);
1030 }
1031
1032 for (i = 0; i < nfrags; i++) {
1033 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1034 int len = frag->size;
1035
1036 entry = (++priv->cur_tx) % txsize;
1037 desc = priv->dma_tx + entry;
1038
1039 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1040 desc->des2 = dma_map_page(priv->device, frag->page,
1041 frag->page_offset,
1042 len, DMA_TO_DEVICE);
1043 priv->tx_skbuff[entry] = NULL;
1044 priv->hw->desc->prepare_tx_desc(desc, 0, len, csum_insertion);
1045 wmb();
1046 priv->hw->desc->set_tx_owner(desc);
1047 }
1048
1049 /* Interrupt on completition only for the latest segment */
1050 priv->hw->desc->close_tx_desc(desc);
1051
1052 #ifdef CONFIG_STMMAC_TIMER
1053 /* Clean IC while using timer */
1054 if (likely(priv->tm->enable))
1055 priv->hw->desc->clear_tx_ic(desc);
1056 #endif
1057
1058 wmb();
1059
1060 /* To avoid raise condition */
1061 priv->hw->desc->set_tx_owner(first);
1062
1063 priv->cur_tx++;
1064
1065 #ifdef STMMAC_XMIT_DEBUG
1066 if (netif_msg_pktdata(priv)) {
1067 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1068 "first=%p, nfrags=%d\n",
1069 (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1070 entry, first, nfrags);
1071 display_ring(priv->dma_tx, txsize);
1072 pr_info(">>> frame to be transmitted: ");
1073 print_pkt(skb->data, skb->len);
1074 }
1075 #endif
1076 if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1077 TX_DBG("%s: stop transmitted packets\n", __func__);
1078 netif_stop_queue(dev);
1079 }
1080
1081 dev->stats.tx_bytes += skb->len;
1082
1083 skb_tx_timestamp(skb);
1084
1085 priv->hw->dma->enable_dma_transmission(priv->ioaddr);
1086
1087 return NETDEV_TX_OK;
1088 }
1089
1090 static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1091 {
1092 unsigned int rxsize = priv->dma_rx_size;
1093 int bfsize = priv->dma_buf_sz;
1094 struct dma_desc *p = priv->dma_rx;
1095
1096 for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1097 unsigned int entry = priv->dirty_rx % rxsize;
1098 if (likely(priv->rx_skbuff[entry] == NULL)) {
1099 struct sk_buff *skb;
1100
1101 skb = __skb_dequeue(&priv->rx_recycle);
1102 if (skb == NULL)
1103 skb = netdev_alloc_skb_ip_align(priv->dev,
1104 bfsize);
1105
1106 if (unlikely(skb == NULL))
1107 break;
1108
1109 priv->rx_skbuff[entry] = skb;
1110 priv->rx_skbuff_dma[entry] =
1111 dma_map_single(priv->device, skb->data, bfsize,
1112 DMA_FROM_DEVICE);
1113
1114 (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1115 if (unlikely(priv->plat->has_gmac)) {
1116 if (bfsize >= BUF_SIZE_8KiB)
1117 (p + entry)->des3 =
1118 (p + entry)->des2 + BUF_SIZE_8KiB;
1119 }
1120 RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1121 }
1122 wmb();
1123 priv->hw->desc->set_rx_owner(p + entry);
1124 }
1125 }
1126
1127 static int stmmac_rx(struct stmmac_priv *priv, int limit)
1128 {
1129 unsigned int rxsize = priv->dma_rx_size;
1130 unsigned int entry = priv->cur_rx % rxsize;
1131 unsigned int next_entry;
1132 unsigned int count = 0;
1133 struct dma_desc *p = priv->dma_rx + entry;
1134 struct dma_desc *p_next;
1135
1136 #ifdef STMMAC_RX_DEBUG
1137 if (netif_msg_hw(priv)) {
1138 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1139 display_ring(priv->dma_rx, rxsize);
1140 }
1141 #endif
1142 count = 0;
1143 while (!priv->hw->desc->get_rx_owner(p)) {
1144 int status;
1145
1146 if (count >= limit)
1147 break;
1148
1149 count++;
1150
1151 next_entry = (++priv->cur_rx) % rxsize;
1152 p_next = priv->dma_rx + next_entry;
1153 prefetch(p_next);
1154
1155 /* read the status of the incoming frame */
1156 status = (priv->hw->desc->rx_status(&priv->dev->stats,
1157 &priv->xstats, p));
1158 if (unlikely(status == discard_frame))
1159 priv->dev->stats.rx_errors++;
1160 else {
1161 struct sk_buff *skb;
1162 int frame_len;
1163
1164 frame_len = priv->hw->desc->get_rx_frame_len(p);
1165 /* ACS is set; GMAC core strips PAD/FCS for IEEE 802.3
1166 * Type frames (LLC/LLC-SNAP) */
1167 if (unlikely(status != llc_snap))
1168 frame_len -= ETH_FCS_LEN;
1169 #ifdef STMMAC_RX_DEBUG
1170 if (frame_len > ETH_FRAME_LEN)
1171 pr_debug("\tRX frame size %d, COE status: %d\n",
1172 frame_len, status);
1173
1174 if (netif_msg_hw(priv))
1175 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1176 p, entry, p->des2);
1177 #endif
1178 skb = priv->rx_skbuff[entry];
1179 if (unlikely(!skb)) {
1180 pr_err("%s: Inconsistent Rx descriptor chain\n",
1181 priv->dev->name);
1182 priv->dev->stats.rx_dropped++;
1183 break;
1184 }
1185 prefetch(skb->data - NET_IP_ALIGN);
1186 priv->rx_skbuff[entry] = NULL;
1187
1188 skb_put(skb, frame_len);
1189 dma_unmap_single(priv->device,
1190 priv->rx_skbuff_dma[entry],
1191 priv->dma_buf_sz, DMA_FROM_DEVICE);
1192 #ifdef STMMAC_RX_DEBUG
1193 if (netif_msg_pktdata(priv)) {
1194 pr_info(" frame received (%dbytes)", frame_len);
1195 print_pkt(skb->data, frame_len);
1196 }
1197 #endif
1198 skb->protocol = eth_type_trans(skb, priv->dev);
1199
1200 if (unlikely(status == csum_none)) {
1201 /* always for the old mac 10/100 */
1202 skb_checksum_none_assert(skb);
1203 netif_receive_skb(skb);
1204 } else {
1205 skb->ip_summed = CHECKSUM_UNNECESSARY;
1206 napi_gro_receive(&priv->napi, skb);
1207 }
1208
1209 priv->dev->stats.rx_packets++;
1210 priv->dev->stats.rx_bytes += frame_len;
1211 }
1212 entry = next_entry;
1213 p = p_next; /* use prefetched values */
1214 }
1215
1216 stmmac_rx_refill(priv);
1217
1218 priv->xstats.rx_pkt_n += count;
1219
1220 return count;
1221 }
1222
1223 /**
1224 * stmmac_poll - stmmac poll method (NAPI)
1225 * @napi : pointer to the napi structure.
1226 * @budget : maximum number of packets that the current CPU can receive from
1227 * all interfaces.
1228 * Description :
1229 * This function implements the the reception process.
1230 * Also it runs the TX completion thread
1231 */
1232 static int stmmac_poll(struct napi_struct *napi, int budget)
1233 {
1234 struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1235 int work_done = 0;
1236
1237 priv->xstats.poll_n++;
1238 stmmac_tx(priv);
1239 work_done = stmmac_rx(priv, budget);
1240
1241 if (work_done < budget) {
1242 napi_complete(napi);
1243 stmmac_enable_irq(priv);
1244 }
1245 return work_done;
1246 }
1247
1248 /**
1249 * stmmac_tx_timeout
1250 * @dev : Pointer to net device structure
1251 * Description: this function is called when a packet transmission fails to
1252 * complete within a reasonable tmrate. The driver will mark the error in the
1253 * netdev structure and arrange for the device to be reset to a sane state
1254 * in order to transmit a new packet.
1255 */
1256 static void stmmac_tx_timeout(struct net_device *dev)
1257 {
1258 struct stmmac_priv *priv = netdev_priv(dev);
1259
1260 /* Clear Tx resources and restart transmitting again */
1261 stmmac_tx_err(priv);
1262 }
1263
1264 /* Configuration changes (passed on by ifconfig) */
1265 static int stmmac_config(struct net_device *dev, struct ifmap *map)
1266 {
1267 if (dev->flags & IFF_UP) /* can't act on a running interface */
1268 return -EBUSY;
1269
1270 /* Don't allow changing the I/O address */
1271 if (map->base_addr != dev->base_addr) {
1272 pr_warning("%s: can't change I/O address\n", dev->name);
1273 return -EOPNOTSUPP;
1274 }
1275
1276 /* Don't allow changing the IRQ */
1277 if (map->irq != dev->irq) {
1278 pr_warning("%s: can't change IRQ number %d\n",
1279 dev->name, dev->irq);
1280 return -EOPNOTSUPP;
1281 }
1282
1283 /* ignore other fields */
1284 return 0;
1285 }
1286
1287 /**
1288 * stmmac_set_rx_mode - entry point for multicast addressing
1289 * @dev : pointer to the device structure
1290 * Description:
1291 * This function is a driver entry point which gets called by the kernel
1292 * whenever multicast addresses must be enabled/disabled.
1293 * Return value:
1294 * void.
1295 */
1296 static void stmmac_set_rx_mode(struct net_device *dev)
1297 {
1298 struct stmmac_priv *priv = netdev_priv(dev);
1299
1300 spin_lock(&priv->lock);
1301 priv->hw->mac->set_filter(dev);
1302 spin_unlock(&priv->lock);
1303 }
1304
1305 /**
1306 * stmmac_change_mtu - entry point to change MTU size for the device.
1307 * @dev : device pointer.
1308 * @new_mtu : the new MTU size for the device.
1309 * Description: the Maximum Transfer Unit (MTU) is used by the network layer
1310 * to drive packet transmission. Ethernet has an MTU of 1500 octets
1311 * (ETH_DATA_LEN). This value can be changed with ifconfig.
1312 * Return value:
1313 * 0 on success and an appropriate (-)ve integer as defined in errno.h
1314 * file on failure.
1315 */
1316 static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1317 {
1318 struct stmmac_priv *priv = netdev_priv(dev);
1319 int max_mtu;
1320
1321 if (netif_running(dev)) {
1322 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1323 return -EBUSY;
1324 }
1325
1326 if (priv->plat->has_gmac)
1327 max_mtu = JUMBO_LEN;
1328 else
1329 max_mtu = ETH_DATA_LEN;
1330
1331 if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1332 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1333 return -EINVAL;
1334 }
1335
1336 dev->mtu = new_mtu;
1337 netdev_update_features(dev);
1338
1339 return 0;
1340 }
1341
1342 static u32 stmmac_fix_features(struct net_device *dev, u32 features)
1343 {
1344 struct stmmac_priv *priv = netdev_priv(dev);
1345
1346 if (!priv->rx_coe)
1347 features &= ~NETIF_F_RXCSUM;
1348 if (!priv->plat->tx_coe)
1349 features &= ~NETIF_F_ALL_CSUM;
1350
1351 /* Some GMAC devices have a bugged Jumbo frame support that
1352 * needs to have the Tx COE disabled for oversized frames
1353 * (due to limited buffer sizes). In this case we disable
1354 * the TX csum insertionin the TDES and not use SF. */
1355 if (priv->plat->bugged_jumbo && (dev->mtu > ETH_DATA_LEN))
1356 features &= ~NETIF_F_ALL_CSUM;
1357
1358 return features;
1359 }
1360
1361 static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1362 {
1363 struct net_device *dev = (struct net_device *)dev_id;
1364 struct stmmac_priv *priv = netdev_priv(dev);
1365
1366 if (unlikely(!dev)) {
1367 pr_err("%s: invalid dev pointer\n", __func__);
1368 return IRQ_NONE;
1369 }
1370
1371 if (priv->plat->has_gmac)
1372 /* To handle GMAC own interrupts */
1373 priv->hw->mac->host_irq_status((void __iomem *) dev->base_addr);
1374
1375 stmmac_dma_interrupt(priv);
1376
1377 return IRQ_HANDLED;
1378 }
1379
1380 #ifdef CONFIG_NET_POLL_CONTROLLER
1381 /* Polling receive - used by NETCONSOLE and other diagnostic tools
1382 * to allow network I/O with interrupts disabled. */
1383 static void stmmac_poll_controller(struct net_device *dev)
1384 {
1385 disable_irq(dev->irq);
1386 stmmac_interrupt(dev->irq, dev);
1387 enable_irq(dev->irq);
1388 }
1389 #endif
1390
1391 /**
1392 * stmmac_ioctl - Entry point for the Ioctl
1393 * @dev: Device pointer.
1394 * @rq: An IOCTL specefic structure, that can contain a pointer to
1395 * a proprietary structure used to pass information to the driver.
1396 * @cmd: IOCTL command
1397 * Description:
1398 * Currently there are no special functionality supported in IOCTL, just the
1399 * phy_mii_ioctl(...) can be invoked.
1400 */
1401 static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1402 {
1403 struct stmmac_priv *priv = netdev_priv(dev);
1404 int ret;
1405
1406 if (!netif_running(dev))
1407 return -EINVAL;
1408
1409 if (!priv->phydev)
1410 return -EINVAL;
1411
1412 spin_lock(&priv->lock);
1413 ret = phy_mii_ioctl(priv->phydev, rq, cmd);
1414 spin_unlock(&priv->lock);
1415
1416 return ret;
1417 }
1418
1419 static const struct net_device_ops stmmac_netdev_ops = {
1420 .ndo_open = stmmac_open,
1421 .ndo_start_xmit = stmmac_xmit,
1422 .ndo_stop = stmmac_release,
1423 .ndo_change_mtu = stmmac_change_mtu,
1424 .ndo_fix_features = stmmac_fix_features,
1425 .ndo_set_rx_mode = stmmac_set_rx_mode,
1426 .ndo_tx_timeout = stmmac_tx_timeout,
1427 .ndo_do_ioctl = stmmac_ioctl,
1428 .ndo_set_config = stmmac_config,
1429 #ifdef CONFIG_NET_POLL_CONTROLLER
1430 .ndo_poll_controller = stmmac_poll_controller,
1431 #endif
1432 .ndo_set_mac_address = eth_mac_addr,
1433 };
1434
1435 /**
1436 * stmmac_probe - Initialization of the adapter .
1437 * @dev : device pointer
1438 * Description: The function initializes the network device structure for
1439 * the STMMAC driver. It also calls the low level routines
1440 * in order to init the HW (i.e. the DMA engine)
1441 */
1442 static int stmmac_probe(struct net_device *dev)
1443 {
1444 int ret = 0;
1445 struct stmmac_priv *priv = netdev_priv(dev);
1446
1447 ether_setup(dev);
1448
1449 dev->netdev_ops = &stmmac_netdev_ops;
1450 stmmac_set_ethtool_ops(dev);
1451
1452 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1453 dev->features |= dev->hw_features | NETIF_F_HIGHDMA;
1454 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1455 #ifdef STMMAC_VLAN_TAG_USED
1456 /* Both mac100 and gmac support receive VLAN tag detection */
1457 dev->features |= NETIF_F_HW_VLAN_RX;
1458 #endif
1459 priv->msg_enable = netif_msg_init(debug, default_msg_level);
1460
1461 if (flow_ctrl)
1462 priv->flow_ctrl = FLOW_AUTO; /* RX/TX pause on */
1463
1464 priv->pause = pause;
1465 netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1466
1467 /* Get the MAC address */
1468 priv->hw->mac->get_umac_addr((void __iomem *) dev->base_addr,
1469 dev->dev_addr, 0);
1470
1471 if (!is_valid_ether_addr(dev->dev_addr))
1472 pr_warning("\tno valid MAC address;"
1473 "please, use ifconfig or nwhwconfig!\n");
1474
1475 spin_lock_init(&priv->lock);
1476
1477 ret = register_netdev(dev);
1478 if (ret) {
1479 pr_err("%s: ERROR %i registering the device\n",
1480 __func__, ret);
1481 return -ENODEV;
1482 }
1483
1484 DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1485 dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1486 (dev->features & NETIF_F_IP_CSUM) ? "on" : "off");
1487
1488 return ret;
1489 }
1490
1491 /**
1492 * stmmac_mac_device_setup
1493 * @dev : device pointer
1494 * Description: select and initialise the mac device (mac100 or Gmac).
1495 */
1496 static int stmmac_mac_device_setup(struct net_device *dev)
1497 {
1498 struct stmmac_priv *priv = netdev_priv(dev);
1499
1500 struct mac_device_info *device;
1501
1502 if (priv->plat->has_gmac) {
1503 dev->priv_flags |= IFF_UNICAST_FLT;
1504 device = dwmac1000_setup(priv->ioaddr);
1505 } else {
1506 device = dwmac100_setup(priv->ioaddr);
1507 }
1508
1509 if (!device)
1510 return -ENOMEM;
1511
1512 if (priv->plat->enh_desc) {
1513 device->desc = &enh_desc_ops;
1514 pr_info("\tEnhanced descriptor structure\n");
1515 } else
1516 device->desc = &ndesc_ops;
1517
1518 priv->hw = device;
1519
1520 if (device_can_wakeup(priv->device)) {
1521 priv->wolopts = WAKE_MAGIC; /* Magic Frame as default */
1522 enable_irq_wake(dev->irq);
1523 }
1524
1525 return 0;
1526 }
1527
1528 /**
1529 * stmmac_dvr_probe
1530 * @pdev: platform device pointer
1531 * Description: the driver is initialized through platform_device.
1532 */
1533 static int stmmac_dvr_probe(struct platform_device *pdev)
1534 {
1535 int ret = 0;
1536 struct resource *res;
1537 void __iomem *addr = NULL;
1538 struct net_device *ndev = NULL;
1539 struct stmmac_priv *priv = NULL;
1540 struct plat_stmmacenet_data *plat_dat;
1541
1542 pr_info("STMMAC driver:\n\tplatform registration... ");
1543 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1544 if (!res)
1545 return -ENODEV;
1546 pr_info("\tdone!\n");
1547
1548 if (!request_mem_region(res->start, resource_size(res),
1549 pdev->name)) {
1550 pr_err("%s: ERROR: memory allocation failed"
1551 "cannot get the I/O addr 0x%x\n",
1552 __func__, (unsigned int)res->start);
1553 return -EBUSY;
1554 }
1555
1556 addr = ioremap(res->start, resource_size(res));
1557 if (!addr) {
1558 pr_err("%s: ERROR: memory mapping failed\n", __func__);
1559 ret = -ENOMEM;
1560 goto out_release_region;
1561 }
1562
1563 ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1564 if (!ndev) {
1565 pr_err("%s: ERROR: allocating the device\n", __func__);
1566 ret = -ENOMEM;
1567 goto out_unmap;
1568 }
1569
1570 SET_NETDEV_DEV(ndev, &pdev->dev);
1571
1572 /* Get the MAC information */
1573 ndev->irq = platform_get_irq_byname(pdev, "macirq");
1574 if (ndev->irq == -ENXIO) {
1575 pr_err("%s: ERROR: MAC IRQ configuration "
1576 "information not found\n", __func__);
1577 ret = -ENXIO;
1578 goto out_free_ndev;
1579 }
1580
1581 priv = netdev_priv(ndev);
1582 priv->device = &(pdev->dev);
1583 priv->dev = ndev;
1584 plat_dat = pdev->dev.platform_data;
1585
1586 priv->plat = plat_dat;
1587
1588 priv->ioaddr = addr;
1589
1590 /* PMT module is not integrated in all the MAC devices. */
1591 if (plat_dat->pmt) {
1592 pr_info("\tPMT module supported\n");
1593 device_set_wakeup_capable(&pdev->dev, 1);
1594 }
1595
1596 platform_set_drvdata(pdev, ndev);
1597
1598 /* Set the I/O base addr */
1599 ndev->base_addr = (unsigned long)addr;
1600
1601 /* Custom initialisation */
1602 if (priv->plat->init) {
1603 ret = priv->plat->init(pdev);
1604 if (unlikely(ret))
1605 goto out_free_ndev;
1606 }
1607
1608 /* MAC HW revice detection */
1609 ret = stmmac_mac_device_setup(ndev);
1610 if (ret < 0)
1611 goto out_plat_exit;
1612
1613 /* Network Device Registration */
1614 ret = stmmac_probe(ndev);
1615 if (ret < 0)
1616 goto out_plat_exit;
1617
1618 /* Override with kernel parameters if supplied XXX CRS XXX
1619 * this needs to have multiple instances */
1620 if ((phyaddr >= 0) && (phyaddr <= 31))
1621 priv->plat->phy_addr = phyaddr;
1622
1623 pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1624 "\tIO base addr: 0x%p)\n", ndev->name, pdev->name,
1625 pdev->id, ndev->irq, addr);
1626
1627 /* MDIO bus Registration */
1628 pr_debug("\tMDIO bus (id: %d)...", priv->plat->bus_id);
1629 ret = stmmac_mdio_register(ndev);
1630 if (ret < 0)
1631 goto out_unregister;
1632 pr_debug("registered!\n");
1633 return 0;
1634
1635 out_unregister:
1636 unregister_netdev(ndev);
1637 out_plat_exit:
1638 if (priv->plat->exit)
1639 priv->plat->exit(pdev);
1640 out_free_ndev:
1641 free_netdev(ndev);
1642 platform_set_drvdata(pdev, NULL);
1643 out_unmap:
1644 iounmap(addr);
1645 out_release_region:
1646 release_mem_region(res->start, resource_size(res));
1647
1648 return ret;
1649 }
1650
1651 /**
1652 * stmmac_dvr_remove
1653 * @pdev: platform device pointer
1654 * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1655 * changes the link status, releases the DMA descriptor rings,
1656 * unregisters the MDIO bus and unmaps the allocated memory.
1657 */
1658 static int stmmac_dvr_remove(struct platform_device *pdev)
1659 {
1660 struct net_device *ndev = platform_get_drvdata(pdev);
1661 struct stmmac_priv *priv = netdev_priv(ndev);
1662 struct resource *res;
1663
1664 pr_info("%s:\n\tremoving driver", __func__);
1665
1666 priv->hw->dma->stop_rx(priv->ioaddr);
1667 priv->hw->dma->stop_tx(priv->ioaddr);
1668
1669 stmmac_disable_mac(priv->ioaddr);
1670
1671 netif_carrier_off(ndev);
1672
1673 stmmac_mdio_unregister(ndev);
1674
1675 if (priv->plat->exit)
1676 priv->plat->exit(pdev);
1677
1678 platform_set_drvdata(pdev, NULL);
1679 unregister_netdev(ndev);
1680
1681 iounmap((void *)priv->ioaddr);
1682 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1683 release_mem_region(res->start, resource_size(res));
1684
1685 free_netdev(ndev);
1686
1687 return 0;
1688 }
1689
1690 #ifdef CONFIG_PM
1691 static int stmmac_suspend(struct device *dev)
1692 {
1693 struct net_device *ndev = dev_get_drvdata(dev);
1694 struct stmmac_priv *priv = netdev_priv(ndev);
1695 int dis_ic = 0;
1696
1697 if (!ndev || !netif_running(ndev))
1698 return 0;
1699
1700 spin_lock(&priv->lock);
1701
1702 netif_device_detach(ndev);
1703 netif_stop_queue(ndev);
1704 if (priv->phydev)
1705 phy_stop(priv->phydev);
1706
1707 #ifdef CONFIG_STMMAC_TIMER
1708 priv->tm->timer_stop();
1709 if (likely(priv->tm->enable))
1710 dis_ic = 1;
1711 #endif
1712 napi_disable(&priv->napi);
1713
1714 /* Stop TX/RX DMA */
1715 priv->hw->dma->stop_tx(priv->ioaddr);
1716 priv->hw->dma->stop_rx(priv->ioaddr);
1717 /* Clear the Rx/Tx descriptors */
1718 priv->hw->desc->init_rx_desc(priv->dma_rx, priv->dma_rx_size,
1719 dis_ic);
1720 priv->hw->desc->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
1721
1722 /* Enable Power down mode by programming the PMT regs */
1723 if (device_may_wakeup(priv->device))
1724 priv->hw->mac->pmt(priv->ioaddr, priv->wolopts);
1725 else
1726 stmmac_disable_mac(priv->ioaddr);
1727
1728 spin_unlock(&priv->lock);
1729 return 0;
1730 }
1731
1732 static int stmmac_resume(struct device *dev)
1733 {
1734 struct net_device *ndev = dev_get_drvdata(dev);
1735 struct stmmac_priv *priv = netdev_priv(ndev);
1736
1737 if (!netif_running(ndev))
1738 return 0;
1739
1740 spin_lock(&priv->lock);
1741
1742 /* Power Down bit, into the PM register, is cleared
1743 * automatically as soon as a magic packet or a Wake-up frame
1744 * is received. Anyway, it's better to manually clear
1745 * this bit because it can generate problems while resuming
1746 * from another devices (e.g. serial console). */
1747 if (device_may_wakeup(priv->device))
1748 priv->hw->mac->pmt(priv->ioaddr, 0);
1749
1750 netif_device_attach(ndev);
1751
1752 /* Enable the MAC and DMA */
1753 stmmac_enable_mac(priv->ioaddr);
1754 priv->hw->dma->start_tx(priv->ioaddr);
1755 priv->hw->dma->start_rx(priv->ioaddr);
1756
1757 #ifdef CONFIG_STMMAC_TIMER
1758 if (likely(priv->tm->enable))
1759 priv->tm->timer_start(tmrate);
1760 #endif
1761 napi_enable(&priv->napi);
1762
1763 if (priv->phydev)
1764 phy_start(priv->phydev);
1765
1766 netif_start_queue(ndev);
1767
1768 spin_unlock(&priv->lock);
1769 return 0;
1770 }
1771
1772 static int stmmac_freeze(struct device *dev)
1773 {
1774 struct net_device *ndev = dev_get_drvdata(dev);
1775
1776 if (!ndev || !netif_running(ndev))
1777 return 0;
1778
1779 return stmmac_release(ndev);
1780 }
1781
1782 static int stmmac_restore(struct device *dev)
1783 {
1784 struct net_device *ndev = dev_get_drvdata(dev);
1785
1786 if (!ndev || !netif_running(ndev))
1787 return 0;
1788
1789 return stmmac_open(ndev);
1790 }
1791
1792 static const struct dev_pm_ops stmmac_pm_ops = {
1793 .suspend = stmmac_suspend,
1794 .resume = stmmac_resume,
1795 .freeze = stmmac_freeze,
1796 .thaw = stmmac_restore,
1797 .restore = stmmac_restore,
1798 };
1799 #else
1800 static const struct dev_pm_ops stmmac_pm_ops;
1801 #endif /* CONFIG_PM */
1802
1803 static struct platform_driver stmmac_driver = {
1804 .probe = stmmac_dvr_probe,
1805 .remove = stmmac_dvr_remove,
1806 .driver = {
1807 .name = STMMAC_RESOURCE_NAME,
1808 .owner = THIS_MODULE,
1809 .pm = &stmmac_pm_ops,
1810 },
1811 };
1812
1813 /**
1814 * stmmac_init_module - Entry point for the driver
1815 * Description: This function is the entry point for the driver.
1816 */
1817 static int __init stmmac_init_module(void)
1818 {
1819 int ret;
1820
1821 ret = platform_driver_register(&stmmac_driver);
1822 return ret;
1823 }
1824
1825 /**
1826 * stmmac_cleanup_module - Cleanup routine for the driver
1827 * Description: This function is the cleanup routine for the driver.
1828 */
1829 static void __exit stmmac_cleanup_module(void)
1830 {
1831 platform_driver_unregister(&stmmac_driver);
1832 }
1833
1834 #ifndef MODULE
1835 static int __init stmmac_cmdline_opt(char *str)
1836 {
1837 char *opt;
1838
1839 if (!str || !*str)
1840 return -EINVAL;
1841 while ((opt = strsep(&str, ",")) != NULL) {
1842 if (!strncmp(opt, "debug:", 6)) {
1843 if (strict_strtoul(opt + 6, 0, (unsigned long *)&debug))
1844 goto err;
1845 } else if (!strncmp(opt, "phyaddr:", 8)) {
1846 if (strict_strtoul(opt + 8, 0,
1847 (unsigned long *)&phyaddr))
1848 goto err;
1849 } else if (!strncmp(opt, "dma_txsize:", 11)) {
1850 if (strict_strtoul(opt + 11, 0,
1851 (unsigned long *)&dma_txsize))
1852 goto err;
1853 } else if (!strncmp(opt, "dma_rxsize:", 11)) {
1854 if (strict_strtoul(opt + 11, 0,
1855 (unsigned long *)&dma_rxsize))
1856 goto err;
1857 } else if (!strncmp(opt, "buf_sz:", 7)) {
1858 if (strict_strtoul(opt + 7, 0,
1859 (unsigned long *)&buf_sz))
1860 goto err;
1861 } else if (!strncmp(opt, "tc:", 3)) {
1862 if (strict_strtoul(opt + 3, 0, (unsigned long *)&tc))
1863 goto err;
1864 } else if (!strncmp(opt, "watchdog:", 9)) {
1865 if (strict_strtoul(opt + 9, 0,
1866 (unsigned long *)&watchdog))
1867 goto err;
1868 } else if (!strncmp(opt, "flow_ctrl:", 10)) {
1869 if (strict_strtoul(opt + 10, 0,
1870 (unsigned long *)&flow_ctrl))
1871 goto err;
1872 } else if (!strncmp(opt, "pause:", 6)) {
1873 if (strict_strtoul(opt + 6, 0, (unsigned long *)&pause))
1874 goto err;
1875 #ifdef CONFIG_STMMAC_TIMER
1876 } else if (!strncmp(opt, "tmrate:", 7)) {
1877 if (strict_strtoul(opt + 7, 0,
1878 (unsigned long *)&tmrate))
1879 goto err;
1880 #endif
1881 }
1882 }
1883 return 0;
1884
1885 err:
1886 pr_err("%s: ERROR broken module parameter conversion", __func__);
1887 return -EINVAL;
1888 }
1889
1890 __setup("stmmaceth=", stmmac_cmdline_opt);
1891 #endif
1892
1893 module_init(stmmac_init_module);
1894 module_exit(stmmac_cleanup_module);
1895
1896 MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
1897 MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
1898 MODULE_LICENSE("GPL");
linux-next