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Merge remote-tracking branch 'moduleh/module.h-split'
[linux-2.6/next.git] / drivers / pcmcia / i82092.c
blob3e447d0387b7d358b2d3f88effdfad3757ac886c
1 /*
2 * Driver for Intel I82092AA PCI-PCMCIA bridge.
3 *
4 * (C) 2001 Red Hat, Inc.
5 *
6 * Author: Arjan Van De Ven <arjanv@redhat.com>
7 * Loosly based on i82365.c from the pcmcia-cs package
8 */
9
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/init.h>
14 #include <linux/workqueue.h>
15 #include <linux/interrupt.h>
16 #include <linux/device.h>
17
18 #include <pcmcia/ss.h>
19
20 #include <asm/system.h>
21 #include <asm/io.h>
22
23 #include "i82092aa.h"
24 #include "i82365.h"
25
26 MODULE_LICENSE("GPL");
27
28 /* PCI core routines */
29 static struct pci_device_id i82092aa_pci_ids[] = {
30 {
31 .vendor = PCI_VENDOR_ID_INTEL,
32 .device = PCI_DEVICE_ID_INTEL_82092AA_0,
33 .subvendor = PCI_ANY_ID,
34 .subdevice = PCI_ANY_ID,
35 },
36 {}
37 };
38 MODULE_DEVICE_TABLE(pci, i82092aa_pci_ids);
39
40 static struct pci_driver i82092aa_pci_driver = {
41 .name = "i82092aa",
42 .id_table = i82092aa_pci_ids,
43 .probe = i82092aa_pci_probe,
44 .remove = __devexit_p(i82092aa_pci_remove),
45 };
46
47
48 /* the pccard structure and its functions */
49 static struct pccard_operations i82092aa_operations = {
50 .init = i82092aa_init,
51 .get_status = i82092aa_get_status,
52 .set_socket = i82092aa_set_socket,
53 .set_io_map = i82092aa_set_io_map,
54 .set_mem_map = i82092aa_set_mem_map,
55 };
56
57 /* The card can do up to 4 sockets, allocate a structure for each of them */
58
59 struct socket_info {
60 int number;
61 int card_state; /* 0 = no socket,
62 1 = empty socket,
63 2 = card but not initialized,
64 3 = operational card */
65 unsigned int io_base; /* base io address of the socket */
66
67 struct pcmcia_socket socket;
68 struct pci_dev *dev; /* The PCI device for the socket */
69 };
70
71 #define MAX_SOCKETS 4
72 static struct socket_info sockets[MAX_SOCKETS];
73 static int socket_count; /* shortcut */
74
75
76 static int __devinit i82092aa_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
77 {
78 unsigned char configbyte;
79 int i, ret;
80
81 enter("i82092aa_pci_probe");
82
83 if ((ret = pci_enable_device(dev)))
84 return ret;
85
86 pci_read_config_byte(dev, 0x40, &configbyte); /* PCI Configuration Control */
87 switch(configbyte&6) {
88 case 0:
89 socket_count = 2;
90 break;
91 case 2:
92 socket_count = 1;
93 break;
94 case 4:
95 case 6:
96 socket_count = 4;
97 break;
98
99 default:
100 printk(KERN_ERR "i82092aa: Oops, you did something we didn't think of.\n");
101 ret = -EIO;
102 goto err_out_disable;
103 }
104 printk(KERN_INFO "i82092aa: configured as a %d socket device.\n", socket_count);
105
106 if (!request_region(pci_resource_start(dev, 0), 2, "i82092aa")) {
107 ret = -EBUSY;
108 goto err_out_disable;
109 }
110
111 for (i = 0;i<socket_count;i++) {
112 sockets[i].card_state = 1; /* 1 = present but empty */
113 sockets[i].io_base = pci_resource_start(dev, 0);
114 sockets[i].socket.features |= SS_CAP_PCCARD;
115 sockets[i].socket.map_size = 0x1000;
116 sockets[i].socket.irq_mask = 0;
117 sockets[i].socket.pci_irq = dev->irq;
118 sockets[i].socket.cb_dev = dev;
119 sockets[i].socket.owner = THIS_MODULE;
120
121 sockets[i].number = i;
122
123 if (card_present(i)) {
124 sockets[i].card_state = 3;
125 dprintk(KERN_DEBUG "i82092aa: slot %i is occupied\n",i);
126 } else {
127 dprintk(KERN_DEBUG "i82092aa: slot %i is vacant\n",i);
128 }
129 }
130
131 /* Now, specifiy that all interrupts are to be done as PCI interrupts */
132 configbyte = 0xFF; /* bitmask, one bit per event, 1 = PCI interrupt, 0 = ISA interrupt */
133 pci_write_config_byte(dev, 0x50, configbyte); /* PCI Interrupt Routing Register */
134
135 /* Register the interrupt handler */
136 dprintk(KERN_DEBUG "Requesting interrupt %i \n",dev->irq);
137 if ((ret = request_irq(dev->irq, i82092aa_interrupt, IRQF_SHARED, "i82092aa", i82092aa_interrupt))) {
138 printk(KERN_ERR "i82092aa: Failed to register IRQ %d, aborting\n", dev->irq);
139 goto err_out_free_res;
140 }
141
142 pci_set_drvdata(dev, &sockets[i].socket);
143
144 for (i = 0; i<socket_count; i++) {
145 sockets[i].socket.dev.parent = &dev->dev;
146 sockets[i].socket.ops = &i82092aa_operations;
147 sockets[i].socket.resource_ops = &pccard_nonstatic_ops;
148 ret = pcmcia_register_socket(&sockets[i].socket);
149 if (ret) {
150 goto err_out_free_sockets;
151 }
152 }
153
154 leave("i82092aa_pci_probe");
155 return 0;
156
157 err_out_free_sockets:
158 if (i) {
159 for (i--;i>=0;i--) {
160 pcmcia_unregister_socket(&sockets[i].socket);
161 }
162 }
163 free_irq(dev->irq, i82092aa_interrupt);
164 err_out_free_res:
165 release_region(pci_resource_start(dev, 0), 2);
166 err_out_disable:
167 pci_disable_device(dev);
168 return ret;
169 }
170
171 static void __devexit i82092aa_pci_remove(struct pci_dev *dev)
172 {
173 struct pcmcia_socket *socket = pci_get_drvdata(dev);
174
175 enter("i82092aa_pci_remove");
176
177 free_irq(dev->irq, i82092aa_interrupt);
178
179 if (socket)
180 pcmcia_unregister_socket(socket);
181
182 leave("i82092aa_pci_remove");
183 }
184
185 static DEFINE_SPINLOCK(port_lock);
186
187 /* basic value read/write functions */
188
189 static unsigned char indirect_read(int socket, unsigned short reg)
190 {
191 unsigned short int port;
192 unsigned char val;
193 unsigned long flags;
194 spin_lock_irqsave(&port_lock,flags);
195 reg += socket * 0x40;
196 port = sockets[socket].io_base;
197 outb(reg,port);
198 val = inb(port+1);
199 spin_unlock_irqrestore(&port_lock,flags);
200 return val;
201 }
202
203 #if 0
204 static unsigned short indirect_read16(int socket, unsigned short reg)
205 {
206 unsigned short int port;
207 unsigned short tmp;
208 unsigned long flags;
209 spin_lock_irqsave(&port_lock,flags);
210 reg = reg + socket * 0x40;
211 port = sockets[socket].io_base;
212 outb(reg,port);
213 tmp = inb(port+1);
214 reg++;
215 outb(reg,port);
216 tmp = tmp | (inb(port+1)<<8);
217 spin_unlock_irqrestore(&port_lock,flags);
218 return tmp;
219 }
220 #endif
221
222 static void indirect_write(int socket, unsigned short reg, unsigned char value)
223 {
224 unsigned short int port;
225 unsigned long flags;
226 spin_lock_irqsave(&port_lock,flags);
227 reg = reg + socket * 0x40;
228 port = sockets[socket].io_base;
229 outb(reg,port);
230 outb(value,port+1);
231 spin_unlock_irqrestore(&port_lock,flags);
232 }
233
234 static void indirect_setbit(int socket, unsigned short reg, unsigned char mask)
235 {
236 unsigned short int port;
237 unsigned char val;
238 unsigned long flags;
239 spin_lock_irqsave(&port_lock,flags);
240 reg = reg + socket * 0x40;
241 port = sockets[socket].io_base;
242 outb(reg,port);
243 val = inb(port+1);
244 val |= mask;
245 outb(reg,port);
246 outb(val,port+1);
247 spin_unlock_irqrestore(&port_lock,flags);
248 }
249
250
251 static void indirect_resetbit(int socket, unsigned short reg, unsigned char mask)
252 {
253 unsigned short int port;
254 unsigned char val;
255 unsigned long flags;
256 spin_lock_irqsave(&port_lock,flags);
257 reg = reg + socket * 0x40;
258 port = sockets[socket].io_base;
259 outb(reg,port);
260 val = inb(port+1);
261 val &= ~mask;
262 outb(reg,port);
263 outb(val,port+1);
264 spin_unlock_irqrestore(&port_lock,flags);
265 }
266
267 static void indirect_write16(int socket, unsigned short reg, unsigned short value)
268 {
269 unsigned short int port;
270 unsigned char val;
271 unsigned long flags;
272 spin_lock_irqsave(&port_lock,flags);
273 reg = reg + socket * 0x40;
274 port = sockets[socket].io_base;
275
276 outb(reg,port);
277 val = value & 255;
278 outb(val,port+1);
279
280 reg++;
281
282 outb(reg,port);
283 val = value>>8;
284 outb(val,port+1);
285 spin_unlock_irqrestore(&port_lock,flags);
286 }
287
288 /* simple helper functions */
289 /* External clock time, in nanoseconds. 120 ns = 8.33 MHz */
290 static int cycle_time = 120;
291
292 static int to_cycles(int ns)
293 {
294 if (cycle_time!=0)
295 return ns/cycle_time;
296 else
297 return 0;
298 }
299
300
301 /* Interrupt handler functionality */
302
303 static irqreturn_t i82092aa_interrupt(int irq, void *dev)
304 {
305 int i;
306 int loopcount = 0;
307 int handled = 0;
308
309 unsigned int events, active=0;
310
311 /* enter("i82092aa_interrupt");*/
312
313 while (1) {
314 loopcount++;
315 if (loopcount>20) {
316 printk(KERN_ERR "i82092aa: infinite eventloop in interrupt \n");
317 break;
318 }
319
320 active = 0;
321
322 for (i=0;i<socket_count;i++) {
323 int csc;
324 if (sockets[i].card_state==0) /* Inactive socket, should not happen */
325 continue;
326
327 csc = indirect_read(i,I365_CSC); /* card status change register */
328
329 if (csc==0) /* no events on this socket */
330 continue;
331 handled = 1;
332 events = 0;
333
334 if (csc & I365_CSC_DETECT) {
335 events |= SS_DETECT;
336 printk("Card detected in socket %i!\n",i);
337 }
338
339 if (indirect_read(i,I365_INTCTL) & I365_PC_IOCARD) {
340 /* For IO/CARDS, bit 0 means "read the card" */
341 events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;
342 } else {
343 /* Check for battery/ready events */
344 events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;
345 events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;
346 events |= (csc & I365_CSC_READY) ? SS_READY : 0;
347 }
348
349 if (events) {
350 pcmcia_parse_events(&sockets[i].socket, events);
351 }
352 active |= events;
353 }
354
355 if (active==0) /* no more events to handle */
356 break;
357
358 }
359 return IRQ_RETVAL(handled);
360 /* leave("i82092aa_interrupt");*/
361 }
362
363
364
365 /* socket functions */
366
367 static int card_present(int socketno)
368 {
369 unsigned int val;
370 enter("card_present");
371
372 if ((socketno<0) || (socketno >= MAX_SOCKETS))
373 return 0;
374 if (sockets[socketno].io_base == 0)
375 return 0;
376
377
378 val = indirect_read(socketno, 1); /* Interface status register */
379 if ((val&12)==12) {
380 leave("card_present 1");
381 return 1;
382 }
383
384 leave("card_present 0");
385 return 0;
386 }
387
388 static void set_bridge_state(int sock)
389 {
390 enter("set_bridge_state");
391 indirect_write(sock, I365_GBLCTL,0x00);
392 indirect_write(sock, I365_GENCTL,0x00);
393
394 indirect_setbit(sock, I365_INTCTL,0x08);
395 leave("set_bridge_state");
396 }
397
398
399
400
401
402
403 static int i82092aa_init(struct pcmcia_socket *sock)
404 {
405 int i;
406 struct resource res = { .start = 0, .end = 0x0fff };
407 pccard_io_map io = { 0, 0, 0, 0, 1 };
408 pccard_mem_map mem = { .res = &res, };
409
410 enter("i82092aa_init");
411
412 for (i = 0; i < 2; i++) {
413 io.map = i;
414 i82092aa_set_io_map(sock, &io);
415 }
416 for (i = 0; i < 5; i++) {
417 mem.map = i;
418 i82092aa_set_mem_map(sock, &mem);
419 }
420
421 leave("i82092aa_init");
422 return 0;
423 }
424
425 static int i82092aa_get_status(struct pcmcia_socket *socket, u_int *value)
426 {
427 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
428 unsigned int status;
429
430 enter("i82092aa_get_status");
431
432 status = indirect_read(sock,I365_STATUS); /* Interface Status Register */
433 *value = 0;
434
435 if ((status & I365_CS_DETECT) == I365_CS_DETECT) {
436 *value |= SS_DETECT;
437 }
438
439 /* IO cards have a different meaning of bits 0,1 */
440 /* Also notice the inverse-logic on the bits */
441 if (indirect_read(sock, I365_INTCTL) & I365_PC_IOCARD) {
442 /* IO card */
443 if (!(status & I365_CS_STSCHG))
444 *value |= SS_STSCHG;
445 } else { /* non I/O card */
446 if (!(status & I365_CS_BVD1))
447 *value |= SS_BATDEAD;
448 if (!(status & I365_CS_BVD2))
449 *value |= SS_BATWARN;
450
451 }
452
453 if (status & I365_CS_WRPROT)
454 (*value) |= SS_WRPROT; /* card is write protected */
455
456 if (status & I365_CS_READY)
457 (*value) |= SS_READY; /* card is not busy */
458
459 if (status & I365_CS_POWERON)
460 (*value) |= SS_POWERON; /* power is applied to the card */
461
462
463 leave("i82092aa_get_status");
464 return 0;
465 }
466
467
468 static int i82092aa_set_socket(struct pcmcia_socket *socket, socket_state_t *state)
469 {
470 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
471 unsigned char reg;
472
473 enter("i82092aa_set_socket");
474
475 /* First, set the global controller options */
476
477 set_bridge_state(sock);
478
479 /* Values for the IGENC register */
480
481 reg = 0;
482 if (!(state->flags & SS_RESET)) /* The reset bit has "inverse" logic */
483 reg = reg | I365_PC_RESET;
484 if (state->flags & SS_IOCARD)
485 reg = reg | I365_PC_IOCARD;
486
487 indirect_write(sock,I365_INTCTL,reg); /* IGENC, Interrupt and General Control Register */
488
489 /* Power registers */
490
491 reg = I365_PWR_NORESET; /* default: disable resetdrv on resume */
492
493 if (state->flags & SS_PWR_AUTO) {
494 printk("Auto power\n");
495 reg |= I365_PWR_AUTO; /* automatic power mngmnt */
496 }
497 if (state->flags & SS_OUTPUT_ENA) {
498 printk("Power Enabled \n");
499 reg |= I365_PWR_OUT; /* enable power */
500 }
501
502 switch (state->Vcc) {
503 case 0:
504 break;
505 case 50:
506 printk("setting voltage to Vcc to 5V on socket %i\n",sock);
507 reg |= I365_VCC_5V;
508 break;
509 default:
510 printk("i82092aa: i82092aa_set_socket called with invalid VCC power value: %i ", state->Vcc);
511 leave("i82092aa_set_socket");
512 return -EINVAL;
513 }
514
515
516 switch (state->Vpp) {
517 case 0:
518 printk("not setting Vpp on socket %i\n",sock);
519 break;
520 case 50:
521 printk("setting Vpp to 5.0 for socket %i\n",sock);
522 reg |= I365_VPP1_5V | I365_VPP2_5V;
523 break;
524 case 120:
525 printk("setting Vpp to 12.0\n");
526 reg |= I365_VPP1_12V | I365_VPP2_12V;
527 break;
528 default:
529 printk("i82092aa: i82092aa_set_socket called with invalid VPP power value: %i ", state->Vcc);
530 leave("i82092aa_set_socket");
531 return -EINVAL;
532 }
533
534 if (reg != indirect_read(sock,I365_POWER)) /* only write if changed */
535 indirect_write(sock,I365_POWER,reg);
536
537 /* Enable specific interrupt events */
538
539 reg = 0x00;
540 if (state->csc_mask & SS_DETECT) {
541 reg |= I365_CSC_DETECT;
542 }
543 if (state->flags & SS_IOCARD) {
544 if (state->csc_mask & SS_STSCHG)
545 reg |= I365_CSC_STSCHG;
546 } else {
547 if (state->csc_mask & SS_BATDEAD)
548 reg |= I365_CSC_BVD1;
549 if (state->csc_mask & SS_BATWARN)
550 reg |= I365_CSC_BVD2;
551 if (state->csc_mask & SS_READY)
552 reg |= I365_CSC_READY;
553
554 }
555
556 /* now write the value and clear the (probably bogus) pending stuff by doing a dummy read*/
557
558 indirect_write(sock,I365_CSCINT,reg);
559 (void)indirect_read(sock,I365_CSC);
560
561 leave("i82092aa_set_socket");
562 return 0;
563 }
564
565 static int i82092aa_set_io_map(struct pcmcia_socket *socket, struct pccard_io_map *io)
566 {
567 unsigned int sock = container_of(socket, struct socket_info, socket)->number;
568 unsigned char map, ioctl;
569
570 enter("i82092aa_set_io_map");
571
572 map = io->map;
573
574 /* Check error conditions */
575 if (map > 1) {
576 leave("i82092aa_set_io_map with invalid map");
577 return -EINVAL;
578 }
579 if ((io->start > 0xffff) || (io->stop > 0xffff) || (io->stop < io->start)){
580 leave("i82092aa_set_io_map with invalid io");
581 return -EINVAL;
582 }
583
584 /* Turn off the window before changing anything */
585 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_IO(map))
586 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_IO(map));
587
588 /* printk("set_io_map: Setting range to %x - %x \n",io->start,io->stop); */
589
590 /* write the new values */
591 indirect_write16(sock,I365_IO(map)+I365_W_START,io->start);
592 indirect_write16(sock,I365_IO(map)+I365_W_STOP,io->stop);
593
594 ioctl = indirect_read(sock,I365_IOCTL) & ~I365_IOCTL_MASK(map);
595
596 if (io->flags & (MAP_16BIT|MAP_AUTOSZ))
597 ioctl |= I365_IOCTL_16BIT(map);
598
599 indirect_write(sock,I365_IOCTL,ioctl);
600
601 /* Turn the window back on if needed */
602 if (io->flags & MAP_ACTIVE)
603 indirect_setbit(sock,I365_ADDRWIN,I365_ENA_IO(map));
604
605 leave("i82092aa_set_io_map");
606 return 0;
607 }
608
609 static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_map *mem)
610 {
611 struct socket_info *sock_info = container_of(socket, struct socket_info, socket);
612 unsigned int sock = sock_info->number;
613 struct pci_bus_region region;
614 unsigned short base, i;
615 unsigned char map;
616
617 enter("i82092aa_set_mem_map");
618
619 pcibios_resource_to_bus(sock_info->dev, &region, mem->res);
620
621 map = mem->map;
622 if (map > 4) {
623 leave("i82092aa_set_mem_map: invalid map");
624 return -EINVAL;
625 }
626
627
628 if ( (mem->card_start > 0x3ffffff) || (region.start > region.end) ||
629 (mem->speed > 1000) ) {
630 leave("i82092aa_set_mem_map: invalid address / speed");
631 printk("invalid mem map for socket %i: %llx to %llx with a "
632 "start of %x\n",
633 sock,
634 (unsigned long long)region.start,
635 (unsigned long long)region.end,
636 mem->card_start);
637 return -EINVAL;
638 }
639
640 /* Turn off the window before changing anything */
641 if (indirect_read(sock, I365_ADDRWIN) & I365_ENA_MEM(map))
642 indirect_resetbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
643
644
645 /* printk("set_mem_map: Setting map %i range to %x - %x on socket %i, speed is %i, active = %i \n",map, region.start,region.end,sock,mem->speed,mem->flags & MAP_ACTIVE); */
646
647 /* write the start address */
648 base = I365_MEM(map);
649 i = (region.start >> 12) & 0x0fff;
650 if (mem->flags & MAP_16BIT)
651 i |= I365_MEM_16BIT;
652 if (mem->flags & MAP_0WS)
653 i |= I365_MEM_0WS;
654 indirect_write16(sock,base+I365_W_START,i);
655
656 /* write the stop address */
657
658 i= (region.end >> 12) & 0x0fff;
659 switch (to_cycles(mem->speed)) {
660 case 0:
661 break;
662 case 1:
663 i |= I365_MEM_WS0;
664 break;
665 case 2:
666 i |= I365_MEM_WS1;
667 break;
668 default:
669 i |= I365_MEM_WS1 | I365_MEM_WS0;
670 break;
671 }
672
673 indirect_write16(sock,base+I365_W_STOP,i);
674
675 /* card start */
676
677 i = ((mem->card_start - region.start) >> 12) & 0x3fff;
678 if (mem->flags & MAP_WRPROT)
679 i |= I365_MEM_WRPROT;
680 if (mem->flags & MAP_ATTRIB) {
681 /* printk("requesting attribute memory for socket %i\n",sock);*/
682 i |= I365_MEM_REG;
683 } else {
684 /* printk("requesting normal memory for socket %i\n",sock);*/
685 }
686 indirect_write16(sock,base+I365_W_OFF,i);
687
688 /* Enable the window if necessary */
689 if (mem->flags & MAP_ACTIVE)
690 indirect_setbit(sock, I365_ADDRWIN, I365_ENA_MEM(map));
691
692 leave("i82092aa_set_mem_map");
693 return 0;
694 }
695
696 static int i82092aa_module_init(void)
697 {
698 return pci_register_driver(&i82092aa_pci_driver);
699 }
700
701 static void i82092aa_module_exit(void)
702 {
703 enter("i82092aa_module_exit");
704 pci_unregister_driver(&i82092aa_pci_driver);
705 if (sockets[0].io_base>0)
706 release_region(sockets[0].io_base, 2);
707 leave("i82092aa_module_exit");
708 }
709
710 module_init(i82092aa_module_init);
711 module_exit(i82092aa_module_exit);
712
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