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Merge remote-tracking branch 'moduleh/module.h-split'
[linux-2.6/next.git] / drivers / tty / serial / bfin_uart.c
blobc7e592df42c06fa68b13e0477c9757751cfe9c2b
1 /*
2 * Blackfin On-Chip Serial Driver
3 *
4 * Copyright 2006-2010 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
12 #define SUPPORT_SYSRQ
13 #endif
14
15 #define DRIVER_NAME "bfin-uart"
16 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
17
18 #include <linux/module.h>
19 #include <linux/ioport.h>
20 #include <linux/gfp.h>
21 #include <linux/io.h>
22 #include <linux/init.h>
23 #include <linux/console.h>
24 #include <linux/sysrq.h>
25 #include <linux/platform_device.h>
26 #include <linux/tty.h>
27 #include <linux/tty_flip.h>
28 #include <linux/serial_core.h>
29 #include <linux/gpio.h>
30 #include <linux/irq.h>
31 #include <linux/kgdb.h>
32 #include <linux/slab.h>
33 #include <linux/dma-mapping.h>
34
35 #include <asm/portmux.h>
36 #include <asm/cacheflush.h>
37 #include <asm/dma.h>
38
39 #define port_membase(uart) (((struct bfin_serial_port *)(uart))->port.membase)
40 #define get_lsr_cache(uart) (((struct bfin_serial_port *)(uart))->lsr)
41 #define put_lsr_cache(uart, v) (((struct bfin_serial_port *)(uart))->lsr = (v))
42 #include <asm/bfin_serial.h>
43
44 #ifdef CONFIG_SERIAL_BFIN_MODULE
45 # undef CONFIG_EARLY_PRINTK
46 #endif
47
48 #ifdef CONFIG_SERIAL_BFIN_MODULE
49 # undef CONFIG_EARLY_PRINTK
50 #endif
51
52 /* UART name and device definitions */
53 #define BFIN_SERIAL_DEV_NAME "ttyBF"
54 #define BFIN_SERIAL_MAJOR 204
55 #define BFIN_SERIAL_MINOR 64
56
57 static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
58
59 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
60 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
61
62 # ifndef CONFIG_SERIAL_BFIN_PIO
63 # error KGDB only support UART in PIO mode.
64 # endif
65
66 static int kgdboc_port_line;
67 static int kgdboc_break_enabled;
68 #endif
69 /*
70 * Setup for console. Argument comes from the menuconfig
71 */
72 #define DMA_RX_XCOUNT 512
73 #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
74
75 #define DMA_RX_FLUSH_JIFFIES (HZ / 50)
76
77 #ifdef CONFIG_SERIAL_BFIN_DMA
78 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
79 #else
80 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
81 #endif
82
83 static void bfin_serial_reset_irda(struct uart_port *port);
84
85 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
86 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
87 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
88 {
89 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
90 if (uart->cts_pin < 0)
91 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
92
93 /* CTS PIN is negative assertive. */
94 if (UART_GET_CTS(uart))
95 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
96 else
97 return TIOCM_DSR | TIOCM_CAR;
98 }
99
100 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
101 {
102 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
103 if (uart->rts_pin < 0)
104 return;
105
106 /* RTS PIN is negative assertive. */
107 if (mctrl & TIOCM_RTS)
108 UART_ENABLE_RTS(uart);
109 else
110 UART_DISABLE_RTS(uart);
111 }
112
113 /*
114 * Handle any change of modem status signal.
115 */
116 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
117 {
118 struct bfin_serial_port *uart = dev_id;
119 unsigned int status;
120
121 status = bfin_serial_get_mctrl(&uart->port);
122 uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
123 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
124 uart->scts = 1;
125 UART_CLEAR_SCTS(uart);
126 UART_CLEAR_IER(uart, EDSSI);
127 #endif
128
129 return IRQ_HANDLED;
130 }
131 #else
132 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
133 {
134 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
135 }
136
137 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
138 {
139 }
140 #endif
141
142 /*
143 * interrupts are disabled on entry
144 */
145 static void bfin_serial_stop_tx(struct uart_port *port)
146 {
147 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
148 #ifdef CONFIG_SERIAL_BFIN_DMA
149 struct circ_buf *xmit = &uart->port.state->xmit;
150 #endif
151
152 while (!(UART_GET_LSR(uart) & TEMT))
153 cpu_relax();
154
155 #ifdef CONFIG_SERIAL_BFIN_DMA
156 disable_dma(uart->tx_dma_channel);
157 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
158 uart->port.icount.tx += uart->tx_count;
159 uart->tx_count = 0;
160 uart->tx_done = 1;
161 #else
162 #ifdef CONFIG_BF54x
163 /* Clear TFI bit */
164 UART_PUT_LSR(uart, TFI);
165 #endif
166 UART_CLEAR_IER(uart, ETBEI);
167 #endif
168 }
169
170 /*
171 * port is locked and interrupts are disabled
172 */
173 static void bfin_serial_start_tx(struct uart_port *port)
174 {
175 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
176 struct tty_struct *tty = uart->port.state->port.tty;
177
178 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
179 if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
180 uart->scts = 0;
181 uart_handle_cts_change(&uart->port, uart->scts);
182 }
183 #endif
184
185 /*
186 * To avoid losting RX interrupt, we reset IR function
187 * before sending data.
188 */
189 if (tty->termios->c_line == N_IRDA)
190 bfin_serial_reset_irda(port);
191
192 #ifdef CONFIG_SERIAL_BFIN_DMA
193 if (uart->tx_done)
194 bfin_serial_dma_tx_chars(uart);
195 #else
196 UART_SET_IER(uart, ETBEI);
197 bfin_serial_tx_chars(uart);
198 #endif
199 }
200
201 /*
202 * Interrupts are enabled
203 */
204 static void bfin_serial_stop_rx(struct uart_port *port)
205 {
206 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
207
208 UART_CLEAR_IER(uart, ERBFI);
209 }
210
211 /*
212 * Set the modem control timer to fire immediately.
213 */
214 static void bfin_serial_enable_ms(struct uart_port *port)
215 {
216 }
217
218
219 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
220 # define UART_GET_ANOMALY_THRESHOLD(uart) ((uart)->anomaly_threshold)
221 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
222 #else
223 # define UART_GET_ANOMALY_THRESHOLD(uart) 0
224 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
225 #endif
226
227 #ifdef CONFIG_SERIAL_BFIN_PIO
228 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
229 {
230 struct tty_struct *tty = NULL;
231 unsigned int status, ch, flg;
232 static struct timeval anomaly_start = { .tv_sec = 0 };
233
234 status = UART_GET_LSR(uart);
235 UART_CLEAR_LSR(uart);
236
237 ch = UART_GET_CHAR(uart);
238 uart->port.icount.rx++;
239
240 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
241 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
242 if (kgdb_connected && kgdboc_port_line == uart->port.line
243 && kgdboc_break_enabled)
244 if (ch == 0x3) {/* Ctrl + C */
245 kgdb_breakpoint();
246 return;
247 }
248
249 if (!uart->port.state || !uart->port.state->port.tty)
250 return;
251 #endif
252 tty = uart->port.state->port.tty;
253
254 if (ANOMALY_05000363) {
255 /* The BF533 (and BF561) family of processors have a nice anomaly
256 * where they continuously generate characters for a "single" break.
257 * We have to basically ignore this flood until the "next" valid
258 * character comes across. Due to the nature of the flood, it is
259 * not possible to reliably catch bytes that are sent too quickly
260 * after this break. So application code talking to the Blackfin
261 * which sends a break signal must allow at least 1.5 character
262 * times after the end of the break for things to stabilize. This
263 * timeout was picked as it must absolutely be larger than 1
264 * character time +/- some percent. So 1.5 sounds good. All other
265 * Blackfin families operate properly. Woo.
266 */
267 if (anomaly_start.tv_sec) {
268 struct timeval curr;
269 suseconds_t usecs;
270
271 if ((~ch & (~ch + 1)) & 0xff)
272 goto known_good_char;
273
274 do_gettimeofday(&curr);
275 if (curr.tv_sec - anomaly_start.tv_sec > 1)
276 goto known_good_char;
277
278 usecs = 0;
279 if (curr.tv_sec != anomaly_start.tv_sec)
280 usecs += USEC_PER_SEC;
281 usecs += curr.tv_usec - anomaly_start.tv_usec;
282
283 if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
284 goto known_good_char;
285
286 if (ch)
287 anomaly_start.tv_sec = 0;
288 else
289 anomaly_start = curr;
290
291 return;
292
293 known_good_char:
294 status &= ~BI;
295 anomaly_start.tv_sec = 0;
296 }
297 }
298
299 if (status & BI) {
300 if (ANOMALY_05000363)
301 if (bfin_revid() < 5)
302 do_gettimeofday(&anomaly_start);
303 uart->port.icount.brk++;
304 if (uart_handle_break(&uart->port))
305 goto ignore_char;
306 status &= ~(PE | FE);
307 }
308 if (status & PE)
309 uart->port.icount.parity++;
310 if (status & OE)
311 uart->port.icount.overrun++;
312 if (status & FE)
313 uart->port.icount.frame++;
314
315 status &= uart->port.read_status_mask;
316
317 if (status & BI)
318 flg = TTY_BREAK;
319 else if (status & PE)
320 flg = TTY_PARITY;
321 else if (status & FE)
322 flg = TTY_FRAME;
323 else
324 flg = TTY_NORMAL;
325
326 if (uart_handle_sysrq_char(&uart->port, ch))
327 goto ignore_char;
328
329 uart_insert_char(&uart->port, status, OE, ch, flg);
330
331 ignore_char:
332 tty_flip_buffer_push(tty);
333 }
334
335 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
336 {
337 struct circ_buf *xmit = &uart->port.state->xmit;
338
339 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
340 #ifdef CONFIG_BF54x
341 /* Clear TFI bit */
342 UART_PUT_LSR(uart, TFI);
343 #endif
344 /* Anomaly notes:
345 * 05000215 - we always clear ETBEI within last UART TX
346 * interrupt to end a string. It is always set
347 * when start a new tx.
348 */
349 UART_CLEAR_IER(uart, ETBEI);
350 return;
351 }
352
353 if (uart->port.x_char) {
354 UART_PUT_CHAR(uart, uart->port.x_char);
355 uart->port.icount.tx++;
356 uart->port.x_char = 0;
357 }
358
359 while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
360 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
361 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
362 uart->port.icount.tx++;
363 }
364
365 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
366 uart_write_wakeup(&uart->port);
367 }
368
369 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
370 {
371 struct bfin_serial_port *uart = dev_id;
372
373 while (UART_GET_LSR(uart) & DR)
374 bfin_serial_rx_chars(uart);
375
376 return IRQ_HANDLED;
377 }
378
379 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
380 {
381 struct bfin_serial_port *uart = dev_id;
382
383 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
384 if (uart->scts && !(bfin_serial_get_mctrl(&uart->port) & TIOCM_CTS)) {
385 uart->scts = 0;
386 uart_handle_cts_change(&uart->port, uart->scts);
387 }
388 #endif
389 spin_lock(&uart->port.lock);
390 if (UART_GET_LSR(uart) & THRE)
391 bfin_serial_tx_chars(uart);
392 spin_unlock(&uart->port.lock);
393
394 return IRQ_HANDLED;
395 }
396 #endif
397
398 #ifdef CONFIG_SERIAL_BFIN_DMA
399 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
400 {
401 struct circ_buf *xmit = &uart->port.state->xmit;
402
403 uart->tx_done = 0;
404
405 if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
406 uart->tx_count = 0;
407 uart->tx_done = 1;
408 return;
409 }
410
411 if (uart->port.x_char) {
412 UART_PUT_CHAR(uart, uart->port.x_char);
413 uart->port.icount.tx++;
414 uart->port.x_char = 0;
415 }
416
417 uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
418 if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
419 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
420 blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
421 (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
422 set_dma_config(uart->tx_dma_channel,
423 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
424 INTR_ON_BUF,
425 DIMENSION_LINEAR,
426 DATA_SIZE_8,
427 DMA_SYNC_RESTART));
428 set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
429 set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
430 set_dma_x_modify(uart->tx_dma_channel, 1);
431 SSYNC();
432 enable_dma(uart->tx_dma_channel);
433
434 UART_SET_IER(uart, ETBEI);
435 }
436
437 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
438 {
439 struct tty_struct *tty = uart->port.state->port.tty;
440 int i, flg, status;
441
442 status = UART_GET_LSR(uart);
443 UART_CLEAR_LSR(uart);
444
445 uart->port.icount.rx +=
446 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
447 UART_XMIT_SIZE);
448
449 if (status & BI) {
450 uart->port.icount.brk++;
451 if (uart_handle_break(&uart->port))
452 goto dma_ignore_char;
453 status &= ~(PE | FE);
454 }
455 if (status & PE)
456 uart->port.icount.parity++;
457 if (status & OE)
458 uart->port.icount.overrun++;
459 if (status & FE)
460 uart->port.icount.frame++;
461
462 status &= uart->port.read_status_mask;
463
464 if (status & BI)
465 flg = TTY_BREAK;
466 else if (status & PE)
467 flg = TTY_PARITY;
468 else if (status & FE)
469 flg = TTY_FRAME;
470 else
471 flg = TTY_NORMAL;
472
473 for (i = uart->rx_dma_buf.tail; ; i++) {
474 if (i >= UART_XMIT_SIZE)
475 i = 0;
476 if (i == uart->rx_dma_buf.head)
477 break;
478 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
479 uart_insert_char(&uart->port, status, OE,
480 uart->rx_dma_buf.buf[i], flg);
481 }
482
483 dma_ignore_char:
484 tty_flip_buffer_push(tty);
485 }
486
487 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
488 {
489 int x_pos, pos;
490
491 dma_disable_irq_nosync(uart->rx_dma_channel);
492 spin_lock_bh(&uart->rx_lock);
493
494 /* 2D DMA RX buffer ring is used. Because curr_y_count and
495 * curr_x_count can't be read as an atomic operation,
496 * curr_y_count should be read before curr_x_count. When
497 * curr_x_count is read, curr_y_count may already indicate
498 * next buffer line. But, the position calculated here is
499 * still indicate the old line. The wrong position data may
500 * be smaller than current buffer tail, which cause garbages
501 * are received if it is not prohibit.
502 */
503 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
504 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
505 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
506 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
507 uart->rx_dma_nrows = 0;
508 x_pos = DMA_RX_XCOUNT - x_pos;
509 if (x_pos == DMA_RX_XCOUNT)
510 x_pos = 0;
511
512 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
513 /* Ignore receiving data if new position is in the same line of
514 * current buffer tail and small.
515 */
516 if (pos > uart->rx_dma_buf.tail ||
517 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
518 uart->rx_dma_buf.head = pos;
519 bfin_serial_dma_rx_chars(uart);
520 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
521 }
522
523 spin_unlock_bh(&uart->rx_lock);
524 dma_enable_irq(uart->rx_dma_channel);
525
526 mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
527 }
528
529 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
530 {
531 struct bfin_serial_port *uart = dev_id;
532 struct circ_buf *xmit = &uart->port.state->xmit;
533
534 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
535 if (uart->scts && !(bfin_serial_get_mctrl(&uart->port)&TIOCM_CTS)) {
536 uart->scts = 0;
537 uart_handle_cts_change(&uart->port, uart->scts);
538 }
539 #endif
540
541 spin_lock(&uart->port.lock);
542 if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
543 disable_dma(uart->tx_dma_channel);
544 clear_dma_irqstat(uart->tx_dma_channel);
545 /* Anomaly notes:
546 * 05000215 - we always clear ETBEI within last UART TX
547 * interrupt to end a string. It is always set
548 * when start a new tx.
549 */
550 UART_CLEAR_IER(uart, ETBEI);
551 xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
552 uart->port.icount.tx += uart->tx_count;
553
554 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
555 uart_write_wakeup(&uart->port);
556
557 bfin_serial_dma_tx_chars(uart);
558 }
559
560 spin_unlock(&uart->port.lock);
561 return IRQ_HANDLED;
562 }
563
564 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
565 {
566 struct bfin_serial_port *uart = dev_id;
567 unsigned short irqstat;
568 int x_pos, pos;
569
570 spin_lock(&uart->rx_lock);
571 irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
572 clear_dma_irqstat(uart->rx_dma_channel);
573
574 uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
575 x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
576 uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
577 if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
578 uart->rx_dma_nrows = 0;
579
580 pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
581 if (pos > uart->rx_dma_buf.tail ||
582 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
583 uart->rx_dma_buf.head = pos;
584 bfin_serial_dma_rx_chars(uart);
585 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
586 }
587
588 spin_unlock(&uart->rx_lock);
589
590 return IRQ_HANDLED;
591 }
592 #endif
593
594 /*
595 * Return TIOCSER_TEMT when transmitter is not busy.
596 */
597 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
598 {
599 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
600 unsigned short lsr;
601
602 lsr = UART_GET_LSR(uart);
603 if (lsr & TEMT)
604 return TIOCSER_TEMT;
605 else
606 return 0;
607 }
608
609 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
610 {
611 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
612 u16 lcr = UART_GET_LCR(uart);
613 if (break_state)
614 lcr |= SB;
615 else
616 lcr &= ~SB;
617 UART_PUT_LCR(uart, lcr);
618 SSYNC();
619 }
620
621 static int bfin_serial_startup(struct uart_port *port)
622 {
623 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
624
625 #ifdef CONFIG_SERIAL_BFIN_DMA
626 dma_addr_t dma_handle;
627
628 if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
629 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
630 return -EBUSY;
631 }
632
633 if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
634 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
635 free_dma(uart->rx_dma_channel);
636 return -EBUSY;
637 }
638
639 set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
640 set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
641
642 uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
643 uart->rx_dma_buf.head = 0;
644 uart->rx_dma_buf.tail = 0;
645 uart->rx_dma_nrows = 0;
646
647 set_dma_config(uart->rx_dma_channel,
648 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
649 INTR_ON_ROW, DIMENSION_2D,
650 DATA_SIZE_8,
651 DMA_SYNC_RESTART));
652 set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
653 set_dma_x_modify(uart->rx_dma_channel, 1);
654 set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
655 set_dma_y_modify(uart->rx_dma_channel, 1);
656 set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
657 enable_dma(uart->rx_dma_channel);
658
659 uart->rx_dma_timer.data = (unsigned long)(uart);
660 uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
661 uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
662 add_timer(&(uart->rx_dma_timer));
663 #else
664 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
665 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
666 if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
667 kgdboc_break_enabled = 0;
668 else {
669 # endif
670 if (request_irq(uart->rx_irq, bfin_serial_rx_int, IRQF_DISABLED,
671 "BFIN_UART_RX", uart)) {
672 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
673 return -EBUSY;
674 }
675
676 if (request_irq
677 (uart->tx_irq, bfin_serial_tx_int, IRQF_DISABLED,
678 "BFIN_UART_TX", uart)) {
679 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
680 free_irq(uart->rx_irq, uart);
681 return -EBUSY;
682 }
683
684 # ifdef CONFIG_BF54x
685 {
686 /*
687 * UART2 and UART3 on BF548 share interrupt PINs and DMA
688 * controllers with SPORT2 and SPORT3. UART rx and tx
689 * interrupts are generated in PIO mode only when configure
690 * their peripheral mapping registers properly, which means
691 * request corresponding DMA channels in PIO mode as well.
692 */
693 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
694
695 switch (uart->rx_irq) {
696 case IRQ_UART3_RX:
697 uart_dma_ch_rx = CH_UART3_RX;
698 uart_dma_ch_tx = CH_UART3_TX;
699 break;
700 case IRQ_UART2_RX:
701 uart_dma_ch_rx = CH_UART2_RX;
702 uart_dma_ch_tx = CH_UART2_TX;
703 break;
704 default:
705 uart_dma_ch_rx = uart_dma_ch_tx = 0;
706 break;
707 };
708
709 if (uart_dma_ch_rx &&
710 request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
711 printk(KERN_NOTICE"Fail to attach UART interrupt\n");
712 free_irq(uart->rx_irq, uart);
713 free_irq(uart->tx_irq, uart);
714 return -EBUSY;
715 }
716 if (uart_dma_ch_tx &&
717 request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
718 printk(KERN_NOTICE "Fail to attach UART interrupt\n");
719 free_dma(uart_dma_ch_rx);
720 free_irq(uart->rx_irq, uart);
721 free_irq(uart->tx_irq, uart);
722 return -EBUSY;
723 }
724 }
725 # endif
726 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
727 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
728 }
729 # endif
730 #endif
731
732 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
733 if (uart->cts_pin >= 0) {
734 if (request_irq(gpio_to_irq(uart->cts_pin),
735 bfin_serial_mctrl_cts_int,
736 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
737 IRQF_DISABLED, "BFIN_UART_CTS", uart)) {
738 uart->cts_pin = -1;
739 pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
740 }
741 }
742 if (uart->rts_pin >= 0)
743 gpio_direction_output(uart->rts_pin, 0);
744 #endif
745 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
746 if (uart->cts_pin >= 0 && request_irq(uart->status_irq,
747 bfin_serial_mctrl_cts_int,
748 IRQF_DISABLED, "BFIN_UART_MODEM_STATUS", uart)) {
749 uart->cts_pin = -1;
750 pr_info("Unable to attach BlackFin UART Modem Status interrupt.\n");
751 }
752
753 /* CTS RTS PINs are negative assertive. */
754 UART_PUT_MCR(uart, ACTS);
755 UART_SET_IER(uart, EDSSI);
756 #endif
757
758 UART_SET_IER(uart, ERBFI);
759 return 0;
760 }
761
762 static void bfin_serial_shutdown(struct uart_port *port)
763 {
764 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
765
766 #ifdef CONFIG_SERIAL_BFIN_DMA
767 disable_dma(uart->tx_dma_channel);
768 free_dma(uart->tx_dma_channel);
769 disable_dma(uart->rx_dma_channel);
770 free_dma(uart->rx_dma_channel);
771 del_timer(&(uart->rx_dma_timer));
772 dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
773 #else
774 #ifdef CONFIG_BF54x
775 switch (uart->port.irq) {
776 case IRQ_UART3_RX:
777 free_dma(CH_UART3_RX);
778 free_dma(CH_UART3_TX);
779 break;
780 case IRQ_UART2_RX:
781 free_dma(CH_UART2_RX);
782 free_dma(CH_UART2_TX);
783 break;
784 default:
785 break;
786 };
787 #endif
788 free_irq(uart->rx_irq, uart);
789 free_irq(uart->tx_irq, uart);
790 #endif
791
792 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
793 if (uart->cts_pin >= 0)
794 free_irq(gpio_to_irq(uart->cts_pin), uart);
795 #endif
796 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
797 if (uart->cts_pin >= 0)
798 free_irq(uart->status_irq, uart);
799 #endif
800 }
801
802 static void
803 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
804 struct ktermios *old)
805 {
806 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
807 unsigned long flags;
808 unsigned int baud, quot;
809 unsigned short val, ier, lcr = 0;
810
811 switch (termios->c_cflag & CSIZE) {
812 case CS8:
813 lcr = WLS(8);
814 break;
815 case CS7:
816 lcr = WLS(7);
817 break;
818 case CS6:
819 lcr = WLS(6);
820 break;
821 case CS5:
822 lcr = WLS(5);
823 break;
824 default:
825 printk(KERN_ERR "%s: word lengh not supported\n",
826 __func__);
827 }
828
829 /* Anomaly notes:
830 * 05000231 - STOP bit is always set to 1 whatever the user is set.
831 */
832 if (termios->c_cflag & CSTOPB) {
833 if (ANOMALY_05000231)
834 printk(KERN_WARNING "STOP bits other than 1 is not "
835 "supported in case of anomaly 05000231.\n");
836 else
837 lcr |= STB;
838 }
839 if (termios->c_cflag & PARENB)
840 lcr |= PEN;
841 if (!(termios->c_cflag & PARODD))
842 lcr |= EPS;
843 if (termios->c_cflag & CMSPAR)
844 lcr |= STP;
845
846 spin_lock_irqsave(&uart->port.lock, flags);
847
848 port->read_status_mask = OE;
849 if (termios->c_iflag & INPCK)
850 port->read_status_mask |= (FE | PE);
851 if (termios->c_iflag & (BRKINT | PARMRK))
852 port->read_status_mask |= BI;
853
854 /*
855 * Characters to ignore
856 */
857 port->ignore_status_mask = 0;
858 if (termios->c_iflag & IGNPAR)
859 port->ignore_status_mask |= FE | PE;
860 if (termios->c_iflag & IGNBRK) {
861 port->ignore_status_mask |= BI;
862 /*
863 * If we're ignoring parity and break indicators,
864 * ignore overruns too (for real raw support).
865 */
866 if (termios->c_iflag & IGNPAR)
867 port->ignore_status_mask |= OE;
868 }
869
870 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
871 quot = uart_get_divisor(port, baud);
872
873 /* If discipline is not IRDA, apply ANOMALY_05000230 */
874 if (termios->c_line != N_IRDA)
875 quot -= ANOMALY_05000230;
876
877 UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
878
879 /* Disable UART */
880 ier = UART_GET_IER(uart);
881 UART_DISABLE_INTS(uart);
882
883 /* Set DLAB in LCR to Access DLL and DLH */
884 UART_SET_DLAB(uart);
885
886 UART_PUT_DLL(uart, quot & 0xFF);
887 UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
888 SSYNC();
889
890 /* Clear DLAB in LCR to Access THR RBR IER */
891 UART_CLEAR_DLAB(uart);
892
893 UART_PUT_LCR(uart, lcr);
894
895 /* Enable UART */
896 UART_ENABLE_INTS(uart, ier);
897
898 val = UART_GET_GCTL(uart);
899 val |= UCEN;
900 UART_PUT_GCTL(uart, val);
901
902 /* Port speed changed, update the per-port timeout. */
903 uart_update_timeout(port, termios->c_cflag, baud);
904
905 spin_unlock_irqrestore(&uart->port.lock, flags);
906 }
907
908 static const char *bfin_serial_type(struct uart_port *port)
909 {
910 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
911
912 return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
913 }
914
915 /*
916 * Release the memory region(s) being used by 'port'.
917 */
918 static void bfin_serial_release_port(struct uart_port *port)
919 {
920 }
921
922 /*
923 * Request the memory region(s) being used by 'port'.
924 */
925 static int bfin_serial_request_port(struct uart_port *port)
926 {
927 return 0;
928 }
929
930 /*
931 * Configure/autoconfigure the port.
932 */
933 static void bfin_serial_config_port(struct uart_port *port, int flags)
934 {
935 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
936
937 if (flags & UART_CONFIG_TYPE &&
938 bfin_serial_request_port(&uart->port) == 0)
939 uart->port.type = PORT_BFIN;
940 }
941
942 /*
943 * Verify the new serial_struct (for TIOCSSERIAL).
944 * The only change we allow are to the flags and type, and
945 * even then only between PORT_BFIN and PORT_UNKNOWN
946 */
947 static int
948 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
949 {
950 return 0;
951 }
952
953 /*
954 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
955 * In other cases, disable IrDA function.
956 */
957 static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
958 {
959 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
960 unsigned short val;
961
962 switch (ld) {
963 case N_IRDA:
964 val = UART_GET_GCTL(uart);
965 val |= (IREN | RPOLC);
966 UART_PUT_GCTL(uart, val);
967 break;
968 default:
969 val = UART_GET_GCTL(uart);
970 val &= ~(IREN | RPOLC);
971 UART_PUT_GCTL(uart, val);
972 }
973 }
974
975 static void bfin_serial_reset_irda(struct uart_port *port)
976 {
977 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
978 unsigned short val;
979
980 val = UART_GET_GCTL(uart);
981 val &= ~(IREN | RPOLC);
982 UART_PUT_GCTL(uart, val);
983 SSYNC();
984 val |= (IREN | RPOLC);
985 UART_PUT_GCTL(uart, val);
986 SSYNC();
987 }
988
989 #ifdef CONFIG_CONSOLE_POLL
990 /* Anomaly notes:
991 * 05000099 - Because we only use THRE in poll_put and DR in poll_get,
992 * losing other bits of UART_LSR is not a problem here.
993 */
994 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
995 {
996 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
997
998 while (!(UART_GET_LSR(uart) & THRE))
999 cpu_relax();
1000
1001 UART_CLEAR_DLAB(uart);
1002 UART_PUT_CHAR(uart, (unsigned char)chr);
1003 }
1004
1005 static int bfin_serial_poll_get_char(struct uart_port *port)
1006 {
1007 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1008 unsigned char chr;
1009
1010 while (!(UART_GET_LSR(uart) & DR))
1011 cpu_relax();
1012
1013 UART_CLEAR_DLAB(uart);
1014 chr = UART_GET_CHAR(uart);
1015
1016 return chr;
1017 }
1018 #endif
1019
1020 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1021 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1022 static void bfin_kgdboc_port_shutdown(struct uart_port *port)
1023 {
1024 if (kgdboc_break_enabled) {
1025 kgdboc_break_enabled = 0;
1026 bfin_serial_shutdown(port);
1027 }
1028 }
1029
1030 static int bfin_kgdboc_port_startup(struct uart_port *port)
1031 {
1032 kgdboc_port_line = port->line;
1033 kgdboc_break_enabled = !bfin_serial_startup(port);
1034 return 0;
1035 }
1036 #endif
1037
1038 static struct uart_ops bfin_serial_pops = {
1039 .tx_empty = bfin_serial_tx_empty,
1040 .set_mctrl = bfin_serial_set_mctrl,
1041 .get_mctrl = bfin_serial_get_mctrl,
1042 .stop_tx = bfin_serial_stop_tx,
1043 .start_tx = bfin_serial_start_tx,
1044 .stop_rx = bfin_serial_stop_rx,
1045 .enable_ms = bfin_serial_enable_ms,
1046 .break_ctl = bfin_serial_break_ctl,
1047 .startup = bfin_serial_startup,
1048 .shutdown = bfin_serial_shutdown,
1049 .set_termios = bfin_serial_set_termios,
1050 .set_ldisc = bfin_serial_set_ldisc,
1051 .type = bfin_serial_type,
1052 .release_port = bfin_serial_release_port,
1053 .request_port = bfin_serial_request_port,
1054 .config_port = bfin_serial_config_port,
1055 .verify_port = bfin_serial_verify_port,
1056 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
1057 defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
1058 .kgdboc_port_startup = bfin_kgdboc_port_startup,
1059 .kgdboc_port_shutdown = bfin_kgdboc_port_shutdown,
1060 #endif
1061 #ifdef CONFIG_CONSOLE_POLL
1062 .poll_put_char = bfin_serial_poll_put_char,
1063 .poll_get_char = bfin_serial_poll_get_char,
1064 #endif
1065 };
1066
1067 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1068 /*
1069 * If the port was already initialised (eg, by a boot loader),
1070 * try to determine the current setup.
1071 */
1072 static void __init
1073 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1074 int *parity, int *bits)
1075 {
1076 unsigned short status;
1077
1078 status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1079 if (status == (ERBFI | ETBEI)) {
1080 /* ok, the port was enabled */
1081 u16 lcr, dlh, dll;
1082
1083 lcr = UART_GET_LCR(uart);
1084
1085 *parity = 'n';
1086 if (lcr & PEN) {
1087 if (lcr & EPS)
1088 *parity = 'e';
1089 else
1090 *parity = 'o';
1091 }
1092 switch (lcr & 0x03) {
1093 case 0:
1094 *bits = 5;
1095 break;
1096 case 1:
1097 *bits = 6;
1098 break;
1099 case 2:
1100 *bits = 7;
1101 break;
1102 case 3:
1103 *bits = 8;
1104 break;
1105 }
1106 /* Set DLAB in LCR to Access DLL and DLH */
1107 UART_SET_DLAB(uart);
1108
1109 dll = UART_GET_DLL(uart);
1110 dlh = UART_GET_DLH(uart);
1111
1112 /* Clear DLAB in LCR to Access THR RBR IER */
1113 UART_CLEAR_DLAB(uart);
1114
1115 *baud = get_sclk() / (16*(dll | dlh << 8));
1116 }
1117 pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1118 }
1119
1120 static struct uart_driver bfin_serial_reg;
1121
1122 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1123 {
1124 struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1125 while (!(UART_GET_LSR(uart) & THRE))
1126 barrier();
1127 UART_PUT_CHAR(uart, ch);
1128 }
1129
1130 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1131 defined (CONFIG_EARLY_PRINTK) */
1132
1133 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1134 #define CLASS_BFIN_CONSOLE "bfin-console"
1135 /*
1136 * Interrupts are disabled on entering
1137 */
1138 static void
1139 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1140 {
1141 struct bfin_serial_port *uart = bfin_serial_ports[co->index];
1142 unsigned long flags;
1143
1144 spin_lock_irqsave(&uart->port.lock, flags);
1145 uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1146 spin_unlock_irqrestore(&uart->port.lock, flags);
1147
1148 }
1149
1150 static int __init
1151 bfin_serial_console_setup(struct console *co, char *options)
1152 {
1153 struct bfin_serial_port *uart;
1154 int baud = 57600;
1155 int bits = 8;
1156 int parity = 'n';
1157 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1158 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1159 int flow = 'r';
1160 # else
1161 int flow = 'n';
1162 # endif
1163
1164 /*
1165 * Check whether an invalid uart number has been specified, and
1166 * if so, search for the first available port that does have
1167 * console support.
1168 */
1169 if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
1170 return -ENODEV;
1171
1172 uart = bfin_serial_ports[co->index];
1173 if (!uart)
1174 return -ENODEV;
1175
1176 if (options)
1177 uart_parse_options(options, &baud, &parity, &bits, &flow);
1178 else
1179 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1180
1181 return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1182 }
1183
1184 static struct console bfin_serial_console = {
1185 .name = BFIN_SERIAL_DEV_NAME,
1186 .write = bfin_serial_console_write,
1187 .device = uart_console_device,
1188 .setup = bfin_serial_console_setup,
1189 .flags = CON_PRINTBUFFER,
1190 .index = -1,
1191 .data = &bfin_serial_reg,
1192 };
1193 #define BFIN_SERIAL_CONSOLE (&bfin_serial_console)
1194 #else
1195 #define BFIN_SERIAL_CONSOLE NULL
1196 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1197
1198 #ifdef CONFIG_EARLY_PRINTK
1199 static struct bfin_serial_port bfin_earlyprintk_port;
1200 #define CLASS_BFIN_EARLYPRINTK "bfin-earlyprintk"
1201
1202 /*
1203 * Interrupts are disabled on entering
1204 */
1205 static void
1206 bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1207 {
1208 unsigned long flags;
1209
1210 if (bfin_earlyprintk_port.port.line != co->index)
1211 return;
1212
1213 spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
1214 uart_console_write(&bfin_earlyprintk_port.port, s, count,
1215 bfin_serial_console_putchar);
1216 spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1217 }
1218
1219 /*
1220 * This should have a .setup or .early_setup in it, but then things get called
1221 * without the command line options, and the baud rate gets messed up - so
1222 * don't let the common infrastructure play with things. (see calls to setup
1223 * & earlysetup in ./kernel/printk.c:register_console()
1224 */
1225 static struct __initdata console bfin_early_serial_console = {
1226 .name = "early_BFuart",
1227 .write = bfin_earlyprintk_console_write,
1228 .device = uart_console_device,
1229 .flags = CON_PRINTBUFFER,
1230 .index = -1,
1231 .data = &bfin_serial_reg,
1232 };
1233 #endif
1234
1235 static struct uart_driver bfin_serial_reg = {
1236 .owner = THIS_MODULE,
1237 .driver_name = DRIVER_NAME,
1238 .dev_name = BFIN_SERIAL_DEV_NAME,
1239 .major = BFIN_SERIAL_MAJOR,
1240 .minor = BFIN_SERIAL_MINOR,
1241 .nr = BFIN_UART_NR_PORTS,
1242 .cons = BFIN_SERIAL_CONSOLE,
1243 };
1244
1245 static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
1246 {
1247 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1248
1249 return uart_suspend_port(&bfin_serial_reg, &uart->port);
1250 }
1251
1252 static int bfin_serial_resume(struct platform_device *pdev)
1253 {
1254 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1255
1256 return uart_resume_port(&bfin_serial_reg, &uart->port);
1257 }
1258
1259 static int bfin_serial_probe(struct platform_device *pdev)
1260 {
1261 struct resource *res;
1262 struct bfin_serial_port *uart = NULL;
1263 int ret = 0;
1264
1265 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1266 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
1267 return -ENOENT;
1268 }
1269
1270 if (bfin_serial_ports[pdev->id] == NULL) {
1271
1272 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
1273 if (!uart) {
1274 dev_err(&pdev->dev,
1275 "fail to malloc bfin_serial_port\n");
1276 return -ENOMEM;
1277 }
1278 bfin_serial_ports[pdev->id] = uart;
1279
1280 #ifdef CONFIG_EARLY_PRINTK
1281 if (!(bfin_earlyprintk_port.port.membase
1282 && bfin_earlyprintk_port.port.line == pdev->id)) {
1283 /*
1284 * If the peripheral PINs of current port is allocated
1285 * in earlyprintk probe stage, don't do it again.
1286 */
1287 #endif
1288 ret = peripheral_request_list(
1289 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1290 if (ret) {
1291 dev_err(&pdev->dev,
1292 "fail to request bfin serial peripherals\n");
1293 goto out_error_free_mem;
1294 }
1295 #ifdef CONFIG_EARLY_PRINTK
1296 }
1297 #endif
1298
1299 spin_lock_init(&uart->port.lock);
1300 uart->port.uartclk = get_sclk();
1301 uart->port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1302 uart->port.ops = &bfin_serial_pops;
1303 uart->port.line = pdev->id;
1304 uart->port.iotype = UPIO_MEM;
1305 uart->port.flags = UPF_BOOT_AUTOCONF;
1306
1307 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1308 if (res == NULL) {
1309 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1310 ret = -ENOENT;
1311 goto out_error_free_peripherals;
1312 }
1313
1314 uart->port.membase = ioremap(res->start, resource_size(res));
1315 if (!uart->port.membase) {
1316 dev_err(&pdev->dev, "Cannot map uart IO\n");
1317 ret = -ENXIO;
1318 goto out_error_free_peripherals;
1319 }
1320 uart->port.mapbase = res->start;
1321
1322 uart->tx_irq = platform_get_irq(pdev, 0);
1323 if (uart->tx_irq < 0) {
1324 dev_err(&pdev->dev, "No uart TX IRQ specified\n");
1325 ret = -ENOENT;
1326 goto out_error_unmap;
1327 }
1328
1329 uart->rx_irq = platform_get_irq(pdev, 1);
1330 if (uart->rx_irq < 0) {
1331 dev_err(&pdev->dev, "No uart RX IRQ specified\n");
1332 ret = -ENOENT;
1333 goto out_error_unmap;
1334 }
1335 uart->port.irq = uart->rx_irq;
1336
1337 uart->status_irq = platform_get_irq(pdev, 2);
1338 if (uart->status_irq < 0) {
1339 dev_err(&pdev->dev, "No uart status IRQ specified\n");
1340 ret = -ENOENT;
1341 goto out_error_unmap;
1342 }
1343
1344 #ifdef CONFIG_SERIAL_BFIN_DMA
1345 spin_lock_init(&uart->rx_lock);
1346 uart->tx_done = 1;
1347 uart->tx_count = 0;
1348
1349 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1350 if (res == NULL) {
1351 dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
1352 ret = -ENOENT;
1353 goto out_error_unmap;
1354 }
1355 uart->tx_dma_channel = res->start;
1356
1357 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1358 if (res == NULL) {
1359 dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
1360 ret = -ENOENT;
1361 goto out_error_unmap;
1362 }
1363 uart->rx_dma_channel = res->start;
1364
1365 init_timer(&(uart->rx_dma_timer));
1366 #endif
1367
1368 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1369 defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1370 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1371 if (res == NULL)
1372 uart->cts_pin = -1;
1373 else
1374 uart->cts_pin = res->start;
1375
1376 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1377 if (res == NULL)
1378 uart->rts_pin = -1;
1379 else
1380 uart->rts_pin = res->start;
1381 # if defined(CONFIG_SERIAL_BFIN_CTSRTS)
1382 if (uart->rts_pin >= 0)
1383 gpio_request(uart->rts_pin, DRIVER_NAME);
1384 # endif
1385 #endif
1386 }
1387
1388 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1389 if (!is_early_platform_device(pdev)) {
1390 #endif
1391 uart = bfin_serial_ports[pdev->id];
1392 uart->port.dev = &pdev->dev;
1393 dev_set_drvdata(&pdev->dev, uart);
1394 ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
1395 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1396 }
1397 #endif
1398
1399 if (!ret)
1400 return 0;
1401
1402 if (uart) {
1403 out_error_unmap:
1404 iounmap(uart->port.membase);
1405 out_error_free_peripherals:
1406 peripheral_free_list(
1407 (unsigned short *)pdev->dev.platform_data);
1408 out_error_free_mem:
1409 kfree(uart);
1410 bfin_serial_ports[pdev->id] = NULL;
1411 }
1412
1413 return ret;
1414 }
1415
1416 static int __devexit bfin_serial_remove(struct platform_device *pdev)
1417 {
1418 struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1419
1420 dev_set_drvdata(&pdev->dev, NULL);
1421
1422 if (uart) {
1423 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1424 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1425 if (uart->rts_pin >= 0)
1426 gpio_free(uart->rts_pin);
1427 #endif
1428 iounmap(uart->port.membase);
1429 peripheral_free_list(
1430 (unsigned short *)pdev->dev.platform_data);
1431 kfree(uart);
1432 bfin_serial_ports[pdev->id] = NULL;
1433 }
1434
1435 return 0;
1436 }
1437
1438 static struct platform_driver bfin_serial_driver = {
1439 .probe = bfin_serial_probe,
1440 .remove = __devexit_p(bfin_serial_remove),
1441 .suspend = bfin_serial_suspend,
1442 .resume = bfin_serial_resume,
1443 .driver = {
1444 .name = DRIVER_NAME,
1445 .owner = THIS_MODULE,
1446 },
1447 };
1448
1449 #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1450 static __initdata struct early_platform_driver early_bfin_serial_driver = {
1451 .class_str = CLASS_BFIN_CONSOLE,
1452 .pdrv = &bfin_serial_driver,
1453 .requested_id = EARLY_PLATFORM_ID_UNSET,
1454 };
1455
1456 static int __init bfin_serial_rs_console_init(void)
1457 {
1458 early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
1459
1460 early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
1461
1462 register_console(&bfin_serial_console);
1463
1464 return 0;
1465 }
1466 console_initcall(bfin_serial_rs_console_init);
1467 #endif
1468
1469 #ifdef CONFIG_EARLY_PRINTK
1470 /*
1471 * Memory can't be allocated dynamically during earlyprink init stage.
1472 * So, do individual probe for earlyprink with a static uart port variable.
1473 */
1474 static int bfin_earlyprintk_probe(struct platform_device *pdev)
1475 {
1476 struct resource *res;
1477 int ret;
1478
1479 if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1480 dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
1481 return -ENOENT;
1482 }
1483
1484 ret = peripheral_request_list(
1485 (unsigned short *)pdev->dev.platform_data, DRIVER_NAME);
1486 if (ret) {
1487 dev_err(&pdev->dev,
1488 "fail to request bfin serial peripherals\n");
1489 return ret;
1490 }
1491
1492 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1493 if (res == NULL) {
1494 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1495 ret = -ENOENT;
1496 goto out_error_free_peripherals;
1497 }
1498
1499 bfin_earlyprintk_port.port.membase = ioremap(res->start,
1500 resource_size(res));
1501 if (!bfin_earlyprintk_port.port.membase) {
1502 dev_err(&pdev->dev, "Cannot map uart IO\n");
1503 ret = -ENXIO;
1504 goto out_error_free_peripherals;
1505 }
1506 bfin_earlyprintk_port.port.mapbase = res->start;
1507 bfin_earlyprintk_port.port.line = pdev->id;
1508 bfin_earlyprintk_port.port.uartclk = get_sclk();
1509 bfin_earlyprintk_port.port.fifosize = BFIN_UART_TX_FIFO_SIZE;
1510 spin_lock_init(&bfin_earlyprintk_port.port.lock);
1511
1512 return 0;
1513
1514 out_error_free_peripherals:
1515 peripheral_free_list(
1516 (unsigned short *)pdev->dev.platform_data);
1517
1518 return ret;
1519 }
1520
1521 static struct platform_driver bfin_earlyprintk_driver = {
1522 .probe = bfin_earlyprintk_probe,
1523 .driver = {
1524 .name = DRIVER_NAME,
1525 .owner = THIS_MODULE,
1526 },
1527 };
1528
1529 static __initdata struct early_platform_driver early_bfin_earlyprintk_driver = {
1530 .class_str = CLASS_BFIN_EARLYPRINTK,
1531 .pdrv = &bfin_earlyprintk_driver,
1532 .requested_id = EARLY_PLATFORM_ID_UNSET,
1533 };
1534
1535 struct console __init *bfin_earlyserial_init(unsigned int port,
1536 unsigned int cflag)
1537 {
1538 struct ktermios t;
1539 char port_name[20];
1540
1541 if (port < 0 || port >= BFIN_UART_NR_PORTS)
1542 return NULL;
1543
1544 /*
1545 * Only probe resource of the given port in earlyprintk boot arg.
1546 * The expected port id should be indicated in port name string.
1547 */
1548 snprintf(port_name, 20, DRIVER_NAME ".%d", port);
1549 early_platform_driver_register(&early_bfin_earlyprintk_driver,
1550 port_name);
1551 early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
1552
1553 if (!bfin_earlyprintk_port.port.membase)
1554 return NULL;
1555
1556 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1557 /*
1558 * If we are using early serial, don't let the normal console rewind
1559 * log buffer, since that causes things to be printed multiple times
1560 */
1561 bfin_serial_console.flags &= ~CON_PRINTBUFFER;
1562 #endif
1563
1564 bfin_early_serial_console.index = port;
1565 t.c_cflag = cflag;
1566 t.c_iflag = 0;
1567 t.c_oflag = 0;
1568 t.c_lflag = ICANON;
1569 t.c_line = port;
1570 bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
1571
1572 return &bfin_early_serial_console;
1573 }
1574 #endif /* CONFIG_EARLY_PRINTK */
1575
1576 static int __init bfin_serial_init(void)
1577 {
1578 int ret;
1579
1580 pr_info("Blackfin serial driver\n");
1581
1582 ret = uart_register_driver(&bfin_serial_reg);
1583 if (ret) {
1584 pr_err("failed to register %s:%d\n",
1585 bfin_serial_reg.driver_name, ret);
1586 }
1587
1588 ret = platform_driver_register(&bfin_serial_driver);
1589 if (ret) {
1590 pr_err("fail to register bfin uart\n");
1591 uart_unregister_driver(&bfin_serial_reg);
1592 }
1593
1594 return ret;
1595 }
1596
1597 static void __exit bfin_serial_exit(void)
1598 {
1599 platform_driver_unregister(&bfin_serial_driver);
1600 uart_unregister_driver(&bfin_serial_reg);
1601 }
1602
1603
1604 module_init(bfin_serial_init);
1605 module_exit(bfin_serial_exit);
1606
1607 MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
1608 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1609 MODULE_LICENSE("GPL");
1610 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1611 MODULE_ALIAS("platform:bfin-uart");
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