?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge remote-tracking branch 'moduleh/module.h-split'
[linux-2.6/next.git] / drivers / usb / gadget / fusb300_udc.c
blob5c36b2b8e1437e6daf8966376f0e6df3eaeeadda
1 /*
2 * Fusb300 UDC (USB gadget)
3 *
4 * Copyright (C) 2010 Faraday Technology Corp.
5 *
6 * Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 *
21 */
22 #include <linux/dma-mapping.h>
23 #include <linux/err.h>
24 #include <linux/interrupt.h>
25 #include <linux/io.h>
26 #include <linux/module.h>
27 #include <linux/platform_device.h>
28 #include <linux/usb/ch9.h>
29 #include <linux/usb/gadget.h>
30
31 #include "fusb300_udc.h"
32
33 MODULE_DESCRIPTION("FUSB300 USB gadget driver");
34 MODULE_LICENSE("GPL");
35 MODULE_AUTHOR("Yuan Hsin Chen <yhchen@faraday-tech.com>");
36 MODULE_ALIAS("platform:fusb300_udc");
37
38 #define DRIVER_VERSION "20 October 2010"
39
40 static const char udc_name[] = "fusb300_udc";
41 static const char * const fusb300_ep_name[] = {
42 "ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", "ep8", "ep9",
43 "ep10", "ep11", "ep12", "ep13", "ep14", "ep15"
44 };
45
46 static void done(struct fusb300_ep *ep, struct fusb300_request *req,
47 int status);
48
49 static void fusb300_enable_bit(struct fusb300 *fusb300, u32 offset,
50 u32 value)
51 {
52 u32 reg = ioread32(fusb300->reg + offset);
53
54 reg |= value;
55 iowrite32(reg, fusb300->reg + offset);
56 }
57
58 static void fusb300_disable_bit(struct fusb300 *fusb300, u32 offset,
59 u32 value)
60 {
61 u32 reg = ioread32(fusb300->reg + offset);
62
63 reg &= ~value;
64 iowrite32(reg, fusb300->reg + offset);
65 }
66
67
68 static void fusb300_ep_setting(struct fusb300_ep *ep,
69 struct fusb300_ep_info info)
70 {
71 ep->epnum = info.epnum;
72 ep->type = info.type;
73 }
74
75 static int fusb300_ep_release(struct fusb300_ep *ep)
76 {
77 if (!ep->epnum)
78 return 0;
79 ep->epnum = 0;
80 ep->stall = 0;
81 ep->wedged = 0;
82 return 0;
83 }
84
85 static void fusb300_set_fifo_entry(struct fusb300 *fusb300,
86 u32 ep)
87 {
88 u32 val = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
89
90 val &= ~FUSB300_EPSET1_FIFOENTRY_MSK;
91 val |= FUSB300_EPSET1_FIFOENTRY(FUSB300_FIFO_ENTRY_NUM);
92 iowrite32(val, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
93 }
94
95 static void fusb300_set_start_entry(struct fusb300 *fusb300,
96 u8 ep)
97 {
98 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
99 u32 start_entry = fusb300->fifo_entry_num * FUSB300_FIFO_ENTRY_NUM;
100
101 reg &= ~FUSB300_EPSET1_START_ENTRY_MSK ;
102 reg |= FUSB300_EPSET1_START_ENTRY(start_entry);
103 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
104 if (fusb300->fifo_entry_num == FUSB300_MAX_FIFO_ENTRY) {
105 fusb300->fifo_entry_num = 0;
106 fusb300->addrofs = 0;
107 pr_err("fifo entry is over the maximum number!\n");
108 } else
109 fusb300->fifo_entry_num++;
110 }
111
112 /* set fusb300_set_start_entry first before fusb300_set_epaddrofs */
113 static void fusb300_set_epaddrofs(struct fusb300 *fusb300,
114 struct fusb300_ep_info info)
115 {
116 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
117
118 reg &= ~FUSB300_EPSET2_ADDROFS_MSK;
119 reg |= FUSB300_EPSET2_ADDROFS(fusb300->addrofs);
120 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
121 fusb300->addrofs += (info.maxpacket + 7) / 8 * FUSB300_FIFO_ENTRY_NUM;
122 }
123
124 static void ep_fifo_setting(struct fusb300 *fusb300,
125 struct fusb300_ep_info info)
126 {
127 fusb300_set_fifo_entry(fusb300, info.epnum);
128 fusb300_set_start_entry(fusb300, info.epnum);
129 fusb300_set_epaddrofs(fusb300, info);
130 }
131
132 static void fusb300_set_eptype(struct fusb300 *fusb300,
133 struct fusb300_ep_info info)
134 {
135 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
136
137 reg &= ~FUSB300_EPSET1_TYPE_MSK;
138 reg |= FUSB300_EPSET1_TYPE(info.type);
139 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
140 }
141
142 static void fusb300_set_epdir(struct fusb300 *fusb300,
143 struct fusb300_ep_info info)
144 {
145 u32 reg;
146
147 if (!info.dir_in)
148 return;
149 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
150 reg &= ~FUSB300_EPSET1_DIR_MSK;
151 reg |= FUSB300_EPSET1_DIRIN;
152 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
153 }
154
155 static void fusb300_set_ep_active(struct fusb300 *fusb300,
156 u8 ep)
157 {
158 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
159
160 reg |= FUSB300_EPSET1_ACTEN;
161 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
162 }
163
164 static void fusb300_set_epmps(struct fusb300 *fusb300,
165 struct fusb300_ep_info info)
166 {
167 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
168
169 reg &= ~FUSB300_EPSET2_MPS_MSK;
170 reg |= FUSB300_EPSET2_MPS(info.maxpacket);
171 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
172 }
173
174 static void fusb300_set_interval(struct fusb300 *fusb300,
175 struct fusb300_ep_info info)
176 {
177 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
178
179 reg &= ~FUSB300_EPSET1_INTERVAL(0x7);
180 reg |= FUSB300_EPSET1_INTERVAL(info.interval);
181 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
182 }
183
184 static void fusb300_set_bwnum(struct fusb300 *fusb300,
185 struct fusb300_ep_info info)
186 {
187 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
188
189 reg &= ~FUSB300_EPSET1_BWNUM(0x3);
190 reg |= FUSB300_EPSET1_BWNUM(info.bw_num);
191 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
192 }
193
194 static void set_ep_reg(struct fusb300 *fusb300,
195 struct fusb300_ep_info info)
196 {
197 fusb300_set_eptype(fusb300, info);
198 fusb300_set_epdir(fusb300, info);
199 fusb300_set_epmps(fusb300, info);
200
201 if (info.interval)
202 fusb300_set_interval(fusb300, info);
203
204 if (info.bw_num)
205 fusb300_set_bwnum(fusb300, info);
206
207 fusb300_set_ep_active(fusb300, info.epnum);
208 }
209
210 static int config_ep(struct fusb300_ep *ep,
211 const struct usb_endpoint_descriptor *desc)
212 {
213 struct fusb300 *fusb300 = ep->fusb300;
214 struct fusb300_ep_info info;
215
216 ep->desc = desc;
217
218 info.interval = 0;
219 info.addrofs = 0;
220 info.bw_num = 0;
221
222 info.type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
223 info.dir_in = (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) ? 1 : 0;
224 info.maxpacket = usb_endpoint_maxp(desc);
225 info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
226
227 if ((info.type == USB_ENDPOINT_XFER_INT) ||
228 (info.type == USB_ENDPOINT_XFER_ISOC)) {
229 info.interval = desc->bInterval;
230 if (info.type == USB_ENDPOINT_XFER_ISOC)
231 info.bw_num = ((desc->wMaxPacketSize & 0x1800) >> 11);
232 }
233
234 ep_fifo_setting(fusb300, info);
235
236 set_ep_reg(fusb300, info);
237
238 fusb300_ep_setting(ep, info);
239
240 fusb300->ep[info.epnum] = ep;
241
242 return 0;
243 }
244
245 static int fusb300_enable(struct usb_ep *_ep,
246 const struct usb_endpoint_descriptor *desc)
247 {
248 struct fusb300_ep *ep;
249
250 ep = container_of(_ep, struct fusb300_ep, ep);
251
252 if (ep->fusb300->reenum) {
253 ep->fusb300->fifo_entry_num = 0;
254 ep->fusb300->addrofs = 0;
255 ep->fusb300->reenum = 0;
256 }
257
258 return config_ep(ep, desc);
259 }
260
261 static int fusb300_disable(struct usb_ep *_ep)
262 {
263 struct fusb300_ep *ep;
264 struct fusb300_request *req;
265 unsigned long flags;
266
267 ep = container_of(_ep, struct fusb300_ep, ep);
268
269 BUG_ON(!ep);
270
271 while (!list_empty(&ep->queue)) {
272 req = list_entry(ep->queue.next, struct fusb300_request, queue);
273 spin_lock_irqsave(&ep->fusb300->lock, flags);
274 done(ep, req, -ECONNRESET);
275 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
276 }
277
278 return fusb300_ep_release(ep);
279 }
280
281 static struct usb_request *fusb300_alloc_request(struct usb_ep *_ep,
282 gfp_t gfp_flags)
283 {
284 struct fusb300_request *req;
285
286 req = kzalloc(sizeof(struct fusb300_request), gfp_flags);
287 if (!req)
288 return NULL;
289 INIT_LIST_HEAD(&req->queue);
290
291 return &req->req;
292 }
293
294 static void fusb300_free_request(struct usb_ep *_ep, struct usb_request *_req)
295 {
296 struct fusb300_request *req;
297
298 req = container_of(_req, struct fusb300_request, req);
299 kfree(req);
300 }
301
302 static int enable_fifo_int(struct fusb300_ep *ep)
303 {
304 struct fusb300 *fusb300 = ep->fusb300;
305
306 if (ep->epnum) {
307 fusb300_enable_bit(fusb300, FUSB300_OFFSET_IGER0,
308 FUSB300_IGER0_EEPn_FIFO_INT(ep->epnum));
309 } else {
310 pr_err("can't enable_fifo_int ep0\n");
311 return -EINVAL;
312 }
313
314 return 0;
315 }
316
317 static int disable_fifo_int(struct fusb300_ep *ep)
318 {
319 struct fusb300 *fusb300 = ep->fusb300;
320
321 if (ep->epnum) {
322 fusb300_disable_bit(fusb300, FUSB300_OFFSET_IGER0,
323 FUSB300_IGER0_EEPn_FIFO_INT(ep->epnum));
324 } else {
325 pr_err("can't disable_fifo_int ep0\n");
326 return -EINVAL;
327 }
328
329 return 0;
330 }
331
332 static void fusb300_set_cxlen(struct fusb300 *fusb300, u32 length)
333 {
334 u32 reg;
335
336 reg = ioread32(fusb300->reg + FUSB300_OFFSET_CSR);
337 reg &= ~FUSB300_CSR_LEN_MSK;
338 reg |= FUSB300_CSR_LEN(length);
339 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_CSR);
340 }
341
342 /* write data to cx fifo */
343 static void fusb300_wrcxf(struct fusb300_ep *ep,
344 struct fusb300_request *req)
345 {
346 int i = 0;
347 u8 *tmp;
348 u32 data;
349 struct fusb300 *fusb300 = ep->fusb300;
350 u32 length = req->req.length - req->req.actual;
351
352 tmp = req->req.buf + req->req.actual;
353
354 if (length > SS_CTL_MAX_PACKET_SIZE) {
355 fusb300_set_cxlen(fusb300, SS_CTL_MAX_PACKET_SIZE);
356 for (i = (SS_CTL_MAX_PACKET_SIZE >> 2); i > 0; i--) {
357 data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16 |
358 *(tmp + 3) << 24;
359 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
360 tmp += 4;
361 }
362 req->req.actual += SS_CTL_MAX_PACKET_SIZE;
363 } else { /* length is less than max packet size */
364 fusb300_set_cxlen(fusb300, length);
365 for (i = length >> 2; i > 0; i--) {
366 data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16 |
367 *(tmp + 3) << 24;
368 printk(KERN_DEBUG " 0x%x\n", data);
369 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
370 tmp = tmp + 4;
371 }
372 switch (length % 4) {
373 case 1:
374 data = *tmp;
375 printk(KERN_DEBUG " 0x%x\n", data);
376 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
377 break;
378 case 2:
379 data = *tmp | *(tmp + 1) << 8;
380 printk(KERN_DEBUG " 0x%x\n", data);
381 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
382 break;
383 case 3:
384 data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16;
385 printk(KERN_DEBUG " 0x%x\n", data);
386 iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
387 break;
388 default:
389 break;
390 }
391 req->req.actual += length;
392 }
393 }
394
395 static void fusb300_set_epnstall(struct fusb300 *fusb300, u8 ep)
396 {
397 fusb300_enable_bit(fusb300, FUSB300_OFFSET_EPSET0(ep),
398 FUSB300_EPSET0_STL);
399 }
400
401 static void fusb300_clear_epnstall(struct fusb300 *fusb300, u8 ep)
402 {
403 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
404
405 if (reg & FUSB300_EPSET0_STL) {
406 printk(KERN_DEBUG "EP%d stall... Clear!!\n", ep);
407 reg &= ~FUSB300_EPSET0_STL;
408 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
409 }
410 }
411
412 static void ep0_queue(struct fusb300_ep *ep, struct fusb300_request *req)
413 {
414 if (ep->fusb300->ep0_dir) { /* if IN */
415 if (req->req.length) {
416 fusb300_wrcxf(ep, req);
417 } else
418 printk(KERN_DEBUG "%s : req->req.length = 0x%x\n",
419 __func__, req->req.length);
420 if ((req->req.length == req->req.actual) ||
421 (req->req.actual < ep->ep.maxpacket))
422 done(ep, req, 0);
423 } else { /* OUT */
424 if (!req->req.length)
425 done(ep, req, 0);
426 else
427 fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_IGER1,
428 FUSB300_IGER1_CX_OUT_INT);
429 }
430 }
431
432 static int fusb300_queue(struct usb_ep *_ep, struct usb_request *_req,
433 gfp_t gfp_flags)
434 {
435 struct fusb300_ep *ep;
436 struct fusb300_request *req;
437 unsigned long flags;
438 int request = 0;
439
440 ep = container_of(_ep, struct fusb300_ep, ep);
441 req = container_of(_req, struct fusb300_request, req);
442
443 if (ep->fusb300->gadget.speed == USB_SPEED_UNKNOWN)
444 return -ESHUTDOWN;
445
446 spin_lock_irqsave(&ep->fusb300->lock, flags);
447
448 if (list_empty(&ep->queue))
449 request = 1;
450
451 list_add_tail(&req->queue, &ep->queue);
452
453 req->req.actual = 0;
454 req->req.status = -EINPROGRESS;
455
456 if (ep->desc == NULL) /* ep0 */
457 ep0_queue(ep, req);
458 else if (request && !ep->stall)
459 enable_fifo_int(ep);
460
461 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
462
463 return 0;
464 }
465
466 static int fusb300_dequeue(struct usb_ep *_ep, struct usb_request *_req)
467 {
468 struct fusb300_ep *ep;
469 struct fusb300_request *req;
470 unsigned long flags;
471
472 ep = container_of(_ep, struct fusb300_ep, ep);
473 req = container_of(_req, struct fusb300_request, req);
474
475 spin_lock_irqsave(&ep->fusb300->lock, flags);
476 if (!list_empty(&ep->queue))
477 done(ep, req, -ECONNRESET);
478 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
479
480 return 0;
481 }
482
483 static int fusb300_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge)
484 {
485 struct fusb300_ep *ep;
486 struct fusb300 *fusb300;
487 unsigned long flags;
488 int ret = 0;
489
490 ep = container_of(_ep, struct fusb300_ep, ep);
491
492 fusb300 = ep->fusb300;
493
494 spin_lock_irqsave(&ep->fusb300->lock, flags);
495
496 if (!list_empty(&ep->queue)) {
497 ret = -EAGAIN;
498 goto out;
499 }
500
501 if (value) {
502 fusb300_set_epnstall(fusb300, ep->epnum);
503 ep->stall = 1;
504 if (wedge)
505 ep->wedged = 1;
506 } else {
507 fusb300_clear_epnstall(fusb300, ep->epnum);
508 ep->stall = 0;
509 ep->wedged = 0;
510 }
511
512 out:
513 spin_unlock_irqrestore(&ep->fusb300->lock, flags);
514 return ret;
515 }
516
517 static int fusb300_set_halt(struct usb_ep *_ep, int value)
518 {
519 return fusb300_set_halt_and_wedge(_ep, value, 0);
520 }
521
522 static int fusb300_set_wedge(struct usb_ep *_ep)
523 {
524 return fusb300_set_halt_and_wedge(_ep, 1, 1);
525 }
526
527 static void fusb300_fifo_flush(struct usb_ep *_ep)
528 {
529 }
530
531 static struct usb_ep_ops fusb300_ep_ops = {
532 .enable = fusb300_enable,
533 .disable = fusb300_disable,
534
535 .alloc_request = fusb300_alloc_request,
536 .free_request = fusb300_free_request,
537
538 .queue = fusb300_queue,
539 .dequeue = fusb300_dequeue,
540
541 .set_halt = fusb300_set_halt,
542 .fifo_flush = fusb300_fifo_flush,
543 .set_wedge = fusb300_set_wedge,
544 };
545
546 /*****************************************************************************/
547 static void fusb300_clear_int(struct fusb300 *fusb300, u32 offset,
548 u32 value)
549 {
550 iowrite32(value, fusb300->reg + offset);
551 }
552
553 static void fusb300_reset(void)
554 {
555 }
556
557 static void fusb300_set_cxstall(struct fusb300 *fusb300)
558 {
559 fusb300_enable_bit(fusb300, FUSB300_OFFSET_CSR,
560 FUSB300_CSR_STL);
561 }
562
563 static void fusb300_set_cxdone(struct fusb300 *fusb300)
564 {
565 fusb300_enable_bit(fusb300, FUSB300_OFFSET_CSR,
566 FUSB300_CSR_DONE);
567 }
568
569 /* read data from cx fifo */
570 void fusb300_rdcxf(struct fusb300 *fusb300,
571 u8 *buffer, u32 length)
572 {
573 int i = 0;
574 u8 *tmp;
575 u32 data;
576
577 tmp = buffer;
578
579 for (i = (length >> 2); i > 0; i--) {
580 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
581 printk(KERN_DEBUG " 0x%x\n", data);
582 *tmp = data & 0xFF;
583 *(tmp + 1) = (data >> 8) & 0xFF;
584 *(tmp + 2) = (data >> 16) & 0xFF;
585 *(tmp + 3) = (data >> 24) & 0xFF;
586 tmp = tmp + 4;
587 }
588
589 switch (length % 4) {
590 case 1:
591 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
592 printk(KERN_DEBUG " 0x%x\n", data);
593 *tmp = data & 0xFF;
594 break;
595 case 2:
596 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
597 printk(KERN_DEBUG " 0x%x\n", data);
598 *tmp = data & 0xFF;
599 *(tmp + 1) = (data >> 8) & 0xFF;
600 break;
601 case 3:
602 data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
603 printk(KERN_DEBUG " 0x%x\n", data);
604 *tmp = data & 0xFF;
605 *(tmp + 1) = (data >> 8) & 0xFF;
606 *(tmp + 2) = (data >> 16) & 0xFF;
607 break;
608 default:
609 break;
610 }
611 }
612
613 static void fusb300_rdfifo(struct fusb300_ep *ep,
614 struct fusb300_request *req,
615 u32 length)
616 {
617 int i = 0;
618 u8 *tmp;
619 u32 data, reg;
620 struct fusb300 *fusb300 = ep->fusb300;
621
622 tmp = req->req.buf + req->req.actual;
623 req->req.actual += length;
624
625 if (req->req.actual > req->req.length)
626 printk(KERN_DEBUG "req->req.actual > req->req.length\n");
627
628 for (i = (length >> 2); i > 0; i--) {
629 data = ioread32(fusb300->reg +
630 FUSB300_OFFSET_EPPORT(ep->epnum));
631 *tmp = data & 0xFF;
632 *(tmp + 1) = (data >> 8) & 0xFF;
633 *(tmp + 2) = (data >> 16) & 0xFF;
634 *(tmp + 3) = (data >> 24) & 0xFF;
635 tmp = tmp + 4;
636 }
637
638 switch (length % 4) {
639 case 1:
640 data = ioread32(fusb300->reg +
641 FUSB300_OFFSET_EPPORT(ep->epnum));
642 *tmp = data & 0xFF;
643 break;
644 case 2:
645 data = ioread32(fusb300->reg +
646 FUSB300_OFFSET_EPPORT(ep->epnum));
647 *tmp = data & 0xFF;
648 *(tmp + 1) = (data >> 8) & 0xFF;
649 break;
650 case 3:
651 data = ioread32(fusb300->reg +
652 FUSB300_OFFSET_EPPORT(ep->epnum));
653 *tmp = data & 0xFF;
654 *(tmp + 1) = (data >> 8) & 0xFF;
655 *(tmp + 2) = (data >> 16) & 0xFF;
656 break;
657 default:
658 break;
659 }
660
661 do {
662 reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
663 reg &= FUSB300_IGR1_SYNF0_EMPTY_INT;
664 if (i)
665 printk(KERN_INFO "sync fifo is not empty!\n");
666 i++;
667 } while (!reg);
668 }
669
670 static u8 fusb300_get_epnstall(struct fusb300 *fusb300, u8 ep)
671 {
672 u8 value;
673 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
674
675 value = reg & FUSB300_EPSET0_STL;
676
677 return value;
678 }
679
680 static u8 fusb300_get_cxstall(struct fusb300 *fusb300)
681 {
682 u8 value;
683 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_CSR);
684
685 value = (reg & FUSB300_CSR_STL) >> 1;
686
687 return value;
688 }
689
690 static void request_error(struct fusb300 *fusb300)
691 {
692 fusb300_set_cxstall(fusb300);
693 printk(KERN_DEBUG "request error!!\n");
694 }
695
696 static void get_status(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
697 __releases(fusb300->lock)
698 __acquires(fusb300->lock)
699 {
700 u8 ep;
701 u16 status = 0;
702 u16 w_index = ctrl->wIndex;
703
704 switch (ctrl->bRequestType & USB_RECIP_MASK) {
705 case USB_RECIP_DEVICE:
706 status = 1 << USB_DEVICE_SELF_POWERED;
707 break;
708 case USB_RECIP_INTERFACE:
709 status = 0;
710 break;
711 case USB_RECIP_ENDPOINT:
712 ep = w_index & USB_ENDPOINT_NUMBER_MASK;
713 if (ep) {
714 if (fusb300_get_epnstall(fusb300, ep))
715 status = 1 << USB_ENDPOINT_HALT;
716 } else {
717 if (fusb300_get_cxstall(fusb300))
718 status = 0;
719 }
720 break;
721
722 default:
723 request_error(fusb300);
724 return; /* exit */
725 }
726
727 fusb300->ep0_data = cpu_to_le16(status);
728 fusb300->ep0_req->buf = &fusb300->ep0_data;
729 fusb300->ep0_req->length = 2;
730
731 spin_unlock(&fusb300->lock);
732 fusb300_queue(fusb300->gadget.ep0, fusb300->ep0_req, GFP_KERNEL);
733 spin_lock(&fusb300->lock);
734 }
735
736 static void set_feature(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
737 {
738 u8 ep;
739
740 switch (ctrl->bRequestType & USB_RECIP_MASK) {
741 case USB_RECIP_DEVICE:
742 fusb300_set_cxdone(fusb300);
743 break;
744 case USB_RECIP_INTERFACE:
745 fusb300_set_cxdone(fusb300);
746 break;
747 case USB_RECIP_ENDPOINT: {
748 u16 w_index = le16_to_cpu(ctrl->wIndex);
749
750 ep = w_index & USB_ENDPOINT_NUMBER_MASK;
751 if (ep)
752 fusb300_set_epnstall(fusb300, ep);
753 else
754 fusb300_set_cxstall(fusb300);
755 fusb300_set_cxdone(fusb300);
756 }
757 break;
758 default:
759 request_error(fusb300);
760 break;
761 }
762 }
763
764 static void fusb300_clear_seqnum(struct fusb300 *fusb300, u8 ep)
765 {
766 fusb300_enable_bit(fusb300, FUSB300_OFFSET_EPSET0(ep),
767 FUSB300_EPSET0_CLRSEQNUM);
768 }
769
770 static void clear_feature(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
771 {
772 struct fusb300_ep *ep =
773 fusb300->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK];
774
775 switch (ctrl->bRequestType & USB_RECIP_MASK) {
776 case USB_RECIP_DEVICE:
777 fusb300_set_cxdone(fusb300);
778 break;
779 case USB_RECIP_INTERFACE:
780 fusb300_set_cxdone(fusb300);
781 break;
782 case USB_RECIP_ENDPOINT:
783 if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) {
784 if (ep->wedged) {
785 fusb300_set_cxdone(fusb300);
786 break;
787 }
788 if (ep->stall) {
789 ep->stall = 0;
790 fusb300_clear_seqnum(fusb300, ep->epnum);
791 fusb300_clear_epnstall(fusb300, ep->epnum);
792 if (!list_empty(&ep->queue))
793 enable_fifo_int(ep);
794 }
795 }
796 fusb300_set_cxdone(fusb300);
797 break;
798 default:
799 request_error(fusb300);
800 break;
801 }
802 }
803
804 static void fusb300_set_dev_addr(struct fusb300 *fusb300, u16 addr)
805 {
806 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_DAR);
807
808 reg &= ~FUSB300_DAR_DRVADDR_MSK;
809 reg |= FUSB300_DAR_DRVADDR(addr);
810
811 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_DAR);
812 }
813
814 static void set_address(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
815 {
816 if (ctrl->wValue >= 0x0100)
817 request_error(fusb300);
818 else {
819 fusb300_set_dev_addr(fusb300, ctrl->wValue);
820 fusb300_set_cxdone(fusb300);
821 }
822 }
823
824 #define UVC_COPY_DESCRIPTORS(mem, src) \
825 do { \
826 const struct usb_descriptor_header * const *__src; \
827 for (__src = src; *__src; ++__src) { \
828 memcpy(mem, *__src, (*__src)->bLength); \
829 mem += (*__src)->bLength; \
830 } \
831 } while (0)
832
833 static int setup_packet(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
834 {
835 u8 *p = (u8 *)ctrl;
836 u8 ret = 0;
837 u8 i = 0;
838
839 fusb300_rdcxf(fusb300, p, 8);
840 fusb300->ep0_dir = ctrl->bRequestType & USB_DIR_IN;
841 fusb300->ep0_length = ctrl->wLength;
842
843 /* check request */
844 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
845 switch (ctrl->bRequest) {
846 case USB_REQ_GET_STATUS:
847 get_status(fusb300, ctrl);
848 break;
849 case USB_REQ_CLEAR_FEATURE:
850 clear_feature(fusb300, ctrl);
851 break;
852 case USB_REQ_SET_FEATURE:
853 set_feature(fusb300, ctrl);
854 break;
855 case USB_REQ_SET_ADDRESS:
856 set_address(fusb300, ctrl);
857 break;
858 case USB_REQ_SET_CONFIGURATION:
859 fusb300_enable_bit(fusb300, FUSB300_OFFSET_DAR,
860 FUSB300_DAR_SETCONFG);
861 /* clear sequence number */
862 for (i = 1; i <= FUSB300_MAX_NUM_EP; i++)
863 fusb300_clear_seqnum(fusb300, i);
864 fusb300->reenum = 1;
865 ret = 1;
866 break;
867 default:
868 ret = 1;
869 break;
870 }
871 } else
872 ret = 1;
873
874 return ret;
875 }
876
877 static void done(struct fusb300_ep *ep, struct fusb300_request *req,
878 int status)
879 {
880 list_del_init(&req->queue);
881
882 /* don't modify queue heads during completion callback */
883 if (ep->fusb300->gadget.speed == USB_SPEED_UNKNOWN)
884 req->req.status = -ESHUTDOWN;
885 else
886 req->req.status = status;
887
888 spin_unlock(&ep->fusb300->lock);
889 req->req.complete(&ep->ep, &req->req);
890 spin_lock(&ep->fusb300->lock);
891
892 if (ep->epnum) {
893 disable_fifo_int(ep);
894 if (!list_empty(&ep->queue))
895 enable_fifo_int(ep);
896 } else
897 fusb300_set_cxdone(ep->fusb300);
898 }
899
900 static void fusb300_fill_idma_prdtbl(struct fusb300_ep *ep, dma_addr_t d,
901 u32 len)
902 {
903 u32 value;
904 u32 reg;
905
906 /* wait SW owner */
907 do {
908 reg = ioread32(ep->fusb300->reg +
909 FUSB300_OFFSET_EPPRD_W0(ep->epnum));
910 reg &= FUSB300_EPPRD0_H;
911 } while (reg);
912
913 iowrite32(d, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W1(ep->epnum));
914
915 value = FUSB300_EPPRD0_BTC(len) | FUSB300_EPPRD0_H |
916 FUSB300_EPPRD0_F | FUSB300_EPPRD0_L | FUSB300_EPPRD0_I;
917 iowrite32(value, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W0(ep->epnum));
918
919 iowrite32(0x0, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W2(ep->epnum));
920
921 fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_EPPRDRDY,
922 FUSB300_EPPRDR_EP_PRD_RDY(ep->epnum));
923 }
924
925 static void fusb300_wait_idma_finished(struct fusb300_ep *ep)
926 {
927 u32 reg;
928
929 do {
930 reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_IGR1);
931 if ((reg & FUSB300_IGR1_VBUS_CHG_INT) ||
932 (reg & FUSB300_IGR1_WARM_RST_INT) ||
933 (reg & FUSB300_IGR1_HOT_RST_INT) ||
934 (reg & FUSB300_IGR1_USBRST_INT)
935 )
936 goto IDMA_RESET;
937 reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_IGR0);
938 reg &= FUSB300_IGR0_EPn_PRD_INT(ep->epnum);
939 } while (!reg);
940
941 fusb300_clear_int(ep->fusb300, FUSB300_OFFSET_IGR0,
942 FUSB300_IGR0_EPn_PRD_INT(ep->epnum));
943 IDMA_RESET:
944 fusb300_clear_int(ep->fusb300, FUSB300_OFFSET_IGER0,
945 FUSB300_IGER0_EEPn_PRD_INT(ep->epnum));
946 }
947
948 static void fusb300_set_idma(struct fusb300_ep *ep,
949 struct fusb300_request *req)
950 {
951 dma_addr_t d;
952
953 d = dma_map_single(NULL, req->req.buf, req->req.length, DMA_TO_DEVICE);
954
955 if (dma_mapping_error(NULL, d)) {
956 printk(KERN_DEBUG "dma_mapping_error\n");
957 return;
958 }
959
960 dma_sync_single_for_device(NULL, d, req->req.length, DMA_TO_DEVICE);
961
962 fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_IGER0,
963 FUSB300_IGER0_EEPn_PRD_INT(ep->epnum));
964
965 fusb300_fill_idma_prdtbl(ep, d, req->req.length);
966 /* check idma is done */
967 fusb300_wait_idma_finished(ep);
968
969 dma_unmap_single(NULL, d, req->req.length, DMA_TO_DEVICE);
970 }
971
972 static void in_ep_fifo_handler(struct fusb300_ep *ep)
973 {
974 struct fusb300_request *req = list_entry(ep->queue.next,
975 struct fusb300_request, queue);
976
977 if (req->req.length)
978 fusb300_set_idma(ep, req);
979 done(ep, req, 0);
980 }
981
982 static void out_ep_fifo_handler(struct fusb300_ep *ep)
983 {
984 struct fusb300 *fusb300 = ep->fusb300;
985 struct fusb300_request *req = list_entry(ep->queue.next,
986 struct fusb300_request, queue);
987 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPFFR(ep->epnum));
988 u32 length = reg & FUSB300_FFR_BYCNT;
989
990 fusb300_rdfifo(ep, req, length);
991
992 /* finish out transfer */
993 if ((req->req.length == req->req.actual) || (length < ep->ep.maxpacket))
994 done(ep, req, 0);
995 }
996
997 static void check_device_mode(struct fusb300 *fusb300)
998 {
999 u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_GCR);
1000
1001 switch (reg & FUSB300_GCR_DEVEN_MSK) {
1002 case FUSB300_GCR_DEVEN_SS:
1003 fusb300->gadget.speed = USB_SPEED_SUPER;
1004 break;
1005 case FUSB300_GCR_DEVEN_HS:
1006 fusb300->gadget.speed = USB_SPEED_HIGH;
1007 break;
1008 case FUSB300_GCR_DEVEN_FS:
1009 fusb300->gadget.speed = USB_SPEED_FULL;
1010 break;
1011 default:
1012 fusb300->gadget.speed = USB_SPEED_UNKNOWN;
1013 break;
1014 }
1015 printk(KERN_INFO "dev_mode = %d\n", (reg & FUSB300_GCR_DEVEN_MSK));
1016 }
1017
1018
1019 static void fusb300_ep0out(struct fusb300 *fusb300)
1020 {
1021 struct fusb300_ep *ep = fusb300->ep[0];
1022 u32 reg;
1023
1024 if (!list_empty(&ep->queue)) {
1025 struct fusb300_request *req;
1026
1027 req = list_first_entry(&ep->queue,
1028 struct fusb300_request, queue);
1029 if (req->req.length)
1030 fusb300_rdcxf(ep->fusb300, req->req.buf,
1031 req->req.length);
1032 done(ep, req, 0);
1033 reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGER1);
1034 reg &= ~FUSB300_IGER1_CX_OUT_INT;
1035 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_IGER1);
1036 } else
1037 pr_err("%s : empty queue\n", __func__);
1038 }
1039
1040 static void fusb300_ep0in(struct fusb300 *fusb300)
1041 {
1042 struct fusb300_request *req;
1043 struct fusb300_ep *ep = fusb300->ep[0];
1044
1045 if ((!list_empty(&ep->queue)) && (fusb300->ep0_dir)) {
1046 req = list_entry(ep->queue.next,
1047 struct fusb300_request, queue);
1048 if (req->req.length)
1049 fusb300_wrcxf(ep, req);
1050 if ((req->req.length - req->req.actual) < ep->ep.maxpacket)
1051 done(ep, req, 0);
1052 } else
1053 fusb300_set_cxdone(fusb300);
1054 }
1055
1056 static void fusb300_grp2_handler(void)
1057 {
1058 }
1059
1060 static void fusb300_grp3_handler(void)
1061 {
1062 }
1063
1064 static void fusb300_grp4_handler(void)
1065 {
1066 }
1067
1068 static void fusb300_grp5_handler(void)
1069 {
1070 }
1071
1072 static irqreturn_t fusb300_irq(int irq, void *_fusb300)
1073 {
1074 struct fusb300 *fusb300 = _fusb300;
1075 u32 int_grp1 = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
1076 u32 int_grp1_en = ioread32(fusb300->reg + FUSB300_OFFSET_IGER1);
1077 u32 int_grp0 = ioread32(fusb300->reg + FUSB300_OFFSET_IGR0);
1078 u32 int_grp0_en = ioread32(fusb300->reg + FUSB300_OFFSET_IGER0);
1079 struct usb_ctrlrequest ctrl;
1080 u8 in;
1081 u32 reg;
1082 int i;
1083
1084 spin_lock(&fusb300->lock);
1085
1086 int_grp1 &= int_grp1_en;
1087 int_grp0 &= int_grp0_en;
1088
1089 if (int_grp1 & FUSB300_IGR1_WARM_RST_INT) {
1090 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1091 FUSB300_IGR1_WARM_RST_INT);
1092 printk(KERN_INFO"fusb300_warmreset\n");
1093 fusb300_reset();
1094 }
1095
1096 if (int_grp1 & FUSB300_IGR1_HOT_RST_INT) {
1097 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1098 FUSB300_IGR1_HOT_RST_INT);
1099 printk(KERN_INFO"fusb300_hotreset\n");
1100 fusb300_reset();
1101 }
1102
1103 if (int_grp1 & FUSB300_IGR1_USBRST_INT) {
1104 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1105 FUSB300_IGR1_USBRST_INT);
1106 fusb300_reset();
1107 }
1108 /* COMABT_INT has a highest priority */
1109
1110 if (int_grp1 & FUSB300_IGR1_CX_COMABT_INT) {
1111 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1112 FUSB300_IGR1_CX_COMABT_INT);
1113 printk(KERN_INFO"fusb300_ep0abt\n");
1114 }
1115
1116 if (int_grp1 & FUSB300_IGR1_VBUS_CHG_INT) {
1117 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1118 FUSB300_IGR1_VBUS_CHG_INT);
1119 printk(KERN_INFO"fusb300_vbus_change\n");
1120 }
1121
1122 if (int_grp1 & FUSB300_IGR1_U3_EXIT_FAIL_INT) {
1123 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1124 FUSB300_IGR1_U3_EXIT_FAIL_INT);
1125 }
1126
1127 if (int_grp1 & FUSB300_IGR1_U2_EXIT_FAIL_INT) {
1128 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1129 FUSB300_IGR1_U2_EXIT_FAIL_INT);
1130 }
1131
1132 if (int_grp1 & FUSB300_IGR1_U1_EXIT_FAIL_INT) {
1133 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1134 FUSB300_IGR1_U1_EXIT_FAIL_INT);
1135 }
1136
1137 if (int_grp1 & FUSB300_IGR1_U2_ENTRY_FAIL_INT) {
1138 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1139 FUSB300_IGR1_U2_ENTRY_FAIL_INT);
1140 }
1141
1142 if (int_grp1 & FUSB300_IGR1_U1_ENTRY_FAIL_INT) {
1143 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1144 FUSB300_IGR1_U1_ENTRY_FAIL_INT);
1145 }
1146
1147 if (int_grp1 & FUSB300_IGR1_U3_EXIT_INT) {
1148 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1149 FUSB300_IGR1_U3_EXIT_INT);
1150 printk(KERN_INFO "FUSB300_IGR1_U3_EXIT_INT\n");
1151 }
1152
1153 if (int_grp1 & FUSB300_IGR1_U2_EXIT_INT) {
1154 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1155 FUSB300_IGR1_U2_EXIT_INT);
1156 printk(KERN_INFO "FUSB300_IGR1_U2_EXIT_INT\n");
1157 }
1158
1159 if (int_grp1 & FUSB300_IGR1_U1_EXIT_INT) {
1160 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1161 FUSB300_IGR1_U1_EXIT_INT);
1162 printk(KERN_INFO "FUSB300_IGR1_U1_EXIT_INT\n");
1163 }
1164
1165 if (int_grp1 & FUSB300_IGR1_U3_ENTRY_INT) {
1166 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1167 FUSB300_IGR1_U3_ENTRY_INT);
1168 printk(KERN_INFO "FUSB300_IGR1_U3_ENTRY_INT\n");
1169 fusb300_enable_bit(fusb300, FUSB300_OFFSET_SSCR1,
1170 FUSB300_SSCR1_GO_U3_DONE);
1171 }
1172
1173 if (int_grp1 & FUSB300_IGR1_U2_ENTRY_INT) {
1174 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1175 FUSB300_IGR1_U2_ENTRY_INT);
1176 printk(KERN_INFO "FUSB300_IGR1_U2_ENTRY_INT\n");
1177 }
1178
1179 if (int_grp1 & FUSB300_IGR1_U1_ENTRY_INT) {
1180 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1181 FUSB300_IGR1_U1_ENTRY_INT);
1182 printk(KERN_INFO "FUSB300_IGR1_U1_ENTRY_INT\n");
1183 }
1184
1185 if (int_grp1 & FUSB300_IGR1_RESM_INT) {
1186 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1187 FUSB300_IGR1_RESM_INT);
1188 printk(KERN_INFO "fusb300_resume\n");
1189 }
1190
1191 if (int_grp1 & FUSB300_IGR1_SUSP_INT) {
1192 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1193 FUSB300_IGR1_SUSP_INT);
1194 printk(KERN_INFO "fusb300_suspend\n");
1195 }
1196
1197 if (int_grp1 & FUSB300_IGR1_HS_LPM_INT) {
1198 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1199 FUSB300_IGR1_HS_LPM_INT);
1200 printk(KERN_INFO "fusb300_HS_LPM_INT\n");
1201 }
1202
1203 if (int_grp1 & FUSB300_IGR1_DEV_MODE_CHG_INT) {
1204 fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
1205 FUSB300_IGR1_DEV_MODE_CHG_INT);
1206 check_device_mode(fusb300);
1207 }
1208
1209 if (int_grp1 & FUSB300_IGR1_CX_COMFAIL_INT) {
1210 fusb300_set_cxstall(fusb300);
1211 printk(KERN_INFO "fusb300_ep0fail\n");
1212 }
1213
1214 if (int_grp1 & FUSB300_IGR1_CX_SETUP_INT) {
1215 printk(KERN_INFO "fusb300_ep0setup\n");
1216 if (setup_packet(fusb300, &ctrl)) {
1217 spin_unlock(&fusb300->lock);
1218 if (fusb300->driver->setup(&fusb300->gadget, &ctrl) < 0)
1219 fusb300_set_cxstall(fusb300);
1220 spin_lock(&fusb300->lock);
1221 }
1222 }
1223
1224 if (int_grp1 & FUSB300_IGR1_CX_CMDEND_INT)
1225 printk(KERN_INFO "fusb300_cmdend\n");
1226
1227
1228 if (int_grp1 & FUSB300_IGR1_CX_OUT_INT) {
1229 printk(KERN_INFO "fusb300_cxout\n");
1230 fusb300_ep0out(fusb300);
1231 }
1232
1233 if (int_grp1 & FUSB300_IGR1_CX_IN_INT) {
1234 printk(KERN_INFO "fusb300_cxin\n");
1235 fusb300_ep0in(fusb300);
1236 }
1237
1238 if (int_grp1 & FUSB300_IGR1_INTGRP5)
1239 fusb300_grp5_handler();
1240
1241 if (int_grp1 & FUSB300_IGR1_INTGRP4)
1242 fusb300_grp4_handler();
1243
1244 if (int_grp1 & FUSB300_IGR1_INTGRP3)
1245 fusb300_grp3_handler();
1246
1247 if (int_grp1 & FUSB300_IGR1_INTGRP2)
1248 fusb300_grp2_handler();
1249
1250 if (int_grp0) {
1251 for (i = 1; i < FUSB300_MAX_NUM_EP; i++) {
1252 if (int_grp0 & FUSB300_IGR0_EPn_FIFO_INT(i)) {
1253 reg = ioread32(fusb300->reg +
1254 FUSB300_OFFSET_EPSET1(i));
1255 in = (reg & FUSB300_EPSET1_DIRIN) ? 1 : 0;
1256 if (in)
1257 in_ep_fifo_handler(fusb300->ep[i]);
1258 else
1259 out_ep_fifo_handler(fusb300->ep[i]);
1260 }
1261 }
1262 }
1263
1264 spin_unlock(&fusb300->lock);
1265
1266 return IRQ_HANDLED;
1267 }
1268
1269 static void fusb300_set_u2_timeout(struct fusb300 *fusb300,
1270 u32 time)
1271 {
1272 u32 reg;
1273
1274 reg = ioread32(fusb300->reg + FUSB300_OFFSET_TT);
1275 reg &= ~0xff;
1276 reg |= FUSB300_SSCR2_U2TIMEOUT(time);
1277
1278 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_TT);
1279 }
1280
1281 static void fusb300_set_u1_timeout(struct fusb300 *fusb300,
1282 u32 time)
1283 {
1284 u32 reg;
1285
1286 reg = ioread32(fusb300->reg + FUSB300_OFFSET_TT);
1287 reg &= ~(0xff << 8);
1288 reg |= FUSB300_SSCR2_U1TIMEOUT(time);
1289
1290 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_TT);
1291 }
1292
1293 static void init_controller(struct fusb300 *fusb300)
1294 {
1295 u32 reg;
1296 u32 mask = 0;
1297 u32 val = 0;
1298
1299 /* split on */
1300 mask = val = FUSB300_AHBBCR_S0_SPLIT_ON | FUSB300_AHBBCR_S1_SPLIT_ON;
1301 reg = ioread32(fusb300->reg + FUSB300_OFFSET_AHBCR);
1302 reg &= ~mask;
1303 reg |= val;
1304 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_AHBCR);
1305
1306 /* enable high-speed LPM */
1307 mask = val = FUSB300_HSCR_HS_LPM_PERMIT;
1308 reg = ioread32(fusb300->reg + FUSB300_OFFSET_HSCR);
1309 reg &= ~mask;
1310 reg |= val;
1311 iowrite32(reg, fusb300->reg + FUSB300_OFFSET_HSCR);
1312
1313 /*set u1 u2 timmer*/
1314 fusb300_set_u2_timeout(fusb300, 0xff);
1315 fusb300_set_u1_timeout(fusb300, 0xff);
1316
1317 /* enable all grp1 interrupt */
1318 iowrite32(0xcfffff9f, fusb300->reg + FUSB300_OFFSET_IGER1);
1319 }
1320 /*------------------------------------------------------------------------*/
1321 static struct fusb300 *the_controller;
1322
1323 static int fusb300_udc_start(struct usb_gadget_driver *driver,
1324 int (*bind)(struct usb_gadget *))
1325 {
1326 struct fusb300 *fusb300 = the_controller;
1327 int retval;
1328
1329 if (!driver
1330 || driver->speed < USB_SPEED_FULL
1331 || !bind
1332 || !driver->setup)
1333 return -EINVAL;
1334
1335 if (!fusb300)
1336 return -ENODEV;
1337
1338 if (fusb300->driver)
1339 return -EBUSY;
1340
1341 /* hook up the driver */
1342 driver->driver.bus = NULL;
1343 fusb300->driver = driver;
1344 fusb300->gadget.dev.driver = &driver->driver;
1345
1346 retval = device_add(&fusb300->gadget.dev);
1347 if (retval) {
1348 pr_err("device_add error (%d)\n", retval);
1349 goto error;
1350 }
1351
1352 retval = bind(&fusb300->gadget);
1353 if (retval) {
1354 pr_err("bind to driver error (%d)\n", retval);
1355 device_del(&fusb300->gadget.dev);
1356 goto error;
1357 }
1358
1359 return 0;
1360
1361 error:
1362 fusb300->driver = NULL;
1363 fusb300->gadget.dev.driver = NULL;
1364
1365 return retval;
1366 }
1367
1368 static int fusb300_udc_stop(struct usb_gadget_driver *driver)
1369 {
1370 struct fusb300 *fusb300 = the_controller;
1371
1372 if (driver != fusb300->driver || !driver->unbind)
1373 return -EINVAL;
1374
1375 driver->unbind(&fusb300->gadget);
1376 fusb300->gadget.dev.driver = NULL;
1377
1378 init_controller(fusb300);
1379 device_del(&fusb300->gadget.dev);
1380 fusb300->driver = NULL;
1381
1382 return 0;
1383 }
1384 /*--------------------------------------------------------------------------*/
1385
1386 static int fusb300_udc_pullup(struct usb_gadget *_gadget, int is_active)
1387 {
1388 return 0;
1389 }
1390
1391 static struct usb_gadget_ops fusb300_gadget_ops = {
1392 .pullup = fusb300_udc_pullup,
1393 .start = fusb300_udc_start,
1394 .stop = fusb300_udc_stop,
1395 };
1396
1397 static int __exit fusb300_remove(struct platform_device *pdev)
1398 {
1399 struct fusb300 *fusb300 = dev_get_drvdata(&pdev->dev);
1400
1401 usb_del_gadget_udc(&fusb300->gadget);
1402 iounmap(fusb300->reg);
1403 free_irq(platform_get_irq(pdev, 0), fusb300);
1404
1405 fusb300_free_request(&fusb300->ep[0]->ep, fusb300->ep0_req);
1406 kfree(fusb300);
1407
1408 return 0;
1409 }
1410
1411 static int __init fusb300_probe(struct platform_device *pdev)
1412 {
1413 struct resource *res, *ires, *ires1;
1414 void __iomem *reg = NULL;
1415 struct fusb300 *fusb300 = NULL;
1416 struct fusb300_ep *_ep[FUSB300_MAX_NUM_EP];
1417 int ret = 0;
1418 int i;
1419
1420 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1421 if (!res) {
1422 ret = -ENODEV;
1423 pr_err("platform_get_resource error.\n");
1424 goto clean_up;
1425 }
1426
1427 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1428 if (!ires) {
1429 ret = -ENODEV;
1430 dev_err(&pdev->dev,
1431 "platform_get_resource IORESOURCE_IRQ error.\n");
1432 goto clean_up;
1433 }
1434
1435 ires1 = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
1436 if (!ires1) {
1437 ret = -ENODEV;
1438 dev_err(&pdev->dev,
1439 "platform_get_resource IORESOURCE_IRQ 1 error.\n");
1440 goto clean_up;
1441 }
1442
1443 reg = ioremap(res->start, resource_size(res));
1444 if (reg == NULL) {
1445 ret = -ENOMEM;
1446 pr_err("ioremap error.\n");
1447 goto clean_up;
1448 }
1449
1450 /* initialize udc */
1451 fusb300 = kzalloc(sizeof(struct fusb300), GFP_KERNEL);
1452 if (fusb300 == NULL) {
1453 pr_err("kzalloc error\n");
1454 goto clean_up;
1455 }
1456
1457 for (i = 0; i < FUSB300_MAX_NUM_EP; i++) {
1458 _ep[i] = kzalloc(sizeof(struct fusb300_ep), GFP_KERNEL);
1459 if (_ep[i] == NULL) {
1460 pr_err("_ep kzalloc error\n");
1461 goto clean_up;
1462 }
1463 fusb300->ep[i] = _ep[i];
1464 }
1465
1466 spin_lock_init(&fusb300->lock);
1467
1468 dev_set_drvdata(&pdev->dev, fusb300);
1469
1470 fusb300->gadget.ops = &fusb300_gadget_ops;
1471
1472 device_initialize(&fusb300->gadget.dev);
1473
1474 dev_set_name(&fusb300->gadget.dev, "gadget");
1475
1476 fusb300->gadget.is_dualspeed = 1;
1477 fusb300->gadget.dev.parent = &pdev->dev;
1478 fusb300->gadget.dev.dma_mask = pdev->dev.dma_mask;
1479 fusb300->gadget.dev.release = pdev->dev.release;
1480 fusb300->gadget.name = udc_name;
1481 fusb300->reg = reg;
1482
1483 ret = request_irq(ires->start, fusb300_irq, IRQF_DISABLED | IRQF_SHARED,
1484 udc_name, fusb300);
1485 if (ret < 0) {
1486 pr_err("request_irq error (%d)\n", ret);
1487 goto clean_up;
1488 }
1489
1490 ret = request_irq(ires1->start, fusb300_irq,
1491 IRQF_DISABLED | IRQF_SHARED, udc_name, fusb300);
1492 if (ret < 0) {
1493 pr_err("request_irq1 error (%d)\n", ret);
1494 goto clean_up;
1495 }
1496
1497 INIT_LIST_HEAD(&fusb300->gadget.ep_list);
1498
1499 for (i = 0; i < FUSB300_MAX_NUM_EP ; i++) {
1500 struct fusb300_ep *ep = fusb300->ep[i];
1501
1502 if (i != 0) {
1503 INIT_LIST_HEAD(&fusb300->ep[i]->ep.ep_list);
1504 list_add_tail(&fusb300->ep[i]->ep.ep_list,
1505 &fusb300->gadget.ep_list);
1506 }
1507 ep->fusb300 = fusb300;
1508 INIT_LIST_HEAD(&ep->queue);
1509 ep->ep.name = fusb300_ep_name[i];
1510 ep->ep.ops = &fusb300_ep_ops;
1511 ep->ep.maxpacket = HS_BULK_MAX_PACKET_SIZE;
1512 }
1513 fusb300->ep[0]->ep.maxpacket = HS_CTL_MAX_PACKET_SIZE;
1514 fusb300->ep[0]->epnum = 0;
1515 fusb300->gadget.ep0 = &fusb300->ep[0]->ep;
1516 INIT_LIST_HEAD(&fusb300->gadget.ep0->ep_list);
1517
1518 the_controller = fusb300;
1519
1520 fusb300->ep0_req = fusb300_alloc_request(&fusb300->ep[0]->ep,
1521 GFP_KERNEL);
1522 if (fusb300->ep0_req == NULL)
1523 goto clean_up3;
1524
1525 init_controller(fusb300);
1526 ret = usb_add_gadget_udc(&pdev->dev, &fusb300->gadget);
1527 if (ret)
1528 goto err_add_udc;
1529
1530 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
1531
1532 return 0;
1533 err_add_udc:
1534 fusb300_free_request(&fusb300->ep[0]->ep, fusb300->ep0_req);
1535
1536 clean_up3:
1537 free_irq(ires->start, fusb300);
1538
1539 clean_up:
1540 if (fusb300) {
1541 if (fusb300->ep0_req)
1542 fusb300_free_request(&fusb300->ep[0]->ep,
1543 fusb300->ep0_req);
1544 kfree(fusb300);
1545 }
1546 if (reg)
1547 iounmap(reg);
1548
1549 return ret;
1550 }
1551
1552 static struct platform_driver fusb300_driver = {
1553 .remove = __exit_p(fusb300_remove),
1554 .driver = {
1555 .name = (char *) udc_name,
1556 .owner = THIS_MODULE,
1557 },
1558 };
1559
1560 static int __init fusb300_udc_init(void)
1561 {
1562 return platform_driver_probe(&fusb300_driver, fusb300_probe);
1563 }
1564
1565 module_init(fusb300_udc_init);
1566
1567 static void __exit fusb300_udc_cleanup(void)
1568 {
1569 platform_driver_unregister(&fusb300_driver);
1570 }
1571 module_exit(fusb300_udc_cleanup);
linux-next