2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7 * Added support for Audigy 2 Value.
8 * Added EMU 1010 support.
9 * General bug fixes and enhancements.
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2 of the License, or
21 * (at your option) any later version.
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/interrupt.h>
39 #include <linux/pci.h>
40 #include <linux/slab.h>
41 #include <linux/vmalloc.h>
42 #include <linux/mutex.h>
45 #include <sound/core.h>
46 #include <sound/emu10k1.h>
47 #include <linux/firmware.h>
53 #define HANA_FILENAME "emu/hana.fw"
54 #define DOCK_FILENAME "emu/audio_dock.fw"
55 #define EMU1010B_FILENAME "emu/emu1010b.fw"
56 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
57 #define EMU0404_FILENAME "emu/emu0404.fw"
58 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
60 MODULE_FIRMWARE(HANA_FILENAME
);
61 MODULE_FIRMWARE(DOCK_FILENAME
);
62 MODULE_FIRMWARE(EMU1010B_FILENAME
);
63 MODULE_FIRMWARE(MICRO_DOCK_FILENAME
);
64 MODULE_FIRMWARE(EMU0404_FILENAME
);
65 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME
);
68 /*************************************************************************
70 *************************************************************************/
72 void snd_emu10k1_voice_init(struct snd_emu10k1
*emu
, int ch
)
74 snd_emu10k1_ptr_write(emu
, DCYSUSV
, ch
, 0);
75 snd_emu10k1_ptr_write(emu
, IP
, ch
, 0);
76 snd_emu10k1_ptr_write(emu
, VTFT
, ch
, 0xffff);
77 snd_emu10k1_ptr_write(emu
, CVCF
, ch
, 0xffff);
78 snd_emu10k1_ptr_write(emu
, PTRX
, ch
, 0);
79 snd_emu10k1_ptr_write(emu
, CPF
, ch
, 0);
80 snd_emu10k1_ptr_write(emu
, CCR
, ch
, 0);
82 snd_emu10k1_ptr_write(emu
, PSST
, ch
, 0);
83 snd_emu10k1_ptr_write(emu
, DSL
, ch
, 0x10);
84 snd_emu10k1_ptr_write(emu
, CCCA
, ch
, 0);
85 snd_emu10k1_ptr_write(emu
, Z1
, ch
, 0);
86 snd_emu10k1_ptr_write(emu
, Z2
, ch
, 0);
87 snd_emu10k1_ptr_write(emu
, FXRT
, ch
, 0x32100000);
89 snd_emu10k1_ptr_write(emu
, ATKHLDM
, ch
, 0);
90 snd_emu10k1_ptr_write(emu
, DCYSUSM
, ch
, 0);
91 snd_emu10k1_ptr_write(emu
, IFATN
, ch
, 0xffff);
92 snd_emu10k1_ptr_write(emu
, PEFE
, ch
, 0);
93 snd_emu10k1_ptr_write(emu
, FMMOD
, ch
, 0);
94 snd_emu10k1_ptr_write(emu
, TREMFRQ
, ch
, 24); /* 1 Hz */
95 snd_emu10k1_ptr_write(emu
, FM2FRQ2
, ch
, 24); /* 1 Hz */
96 snd_emu10k1_ptr_write(emu
, TEMPENV
, ch
, 0);
98 /*** these are last so OFF prevents writing ***/
99 snd_emu10k1_ptr_write(emu
, LFOVAL2
, ch
, 0);
100 snd_emu10k1_ptr_write(emu
, LFOVAL1
, ch
, 0);
101 snd_emu10k1_ptr_write(emu
, ATKHLDV
, ch
, 0);
102 snd_emu10k1_ptr_write(emu
, ENVVOL
, ch
, 0);
103 snd_emu10k1_ptr_write(emu
, ENVVAL
, ch
, 0);
105 /* Audigy extra stuffs */
107 snd_emu10k1_ptr_write(emu
, 0x4c, ch
, 0); /* ?? */
108 snd_emu10k1_ptr_write(emu
, 0x4d, ch
, 0); /* ?? */
109 snd_emu10k1_ptr_write(emu
, 0x4e, ch
, 0); /* ?? */
110 snd_emu10k1_ptr_write(emu
, 0x4f, ch
, 0); /* ?? */
111 snd_emu10k1_ptr_write(emu
, A_FXRT1
, ch
, 0x03020100);
112 snd_emu10k1_ptr_write(emu
, A_FXRT2
, ch
, 0x3f3f3f3f);
113 snd_emu10k1_ptr_write(emu
, A_SENDAMOUNTS
, ch
, 0);
117 static unsigned int spi_dac_init
[] = {
141 static unsigned int i2c_adc_init
[][2] = {
142 { 0x17, 0x00 }, /* Reset */
143 { 0x07, 0x00 }, /* Timeout */
144 { 0x0b, 0x22 }, /* Interface control */
145 { 0x0c, 0x22 }, /* Master mode control */
146 { 0x0d, 0x08 }, /* Powerdown control */
147 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
148 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
149 { 0x10, 0x7b }, /* ALC Control 1 */
150 { 0x11, 0x00 }, /* ALC Control 2 */
151 { 0x12, 0x32 }, /* ALC Control 3 */
152 { 0x13, 0x00 }, /* Noise gate control */
153 { 0x14, 0xa6 }, /* Limiter control */
154 { 0x15, ADC_MUX_2
}, /* ADC Mixer control. Mic for A2ZS Notebook */
157 static int snd_emu10k1_init(struct snd_emu10k1
*emu
, int enable_ir
, int resume
)
159 unsigned int silent_page
;
163 /* disable audio and lock cache */
164 outl(HCFG_LOCKSOUNDCACHE
| HCFG_LOCKTANKCACHE_MASK
|
165 HCFG_MUTEBUTTONENABLE
, emu
->port
+ HCFG
);
167 /* reset recording buffers */
168 snd_emu10k1_ptr_write(emu
, MICBS
, 0, ADCBS_BUFSIZE_NONE
);
169 snd_emu10k1_ptr_write(emu
, MICBA
, 0, 0);
170 snd_emu10k1_ptr_write(emu
, FXBS
, 0, ADCBS_BUFSIZE_NONE
);
171 snd_emu10k1_ptr_write(emu
, FXBA
, 0, 0);
172 snd_emu10k1_ptr_write(emu
, ADCBS
, 0, ADCBS_BUFSIZE_NONE
);
173 snd_emu10k1_ptr_write(emu
, ADCBA
, 0, 0);
175 /* disable channel interrupt */
176 outl(0, emu
->port
+ INTE
);
177 snd_emu10k1_ptr_write(emu
, CLIEL
, 0, 0);
178 snd_emu10k1_ptr_write(emu
, CLIEH
, 0, 0);
179 snd_emu10k1_ptr_write(emu
, SOLEL
, 0, 0);
180 snd_emu10k1_ptr_write(emu
, SOLEH
, 0, 0);
183 /* set SPDIF bypass mode */
184 snd_emu10k1_ptr_write(emu
, SPBYPASS
, 0, SPBYPASS_FORMAT
);
185 /* enable rear left + rear right AC97 slots */
186 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_REAR_RIGHT
|
190 /* init envelope engine */
191 for (ch
= 0; ch
< NUM_G
; ch
++)
192 snd_emu10k1_voice_init(emu
, ch
);
194 snd_emu10k1_ptr_write(emu
, SPCS0
, 0, emu
->spdif_bits
[0]);
195 snd_emu10k1_ptr_write(emu
, SPCS1
, 0, emu
->spdif_bits
[1]);
196 snd_emu10k1_ptr_write(emu
, SPCS2
, 0, emu
->spdif_bits
[2]);
198 if (emu
->card_capabilities
->ca0151_chip
) { /* audigy2 */
199 /* Hacks for Alice3 to work independent of haP16V driver */
200 /* Setup SRCMulti_I2S SamplingRate */
201 tmp
= snd_emu10k1_ptr_read(emu
, A_SPDIF_SAMPLERATE
, 0);
204 snd_emu10k1_ptr_write(emu
, A_SPDIF_SAMPLERATE
, 0, tmp
);
206 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
207 snd_emu10k1_ptr20_write(emu
, SRCSel
, 0, 0x14);
208 /* Setup SRCMulti Input Audio Enable */
209 /* Use 0xFFFFFFFF to enable P16V sounds. */
210 snd_emu10k1_ptr20_write(emu
, SRCMULTI_ENABLE
, 0, 0xFFFFFFFF);
212 /* Enabled Phased (8-channel) P16V playback */
213 outl(0x0201, emu
->port
+ HCFG2
);
214 /* Set playback routing. */
215 snd_emu10k1_ptr20_write(emu
, CAPTURE_P16V_SOURCE
, 0, 0x78e4);
217 if (emu
->card_capabilities
->ca0108_chip
) { /* audigy2 Value */
218 /* Hacks for Alice3 to work independent of haP16V driver */
219 snd_printk(KERN_INFO
"Audigy2 value: Special config.\n");
220 /* Setup SRCMulti_I2S SamplingRate */
221 tmp
= snd_emu10k1_ptr_read(emu
, A_SPDIF_SAMPLERATE
, 0);
224 snd_emu10k1_ptr_write(emu
, A_SPDIF_SAMPLERATE
, 0, tmp
);
226 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
227 outl(0x600000, emu
->port
+ 0x20);
228 outl(0x14, emu
->port
+ 0x24);
230 /* Setup SRCMulti Input Audio Enable */
231 outl(0x7b0000, emu
->port
+ 0x20);
232 outl(0xFF000000, emu
->port
+ 0x24);
234 /* Setup SPDIF Out Audio Enable */
235 /* The Audigy 2 Value has a separate SPDIF out,
236 * so no need for a mixer switch
238 outl(0x7a0000, emu
->port
+ 0x20);
239 outl(0xFF000000, emu
->port
+ 0x24);
240 tmp
= inl(emu
->port
+ A_IOCFG
) & ~0x8; /* Clear bit 3 */
241 outl(tmp
, emu
->port
+ A_IOCFG
);
243 if (emu
->card_capabilities
->spi_dac
) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
246 size
= ARRAY_SIZE(spi_dac_init
);
247 for (n
= 0; n
< size
; n
++)
248 snd_emu10k1_spi_write(emu
, spi_dac_init
[n
]);
250 snd_emu10k1_ptr20_write(emu
, 0x60, 0, 0x10);
253 * GPIO1: Speakers-enabled.
256 * GPIO4: IEC958 Output on.
261 outl(0x76, emu
->port
+ A_IOCFG
); /* Windows uses 0x3f76 */
263 if (emu
->card_capabilities
->i2c_adc
) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
266 snd_emu10k1_ptr20_write(emu
, P17V_I2S_SRC_SEL
, 0, 0x2020205f);
267 tmp
= inl(emu
->port
+ A_IOCFG
);
268 outl(tmp
| 0x4, emu
->port
+ A_IOCFG
); /* Set bit 2 for mic input */
269 tmp
= inl(emu
->port
+ A_IOCFG
);
270 size
= ARRAY_SIZE(i2c_adc_init
);
271 for (n
= 0; n
< size
; n
++)
272 snd_emu10k1_i2c_write(emu
, i2c_adc_init
[n
][0], i2c_adc_init
[n
][1]);
273 for (n
= 0; n
< 4; n
++) {
274 emu
->i2c_capture_volume
[n
][0] = 0xcf;
275 emu
->i2c_capture_volume
[n
][1] = 0xcf;
280 snd_emu10k1_ptr_write(emu
, PTB
, 0, emu
->ptb_pages
.addr
);
281 snd_emu10k1_ptr_write(emu
, TCB
, 0, 0); /* taken from original driver */
282 snd_emu10k1_ptr_write(emu
, TCBS
, 0, 4); /* taken from original driver */
284 silent_page
= (emu
->silent_page
.addr
<< 1) | MAP_PTI_MASK
;
285 for (ch
= 0; ch
< NUM_G
; ch
++) {
286 snd_emu10k1_ptr_write(emu
, MAPA
, ch
, silent_page
);
287 snd_emu10k1_ptr_write(emu
, MAPB
, ch
, silent_page
);
290 if (emu
->card_capabilities
->emu_model
) {
291 outl(HCFG_AUTOMUTE_ASYNC
|
293 HCFG_AUDIOENABLE
, emu
->port
+ HCFG
);
296 * Mute Disable Audio = 0
297 * Lock Tank Memory = 1
298 * Lock Sound Memory = 0
301 } else if (emu
->audigy
) {
302 if (emu
->revision
== 4) /* audigy2 */
303 outl(HCFG_AUDIOENABLE
|
304 HCFG_AC3ENABLE_CDSPDIF
|
305 HCFG_AC3ENABLE_GPSPDIF
|
306 HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
308 outl(HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
309 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
310 * e.g. card_capabilities->joystick */
311 } else if (emu
->model
== 0x20 ||
312 emu
->model
== 0xc400 ||
313 (emu
->model
== 0x21 && emu
->revision
< 6))
314 outl(HCFG_LOCKTANKCACHE_MASK
| HCFG_AUTOMUTE
, emu
->port
+ HCFG
);
316 /* With on-chip joystick */
317 outl(HCFG_LOCKTANKCACHE_MASK
| HCFG_AUTOMUTE
| HCFG_JOYENABLE
, emu
->port
+ HCFG
);
319 if (enable_ir
) { /* enable IR for SB Live */
320 if (emu
->card_capabilities
->emu_model
) {
321 ; /* Disable all access to A_IOCFG for the emu1010 */
322 } else if (emu
->card_capabilities
->i2c_adc
) {
323 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
324 } else if (emu
->audigy
) {
325 unsigned int reg
= inl(emu
->port
+ A_IOCFG
);
326 outl(reg
| A_IOCFG_GPOUT2
, emu
->port
+ A_IOCFG
);
328 outl(reg
| A_IOCFG_GPOUT1
| A_IOCFG_GPOUT2
, emu
->port
+ A_IOCFG
);
330 outl(reg
, emu
->port
+ A_IOCFG
);
332 unsigned int reg
= inl(emu
->port
+ HCFG
);
333 outl(reg
| HCFG_GPOUT2
, emu
->port
+ HCFG
);
335 outl(reg
| HCFG_GPOUT1
| HCFG_GPOUT2
, emu
->port
+ HCFG
);
337 outl(reg
, emu
->port
+ HCFG
);
341 if (emu
->card_capabilities
->emu_model
) {
342 ; /* Disable all access to A_IOCFG for the emu1010 */
343 } else if (emu
->card_capabilities
->i2c_adc
) {
344 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
345 } else if (emu
->audigy
) { /* enable analog output */
346 unsigned int reg
= inl(emu
->port
+ A_IOCFG
);
347 outl(reg
| A_IOCFG_GPOUT0
, emu
->port
+ A_IOCFG
);
353 static void snd_emu10k1_audio_enable(struct snd_emu10k1
*emu
)
356 * Enable the audio bit
358 outl(inl(emu
->port
+ HCFG
) | HCFG_AUDIOENABLE
, emu
->port
+ HCFG
);
360 /* Enable analog/digital outs on audigy */
361 if (emu
->card_capabilities
->emu_model
) {
362 ; /* Disable all access to A_IOCFG for the emu1010 */
363 } else if (emu
->card_capabilities
->i2c_adc
) {
364 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */
365 } else if (emu
->audigy
) {
366 outl(inl(emu
->port
+ A_IOCFG
) & ~0x44, emu
->port
+ A_IOCFG
);
368 if (emu
->card_capabilities
->ca0151_chip
) { /* audigy2 */
369 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
370 * This has to be done after init ALice3 I2SOut beyond 48KHz.
371 * So, sequence is important. */
372 outl(inl(emu
->port
+ A_IOCFG
) | 0x0040, emu
->port
+ A_IOCFG
);
373 } else if (emu
->card_capabilities
->ca0108_chip
) { /* audigy2 value */
374 /* Unmute Analog now. */
375 outl(inl(emu
->port
+ A_IOCFG
) | 0x0060, emu
->port
+ A_IOCFG
);
377 /* Disable routing from AC97 line out to Front speakers */
378 outl(inl(emu
->port
+ A_IOCFG
) | 0x0080, emu
->port
+ A_IOCFG
);
385 /* FIXME: the following routine disables LiveDrive-II !! */
386 /* TOSLink detection */
388 tmp
= inl(emu
->port
+ HCFG
);
389 if (tmp
& (HCFG_GPINPUT0
| HCFG_GPINPUT1
)) {
390 outl(tmp
|0x800, emu
->port
+ HCFG
);
392 if (tmp
!= (inl(emu
->port
+ HCFG
) & ~0x800)) {
394 outl(tmp
, emu
->port
+ HCFG
);
400 snd_emu10k1_intr_enable(emu
, INTE_PCIERRORENABLE
);
403 int snd_emu10k1_done(struct snd_emu10k1
*emu
)
407 outl(0, emu
->port
+ INTE
);
412 for (ch
= 0; ch
< NUM_G
; ch
++)
413 snd_emu10k1_ptr_write(emu
, DCYSUSV
, ch
, 0);
414 for (ch
= 0; ch
< NUM_G
; ch
++) {
415 snd_emu10k1_ptr_write(emu
, VTFT
, ch
, 0);
416 snd_emu10k1_ptr_write(emu
, CVCF
, ch
, 0);
417 snd_emu10k1_ptr_write(emu
, PTRX
, ch
, 0);
418 snd_emu10k1_ptr_write(emu
, CPF
, ch
, 0);
421 /* reset recording buffers */
422 snd_emu10k1_ptr_write(emu
, MICBS
, 0, 0);
423 snd_emu10k1_ptr_write(emu
, MICBA
, 0, 0);
424 snd_emu10k1_ptr_write(emu
, FXBS
, 0, 0);
425 snd_emu10k1_ptr_write(emu
, FXBA
, 0, 0);
426 snd_emu10k1_ptr_write(emu
, FXWC
, 0, 0);
427 snd_emu10k1_ptr_write(emu
, ADCBS
, 0, ADCBS_BUFSIZE_NONE
);
428 snd_emu10k1_ptr_write(emu
, ADCBA
, 0, 0);
429 snd_emu10k1_ptr_write(emu
, TCBS
, 0, TCBS_BUFFSIZE_16K
);
430 snd_emu10k1_ptr_write(emu
, TCB
, 0, 0);
432 snd_emu10k1_ptr_write(emu
, A_DBG
, 0, A_DBG_SINGLE_STEP
);
434 snd_emu10k1_ptr_write(emu
, DBG
, 0, EMU10K1_DBG_SINGLE_STEP
);
436 /* disable channel interrupt */
437 snd_emu10k1_ptr_write(emu
, CLIEL
, 0, 0);
438 snd_emu10k1_ptr_write(emu
, CLIEH
, 0, 0);
439 snd_emu10k1_ptr_write(emu
, SOLEL
, 0, 0);
440 snd_emu10k1_ptr_write(emu
, SOLEH
, 0, 0);
442 /* disable audio and lock cache */
443 outl(HCFG_LOCKSOUNDCACHE
| HCFG_LOCKTANKCACHE_MASK
| HCFG_MUTEBUTTONENABLE
, emu
->port
+ HCFG
);
444 snd_emu10k1_ptr_write(emu
, PTB
, 0, 0);
449 /*************************************************************************
450 * ECARD functional implementation
451 *************************************************************************/
453 /* In A1 Silicon, these bits are in the HC register */
454 #define HOOKN_BIT (1L << 12)
455 #define HANDN_BIT (1L << 11)
456 #define PULSEN_BIT (1L << 10)
458 #define EC_GDI1 (1 << 13)
459 #define EC_GDI0 (1 << 14)
461 #define EC_NUM_CONTROL_BITS 20
463 #define EC_AC3_DATA_SELN 0x0001L
464 #define EC_EE_DATA_SEL 0x0002L
465 #define EC_EE_CNTRL_SELN 0x0004L
466 #define EC_EECLK 0x0008L
467 #define EC_EECS 0x0010L
468 #define EC_EESDO 0x0020L
469 #define EC_TRIM_CSN 0x0040L
470 #define EC_TRIM_SCLK 0x0080L
471 #define EC_TRIM_SDATA 0x0100L
472 #define EC_TRIM_MUTEN 0x0200L
473 #define EC_ADCCAL 0x0400L
474 #define EC_ADCRSTN 0x0800L
475 #define EC_DACCAL 0x1000L
476 #define EC_DACMUTEN 0x2000L
477 #define EC_LEDN 0x4000L
479 #define EC_SPDIF0_SEL_SHIFT 15
480 #define EC_SPDIF1_SEL_SHIFT 17
481 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
482 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
483 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
484 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
485 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
486 * be incremented any time the EEPROM's
487 * format is changed. */
489 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
491 /* Addresses for special values stored in to EEPROM */
492 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
493 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
494 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
496 #define EC_LAST_PROMFILE_ADDR 0x2f
498 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
499 * can be up to 30 characters in length
500 * and is stored as a NULL-terminated
501 * ASCII string. Any unused bytes must be
502 * filled with zeros */
503 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
506 /* Most of this stuff is pretty self-evident. According to the hardware
507 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
508 * offset problem. Weird.
510 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
514 #define EC_DEFAULT_ADC_GAIN 0xC4C4
515 #define EC_DEFAULT_SPDIF0_SEL 0x0
516 #define EC_DEFAULT_SPDIF1_SEL 0x4
518 /**************************************************************************
519 * @func Clock bits into the Ecard's control latch. The Ecard uses a
520 * control latch will is loaded bit-serially by toggling the Modem control
521 * lines from function 2 on the E8010. This function hides these details
522 * and presents the illusion that we are actually writing to a distinct
526 static void snd_emu10k1_ecard_write(struct snd_emu10k1
*emu
, unsigned int value
)
528 unsigned short count
;
530 unsigned long hc_port
;
531 unsigned int hc_value
;
533 hc_port
= emu
->port
+ HCFG
;
534 hc_value
= inl(hc_port
) & ~(HOOKN_BIT
| HANDN_BIT
| PULSEN_BIT
);
535 outl(hc_value
, hc_port
);
537 for (count
= 0; count
< EC_NUM_CONTROL_BITS
; count
++) {
539 /* Set up the value */
540 data
= ((value
& 0x1) ? PULSEN_BIT
: 0);
543 outl(hc_value
| data
, hc_port
);
545 /* Clock the shift register */
546 outl(hc_value
| data
| HANDN_BIT
, hc_port
);
547 outl(hc_value
| data
, hc_port
);
551 outl(hc_value
| HOOKN_BIT
, hc_port
);
552 outl(hc_value
, hc_port
);
555 /**************************************************************************
556 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
557 * trim value consists of a 16bit value which is composed of two
558 * 8 bit gain/trim values, one for the left channel and one for the
559 * right channel. The following table maps from the Gain/Attenuation
560 * value in decibels into the corresponding bit pattern for a single
564 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1
*emu
,
569 /* Enable writing to the TRIM registers */
570 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
& ~EC_TRIM_CSN
);
572 /* Do it again to insure that we meet hold time requirements */
573 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
& ~EC_TRIM_CSN
);
575 for (bit
= (1 << 15); bit
; bit
>>= 1) {
578 value
= emu
->ecard_ctrl
& ~(EC_TRIM_CSN
| EC_TRIM_SDATA
);
581 value
|= EC_TRIM_SDATA
;
584 snd_emu10k1_ecard_write(emu
, value
);
585 snd_emu10k1_ecard_write(emu
, value
| EC_TRIM_SCLK
);
586 snd_emu10k1_ecard_write(emu
, value
);
589 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
);
592 static int snd_emu10k1_ecard_init(struct snd_emu10k1
*emu
)
594 unsigned int hc_value
;
596 /* Set up the initial settings */
597 emu
->ecard_ctrl
= EC_RAW_RUN_MODE
|
598 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL
) |
599 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL
);
601 /* Step 0: Set the codec type in the hardware control register
602 * and enable audio output */
603 hc_value
= inl(emu
->port
+ HCFG
);
604 outl(hc_value
| HCFG_AUDIOENABLE
| HCFG_CODECFORMAT_I2S
, emu
->port
+ HCFG
);
605 inl(emu
->port
+ HCFG
);
607 /* Step 1: Turn off the led and deassert TRIM_CS */
608 snd_emu10k1_ecard_write(emu
, EC_ADCCAL
| EC_LEDN
| EC_TRIM_CSN
);
610 /* Step 2: Calibrate the ADC and DAC */
611 snd_emu10k1_ecard_write(emu
, EC_DACCAL
| EC_LEDN
| EC_TRIM_CSN
);
613 /* Step 3: Wait for awhile; XXX We can't get away with this
614 * under a real operating system; we'll need to block and wait that
616 snd_emu10k1_wait(emu
, 48000);
618 /* Step 4: Switch off the DAC and ADC calibration. Note
619 * That ADC_CAL is actually an inverted signal, so we assert
620 * it here to stop calibration. */
621 snd_emu10k1_ecard_write(emu
, EC_ADCCAL
| EC_LEDN
| EC_TRIM_CSN
);
623 /* Step 4: Switch into run mode */
624 snd_emu10k1_ecard_write(emu
, emu
->ecard_ctrl
);
626 /* Step 5: Set the analog input gain */
627 snd_emu10k1_ecard_setadcgain(emu
, EC_DEFAULT_ADC_GAIN
);
632 static int snd_emu10k1_cardbus_init(struct snd_emu10k1
*emu
)
634 unsigned long special_port
;
637 /* Special initialisation routine
638 * before the rest of the IO-Ports become active.
640 special_port
= emu
->port
+ 0x38;
641 value
= inl(special_port
);
642 outl(0x00d00000, special_port
);
643 value
= inl(special_port
);
644 outl(0x00d00001, special_port
);
645 value
= inl(special_port
);
646 outl(0x00d0005f, special_port
);
647 value
= inl(special_port
);
648 outl(0x00d0007f, special_port
);
649 value
= inl(special_port
);
650 outl(0x0090007f, special_port
);
651 value
= inl(special_port
);
653 snd_emu10k1_ptr20_write(emu
, TINA2_VOLUME
, 0, 0xfefefefe); /* Defaults to 0x30303030 */
654 /* Delay to give time for ADC chip to switch on. It needs 113ms */
659 static int snd_emu1010_load_firmware(struct snd_emu10k1
*emu
, const char *filename
)
665 unsigned int write_post
;
667 const struct firmware
*fw_entry
;
669 err
= request_firmware(&fw_entry
, filename
, &emu
->pci
->dev
);
671 snd_printk(KERN_ERR
"firmware: %s not found. Err = %d\n", filename
, err
);
674 snd_printk(KERN_INFO
"firmware size = 0x%zx\n", fw_entry
->size
);
676 /* The FPGA is a Xilinx Spartan IIE XC2S50E */
677 /* GPIO7 -> FPGA PGMN
680 * FPGA CONFIG OFF -> FPGA PGMN
682 spin_lock_irqsave(&emu
->emu_lock
, flags
);
683 outl(0x00, emu
->port
+ A_IOCFG
); /* Set PGMN low for 1uS. */
684 write_post
= inl(emu
->port
+ A_IOCFG
);
686 outl(0x80, emu
->port
+ A_IOCFG
); /* Leave bit 7 set during netlist setup. */
687 write_post
= inl(emu
->port
+ A_IOCFG
);
688 udelay(100); /* Allow FPGA memory to clean */
689 for (n
= 0; n
< fw_entry
->size
; n
++) {
690 value
= fw_entry
->data
[n
];
691 for (i
= 0; i
< 8; i
++) {
696 outl(reg
, emu
->port
+ A_IOCFG
);
697 write_post
= inl(emu
->port
+ A_IOCFG
);
698 outl(reg
| 0x40, emu
->port
+ A_IOCFG
);
699 write_post
= inl(emu
->port
+ A_IOCFG
);
702 /* After programming, set GPIO bit 4 high again. */
703 outl(0x10, emu
->port
+ A_IOCFG
);
704 write_post
= inl(emu
->port
+ A_IOCFG
);
705 spin_unlock_irqrestore(&emu
->emu_lock
, flags
);
707 release_firmware(fw_entry
);
711 static int emu1010_firmware_thread(void *data
)
713 struct snd_emu10k1
*emu
= data
;
718 /* Delay to allow Audio Dock to settle */
719 msleep_interruptible(1000);
720 if (kthread_should_stop())
722 snd_emu1010_fpga_read(emu
, EMU_HANA_IRQ_STATUS
, &tmp
); /* IRQ Status */
723 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, ®
); /* OPTIONS: Which cards are attached to the EMU */
724 if (reg
& EMU_HANA_OPTION_DOCK_OFFLINE
) {
725 /* Audio Dock attached */
726 /* Return to Audio Dock programming mode */
727 snd_printk(KERN_INFO
"emu1010: Loading Audio Dock Firmware\n");
728 snd_emu1010_fpga_write(emu
, EMU_HANA_FPGA_CONFIG
, EMU_HANA_FPGA_CONFIG_AUDIODOCK
);
729 if (emu
->card_capabilities
->emu_model
==
731 err
= snd_emu1010_load_firmware(emu
, DOCK_FILENAME
);
734 } else if (emu
->card_capabilities
->emu_model
==
735 EMU_MODEL_EMU1010B
) {
736 err
= snd_emu1010_load_firmware(emu
, MICRO_DOCK_FILENAME
);
739 } else if (emu
->card_capabilities
->emu_model
==
741 err
= snd_emu1010_load_firmware(emu
, MICRO_DOCK_FILENAME
);
746 snd_emu1010_fpga_write(emu
, EMU_HANA_FPGA_CONFIG
, 0);
747 snd_emu1010_fpga_read(emu
, EMU_HANA_IRQ_STATUS
, ®
);
748 snd_printk(KERN_INFO
"emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg
);
749 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
750 snd_emu1010_fpga_read(emu
, EMU_HANA_ID
, ®
);
751 snd_printk(KERN_INFO
"emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg
);
752 if ((reg
& 0x1f) != 0x15) {
753 /* FPGA failed to be programmed */
754 snd_printk(KERN_INFO
"emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg
);
757 snd_printk(KERN_INFO
"emu1010: Audio Dock Firmware loaded\n");
758 snd_emu1010_fpga_read(emu
, EMU_DOCK_MAJOR_REV
, &tmp
);
759 snd_emu1010_fpga_read(emu
, EMU_DOCK_MINOR_REV
, &tmp2
);
760 snd_printk(KERN_INFO
"Audio Dock ver: %u.%u\n",
762 /* Sync clocking between 1010 and Dock */
763 /* Allow DLL to settle */
765 /* Unmute all. Default is muted after a firmware load */
766 snd_emu1010_fpga_write(emu
, EMU_HANA_UNMUTE
, EMU_UNMUTE
);
769 snd_printk(KERN_INFO
"emu1010: firmware thread stopping\n");
774 * EMU-1010 - details found out from this driver, official MS Win drivers,
777 * Audigy2 (aka Alice2):
778 * ---------------------
779 * * communication over PCI
780 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA
781 * to 2 x 16-bit, using internal DSP instructions
782 * * slave mode, clock supplied by HANA
783 * * linked to HANA using:
784 * 32 x 32-bit serial EMU32 output channels
785 * 16 x EMU32 input channels
786 * (?) x I2S I/O channels (?)
790 * * provides all (?) physical inputs and outputs of the card
791 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
792 * * provides clock signal for the card and Alice2
793 * * two crystals - for 44.1kHz and 48kHz multiples
794 * * provides internal routing of signal sources to signal destinations
795 * * inputs/outputs to Alice2 - see above
797 * Current status of the driver:
798 * ----------------------------
799 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
800 * * PCM device nb. 2:
801 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
802 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops
804 static int snd_emu10k1_emu1010_init(struct snd_emu10k1
*emu
)
809 const char *filename
= NULL
;
811 snd_printk(KERN_INFO
"emu1010: Special config.\n");
812 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
813 * Lock Sound Memory Cache, Lock Tank Memory Cache,
816 outl(0x0005a00c, emu
->port
+ HCFG
);
817 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
818 * Lock Tank Memory Cache,
821 outl(0x0005a004, emu
->port
+ HCFG
);
822 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
825 outl(0x0005a000, emu
->port
+ HCFG
);
826 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
829 outl(0x0005a000, emu
->port
+ HCFG
);
831 /* Disable 48Volt power to Audio Dock */
832 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_PWR
, 0);
834 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
835 snd_emu1010_fpga_read(emu
, EMU_HANA_ID
, ®
);
836 snd_printdd("reg1 = 0x%x\n", reg
);
837 if ((reg
& 0x3f) == 0x15) {
838 /* FPGA netlist already present so clear it */
839 /* Return to programming mode */
841 snd_emu1010_fpga_write(emu
, EMU_HANA_FPGA_CONFIG
, 0x02);
843 snd_emu1010_fpga_read(emu
, EMU_HANA_ID
, ®
);
844 snd_printdd("reg2 = 0x%x\n", reg
);
845 if ((reg
& 0x3f) == 0x15) {
846 /* FPGA failed to return to programming mode */
847 snd_printk(KERN_INFO
"emu1010: FPGA failed to return to programming mode\n");
850 snd_printk(KERN_INFO
"emu1010: EMU_HANA_ID = 0x%x\n", reg
);
851 switch (emu
->card_capabilities
->emu_model
) {
852 case EMU_MODEL_EMU1010
:
853 filename
= HANA_FILENAME
;
855 case EMU_MODEL_EMU1010B
:
856 filename
= EMU1010B_FILENAME
;
858 case EMU_MODEL_EMU1616
:
859 filename
= EMU1010_NOTEBOOK_FILENAME
;
861 case EMU_MODEL_EMU0404
:
862 filename
= EMU0404_FILENAME
;
869 snd_printk(KERN_INFO
"emu1010: filename %s testing\n", filename
);
870 err
= snd_emu1010_load_firmware(emu
, filename
);
873 KERN_INFO
"emu1010: Loading Firmware file %s failed\n",
878 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */
879 snd_emu1010_fpga_read(emu
, EMU_HANA_ID
, ®
);
880 if ((reg
& 0x3f) != 0x15) {
881 /* FPGA failed to be programmed */
882 snd_printk(KERN_INFO
"emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg
);
886 snd_printk(KERN_INFO
"emu1010: Hana Firmware loaded\n");
887 snd_emu1010_fpga_read(emu
, EMU_HANA_MAJOR_REV
, &tmp
);
888 snd_emu1010_fpga_read(emu
, EMU_HANA_MINOR_REV
, &tmp2
);
889 snd_printk(KERN_INFO
"emu1010: Hana version: %u.%u\n", tmp
, tmp2
);
890 /* Enable 48Volt power to Audio Dock */
891 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_PWR
, EMU_HANA_DOCK_PWR_ON
);
893 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, ®
);
894 snd_printk(KERN_INFO
"emu1010: Card options = 0x%x\n", reg
);
895 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, ®
);
896 snd_printk(KERN_INFO
"emu1010: Card options = 0x%x\n", reg
);
897 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTICAL_TYPE
, &tmp
);
898 /* Optical -> ADAT I/O */
902 emu
->emu1010
.optical_in
= 1; /* IN_ADAT */
903 emu
->emu1010
.optical_out
= 1; /* IN_ADAT */
905 tmp
= (emu
->emu1010
.optical_in
? EMU_HANA_OPTICAL_IN_ADAT
: 0) |
906 (emu
->emu1010
.optical_out
? EMU_HANA_OPTICAL_OUT_ADAT
: 0);
907 snd_emu1010_fpga_write(emu
, EMU_HANA_OPTICAL_TYPE
, tmp
);
908 snd_emu1010_fpga_read(emu
, EMU_HANA_ADC_PADS
, &tmp
);
909 /* Set no attenuation on Audio Dock pads. */
910 snd_emu1010_fpga_write(emu
, EMU_HANA_ADC_PADS
, 0x00);
911 emu
->emu1010
.adc_pads
= 0x00;
912 snd_emu1010_fpga_read(emu
, EMU_HANA_DOCK_MISC
, &tmp
);
913 /* Unmute Audio dock DACs, Headphone source DAC-4. */
914 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_MISC
, 0x30);
915 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_LEDS_2
, 0x12);
916 snd_emu1010_fpga_read(emu
, EMU_HANA_DAC_PADS
, &tmp
);
918 snd_emu1010_fpga_write(emu
, EMU_HANA_DAC_PADS
, 0x0f);
919 emu
->emu1010
.dac_pads
= 0x0f;
920 snd_emu1010_fpga_read(emu
, EMU_HANA_DOCK_MISC
, &tmp
);
921 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_MISC
, 0x30);
922 snd_emu1010_fpga_read(emu
, EMU_HANA_SPDIF_MODE
, &tmp
);
923 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */
924 snd_emu1010_fpga_write(emu
, EMU_HANA_SPDIF_MODE
, 0x10);
926 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_IN
, 0x19);
928 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_OUT
, 0x0c);
929 /* IRQ Enable: All on */
930 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
931 /* IRQ Enable: All off */
932 snd_emu1010_fpga_write(emu
, EMU_HANA_IRQ_ENABLE
, 0x00);
934 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, ®
);
935 snd_printk(KERN_INFO
"emu1010: Card options3 = 0x%x\n", reg
);
936 /* Default WCLK set to 48kHz. */
937 snd_emu1010_fpga_write(emu
, EMU_HANA_DEFCLOCK
, 0x00);
938 /* Word Clock source, Internal 48kHz x1 */
939 snd_emu1010_fpga_write(emu
, EMU_HANA_WCLOCK
, EMU_HANA_WCLOCK_INT_48K
);
940 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
941 /* Audio Dock LEDs. */
942 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_LEDS_2
, 0x12);
946 snd_emu1010_fpga_link_dst_src_write(emu
,
947 EMU_DST_ALICE2_EMU32_0
, EMU_SRC_HAMOA_ADC_LEFT1
);
948 snd_emu1010_fpga_link_dst_src_write(emu
,
949 EMU_DST_ALICE2_EMU32_1
, EMU_SRC_HAMOA_ADC_RIGHT1
);
950 snd_emu1010_fpga_link_dst_src_write(emu
,
951 EMU_DST_ALICE2_EMU32_4
, EMU_SRC_HAMOA_ADC_LEFT2
);
952 snd_emu1010_fpga_link_dst_src_write(emu
,
953 EMU_DST_ALICE2_EMU32_5
, EMU_SRC_HAMOA_ADC_RIGHT2
);
957 snd_emu1010_fpga_link_dst_src_write(emu
,
958 EMU_DST_ALICE2_EMU32_0
, EMU_SRC_HAMOA_ADC_LEFT1
);
959 snd_emu1010_fpga_link_dst_src_write(emu
,
960 EMU_DST_ALICE2_EMU32_1
, EMU_SRC_HAMOA_ADC_RIGHT1
);
961 snd_emu1010_fpga_link_dst_src_write(emu
,
962 EMU_DST_ALICE2_EMU32_2
, EMU_SRC_HAMOA_ADC_LEFT2
);
963 snd_emu1010_fpga_link_dst_src_write(emu
,
964 EMU_DST_ALICE2_EMU32_3
, EMU_SRC_HAMOA_ADC_RIGHT2
);
965 snd_emu1010_fpga_link_dst_src_write(emu
,
966 EMU_DST_ALICE2_EMU32_4
, EMU_SRC_HAMOA_ADC_LEFT3
);
967 snd_emu1010_fpga_link_dst_src_write(emu
,
968 EMU_DST_ALICE2_EMU32_5
, EMU_SRC_HAMOA_ADC_RIGHT3
);
969 snd_emu1010_fpga_link_dst_src_write(emu
,
970 EMU_DST_ALICE2_EMU32_6
, EMU_SRC_HAMOA_ADC_LEFT4
);
971 snd_emu1010_fpga_link_dst_src_write(emu
,
972 EMU_DST_ALICE2_EMU32_7
, EMU_SRC_HAMOA_ADC_RIGHT4
);
976 snd_emu1010_fpga_link_dst_src_write(emu
,
977 EMU_DST_ALICE2_EMU32_0
, EMU_SRC_DOCK_MIC_A1
);
978 snd_emu1010_fpga_link_dst_src_write(emu
,
979 EMU_DST_ALICE2_EMU32_1
, EMU_SRC_DOCK_MIC_B1
);
980 snd_emu1010_fpga_link_dst_src_write(emu
,
981 EMU_DST_ALICE2_EMU32_2
, EMU_SRC_HAMOA_ADC_LEFT2
);
982 snd_emu1010_fpga_link_dst_src_write(emu
,
983 EMU_DST_ALICE2_EMU32_3
, EMU_SRC_HAMOA_ADC_LEFT2
);
984 snd_emu1010_fpga_link_dst_src_write(emu
,
985 EMU_DST_ALICE2_EMU32_4
, EMU_SRC_DOCK_ADC1_LEFT1
);
986 snd_emu1010_fpga_link_dst_src_write(emu
,
987 EMU_DST_ALICE2_EMU32_5
, EMU_SRC_DOCK_ADC1_RIGHT1
);
988 snd_emu1010_fpga_link_dst_src_write(emu
,
989 EMU_DST_ALICE2_EMU32_6
, EMU_SRC_DOCK_ADC2_LEFT1
);
990 snd_emu1010_fpga_link_dst_src_write(emu
,
991 EMU_DST_ALICE2_EMU32_7
, EMU_SRC_DOCK_ADC2_RIGHT1
);
992 /* Pavel Hofman - setting defaults for 8 more capture channels
993 * Defaults only, users will set their own values anyways, let's
997 snd_emu1010_fpga_link_dst_src_write(emu
,
998 EMU_DST_ALICE2_EMU32_8
, EMU_SRC_DOCK_MIC_A1
);
999 snd_emu1010_fpga_link_dst_src_write(emu
,
1000 EMU_DST_ALICE2_EMU32_9
, EMU_SRC_DOCK_MIC_B1
);
1001 snd_emu1010_fpga_link_dst_src_write(emu
,
1002 EMU_DST_ALICE2_EMU32_A
, EMU_SRC_HAMOA_ADC_LEFT2
);
1003 snd_emu1010_fpga_link_dst_src_write(emu
,
1004 EMU_DST_ALICE2_EMU32_B
, EMU_SRC_HAMOA_ADC_LEFT2
);
1005 snd_emu1010_fpga_link_dst_src_write(emu
,
1006 EMU_DST_ALICE2_EMU32_C
, EMU_SRC_DOCK_ADC1_LEFT1
);
1007 snd_emu1010_fpga_link_dst_src_write(emu
,
1008 EMU_DST_ALICE2_EMU32_D
, EMU_SRC_DOCK_ADC1_RIGHT1
);
1009 snd_emu1010_fpga_link_dst_src_write(emu
,
1010 EMU_DST_ALICE2_EMU32_E
, EMU_SRC_DOCK_ADC2_LEFT1
);
1011 snd_emu1010_fpga_link_dst_src_write(emu
,
1012 EMU_DST_ALICE2_EMU32_F
, EMU_SRC_DOCK_ADC2_RIGHT1
);
1016 snd_emu1010_fpga_link_dst_src_write(emu
,
1017 EMU_DST_ALICE2_EMU32_4
, EMU_SRC_HANA_ADAT
);
1018 snd_emu1010_fpga_link_dst_src_write(emu
,
1019 EMU_DST_ALICE2_EMU32_5
, EMU_SRC_HANA_ADAT
+ 1);
1020 snd_emu1010_fpga_link_dst_src_write(emu
,
1021 EMU_DST_ALICE2_EMU32_6
, EMU_SRC_HANA_ADAT
+ 2);
1022 snd_emu1010_fpga_link_dst_src_write(emu
,
1023 EMU_DST_ALICE2_EMU32_7
, EMU_SRC_HANA_ADAT
+ 3);
1024 snd_emu1010_fpga_link_dst_src_write(emu
,
1025 EMU_DST_ALICE2_EMU32_8
, EMU_SRC_HANA_ADAT
+ 4);
1026 snd_emu1010_fpga_link_dst_src_write(emu
,
1027 EMU_DST_ALICE2_EMU32_9
, EMU_SRC_HANA_ADAT
+ 5);
1028 snd_emu1010_fpga_link_dst_src_write(emu
,
1029 EMU_DST_ALICE2_EMU32_A
, EMU_SRC_HANA_ADAT
+ 6);
1030 snd_emu1010_fpga_link_dst_src_write(emu
,
1031 EMU_DST_ALICE2_EMU32_B
, EMU_SRC_HANA_ADAT
+ 7);
1032 snd_emu1010_fpga_link_dst_src_write(emu
,
1033 EMU_DST_ALICE2_EMU32_C
, EMU_SRC_DOCK_MIC_A1
);
1034 snd_emu1010_fpga_link_dst_src_write(emu
,
1035 EMU_DST_ALICE2_EMU32_D
, EMU_SRC_DOCK_MIC_B1
);
1036 snd_emu1010_fpga_link_dst_src_write(emu
,
1037 EMU_DST_ALICE2_EMU32_E
, EMU_SRC_HAMOA_ADC_LEFT2
);
1038 snd_emu1010_fpga_link_dst_src_write(emu
,
1039 EMU_DST_ALICE2_EMU32_F
, EMU_SRC_HAMOA_ADC_LEFT2
);
1041 for (i
= 0; i
< 0x20; i
++) {
1042 /* AudioDock Elink <- Silence */
1043 snd_emu1010_fpga_link_dst_src_write(emu
, 0x0100 + i
, EMU_SRC_SILENCE
);
1045 for (i
= 0; i
< 4; i
++) {
1046 /* Hana SPDIF Out <- Silence */
1047 snd_emu1010_fpga_link_dst_src_write(emu
, 0x0200 + i
, EMU_SRC_SILENCE
);
1049 for (i
= 0; i
< 7; i
++) {
1050 /* Hamoa DAC <- Silence */
1051 snd_emu1010_fpga_link_dst_src_write(emu
, 0x0300 + i
, EMU_SRC_SILENCE
);
1053 for (i
= 0; i
< 7; i
++) {
1054 /* Hana ADAT Out <- Silence */
1055 snd_emu1010_fpga_link_dst_src_write(emu
, EMU_DST_HANA_ADAT
+ i
, EMU_SRC_SILENCE
);
1057 snd_emu1010_fpga_link_dst_src_write(emu
,
1058 EMU_DST_ALICE_I2S0_LEFT
, EMU_SRC_DOCK_ADC1_LEFT1
);
1059 snd_emu1010_fpga_link_dst_src_write(emu
,
1060 EMU_DST_ALICE_I2S0_RIGHT
, EMU_SRC_DOCK_ADC1_RIGHT1
);
1061 snd_emu1010_fpga_link_dst_src_write(emu
,
1062 EMU_DST_ALICE_I2S1_LEFT
, EMU_SRC_DOCK_ADC2_LEFT1
);
1063 snd_emu1010_fpga_link_dst_src_write(emu
,
1064 EMU_DST_ALICE_I2S1_RIGHT
, EMU_SRC_DOCK_ADC2_RIGHT1
);
1065 snd_emu1010_fpga_link_dst_src_write(emu
,
1066 EMU_DST_ALICE_I2S2_LEFT
, EMU_SRC_DOCK_ADC3_LEFT1
);
1067 snd_emu1010_fpga_link_dst_src_write(emu
,
1068 EMU_DST_ALICE_I2S2_RIGHT
, EMU_SRC_DOCK_ADC3_RIGHT1
);
1069 snd_emu1010_fpga_write(emu
, EMU_HANA_UNMUTE
, 0x01); /* Unmute all */
1071 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, &tmp
);
1073 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1074 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1077 outl(0x0000a000, emu
->port
+ HCFG
);
1078 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1079 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1080 * Un-Mute all codecs.
1082 outl(0x0000a001, emu
->port
+ HCFG
);
1084 /* Initial boot complete. Now patches */
1086 snd_emu1010_fpga_read(emu
, EMU_HANA_OPTION_CARDS
, &tmp
);
1087 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_IN
, 0x19); /* MIDI Route */
1088 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_OUT
, 0x0c); /* Unknown */
1089 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_IN
, 0x19); /* MIDI Route */
1090 snd_emu1010_fpga_write(emu
, EMU_HANA_MIDI_OUT
, 0x0c); /* Unknown */
1091 snd_emu1010_fpga_read(emu
, EMU_HANA_SPDIF_MODE
, &tmp
);
1092 snd_emu1010_fpga_write(emu
, EMU_HANA_SPDIF_MODE
, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */
1094 /* Start Micro/Audio Dock firmware loader thread */
1095 if (!emu
->emu1010
.firmware_thread
) {
1096 emu
->emu1010
.firmware_thread
=
1097 kthread_create(emu1010_firmware_thread
, emu
,
1098 "emu1010_firmware");
1099 wake_up_process(emu
->emu1010
.firmware_thread
);
1103 snd_emu1010_fpga_link_dst_src_write(emu
,
1104 EMU_DST_HAMOA_DAC_LEFT1
, EMU_SRC_ALICE_EMU32B
+ 2); /* ALICE2 bus 0xa2 */
1105 snd_emu1010_fpga_link_dst_src_write(emu
,
1106 EMU_DST_HAMOA_DAC_RIGHT1
, EMU_SRC_ALICE_EMU32B
+ 3); /* ALICE2 bus 0xa3 */
1107 snd_emu1010_fpga_link_dst_src_write(emu
,
1108 EMU_DST_HANA_SPDIF_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 2); /* ALICE2 bus 0xb2 */
1109 snd_emu1010_fpga_link_dst_src_write(emu
,
1110 EMU_DST_HANA_SPDIF_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 3); /* ALICE2 bus 0xb3 */
1112 /* Default outputs */
1113 if (emu
->card_capabilities
->emu_model
== EMU_MODEL_EMU1616
) {
1114 /* 1616(M) cardbus default outputs */
1115 /* ALICE2 bus 0xa0 */
1116 snd_emu1010_fpga_link_dst_src_write(emu
,
1117 EMU_DST_DOCK_DAC1_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 0);
1118 emu
->emu1010
.output_source
[0] = 17;
1119 snd_emu1010_fpga_link_dst_src_write(emu
,
1120 EMU_DST_DOCK_DAC1_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 1);
1121 emu
->emu1010
.output_source
[1] = 18;
1122 snd_emu1010_fpga_link_dst_src_write(emu
,
1123 EMU_DST_DOCK_DAC2_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 2);
1124 emu
->emu1010
.output_source
[2] = 19;
1125 snd_emu1010_fpga_link_dst_src_write(emu
,
1126 EMU_DST_DOCK_DAC2_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 3);
1127 emu
->emu1010
.output_source
[3] = 20;
1128 snd_emu1010_fpga_link_dst_src_write(emu
,
1129 EMU_DST_DOCK_DAC3_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 4);
1130 emu
->emu1010
.output_source
[4] = 21;
1131 snd_emu1010_fpga_link_dst_src_write(emu
,
1132 EMU_DST_DOCK_DAC3_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 5);
1133 emu
->emu1010
.output_source
[5] = 22;
1134 /* ALICE2 bus 0xa0 */
1135 snd_emu1010_fpga_link_dst_src_write(emu
,
1136 EMU_DST_MANA_DAC_LEFT
, EMU_SRC_ALICE_EMU32A
+ 0);
1137 emu
->emu1010
.output_source
[16] = 17;
1138 snd_emu1010_fpga_link_dst_src_write(emu
,
1139 EMU_DST_MANA_DAC_RIGHT
, EMU_SRC_ALICE_EMU32A
+ 1);
1140 emu
->emu1010
.output_source
[17] = 18;
1142 /* ALICE2 bus 0xa0 */
1143 snd_emu1010_fpga_link_dst_src_write(emu
,
1144 EMU_DST_DOCK_DAC1_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 0);
1145 emu
->emu1010
.output_source
[0] = 21;
1146 snd_emu1010_fpga_link_dst_src_write(emu
,
1147 EMU_DST_DOCK_DAC1_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 1);
1148 emu
->emu1010
.output_source
[1] = 22;
1149 snd_emu1010_fpga_link_dst_src_write(emu
,
1150 EMU_DST_DOCK_DAC2_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 2);
1151 emu
->emu1010
.output_source
[2] = 23;
1152 snd_emu1010_fpga_link_dst_src_write(emu
,
1153 EMU_DST_DOCK_DAC2_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 3);
1154 emu
->emu1010
.output_source
[3] = 24;
1155 snd_emu1010_fpga_link_dst_src_write(emu
,
1156 EMU_DST_DOCK_DAC3_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 4);
1157 emu
->emu1010
.output_source
[4] = 25;
1158 snd_emu1010_fpga_link_dst_src_write(emu
,
1159 EMU_DST_DOCK_DAC3_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 5);
1160 emu
->emu1010
.output_source
[5] = 26;
1161 snd_emu1010_fpga_link_dst_src_write(emu
,
1162 EMU_DST_DOCK_DAC4_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 6);
1163 emu
->emu1010
.output_source
[6] = 27;
1164 snd_emu1010_fpga_link_dst_src_write(emu
,
1165 EMU_DST_DOCK_DAC4_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 7);
1166 emu
->emu1010
.output_source
[7] = 28;
1167 /* ALICE2 bus 0xa0 */
1168 snd_emu1010_fpga_link_dst_src_write(emu
,
1169 EMU_DST_DOCK_PHONES_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 0);
1170 emu
->emu1010
.output_source
[8] = 21;
1171 snd_emu1010_fpga_link_dst_src_write(emu
,
1172 EMU_DST_DOCK_PHONES_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 1);
1173 emu
->emu1010
.output_source
[9] = 22;
1174 /* ALICE2 bus 0xa0 */
1175 snd_emu1010_fpga_link_dst_src_write(emu
,
1176 EMU_DST_DOCK_SPDIF_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 0);
1177 emu
->emu1010
.output_source
[10] = 21;
1178 snd_emu1010_fpga_link_dst_src_write(emu
,
1179 EMU_DST_DOCK_SPDIF_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 1);
1180 emu
->emu1010
.output_source
[11] = 22;
1181 /* ALICE2 bus 0xa0 */
1182 snd_emu1010_fpga_link_dst_src_write(emu
,
1183 EMU_DST_HANA_SPDIF_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 0);
1184 emu
->emu1010
.output_source
[12] = 21;
1185 snd_emu1010_fpga_link_dst_src_write(emu
,
1186 EMU_DST_HANA_SPDIF_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 1);
1187 emu
->emu1010
.output_source
[13] = 22;
1188 /* ALICE2 bus 0xa0 */
1189 snd_emu1010_fpga_link_dst_src_write(emu
,
1190 EMU_DST_HAMOA_DAC_LEFT1
, EMU_SRC_ALICE_EMU32A
+ 0);
1191 emu
->emu1010
.output_source
[14] = 21;
1192 snd_emu1010_fpga_link_dst_src_write(emu
,
1193 EMU_DST_HAMOA_DAC_RIGHT1
, EMU_SRC_ALICE_EMU32A
+ 1);
1194 emu
->emu1010
.output_source
[15] = 22;
1195 /* ALICE2 bus 0xa0 */
1196 snd_emu1010_fpga_link_dst_src_write(emu
,
1197 EMU_DST_HANA_ADAT
, EMU_SRC_ALICE_EMU32A
+ 0);
1198 emu
->emu1010
.output_source
[16] = 21;
1199 snd_emu1010_fpga_link_dst_src_write(emu
,
1200 EMU_DST_HANA_ADAT
+ 1, EMU_SRC_ALICE_EMU32A
+ 1);
1201 emu
->emu1010
.output_source
[17] = 22;
1202 snd_emu1010_fpga_link_dst_src_write(emu
,
1203 EMU_DST_HANA_ADAT
+ 2, EMU_SRC_ALICE_EMU32A
+ 2);
1204 emu
->emu1010
.output_source
[18] = 23;
1205 snd_emu1010_fpga_link_dst_src_write(emu
,
1206 EMU_DST_HANA_ADAT
+ 3, EMU_SRC_ALICE_EMU32A
+ 3);
1207 emu
->emu1010
.output_source
[19] = 24;
1208 snd_emu1010_fpga_link_dst_src_write(emu
,
1209 EMU_DST_HANA_ADAT
+ 4, EMU_SRC_ALICE_EMU32A
+ 4);
1210 emu
->emu1010
.output_source
[20] = 25;
1211 snd_emu1010_fpga_link_dst_src_write(emu
,
1212 EMU_DST_HANA_ADAT
+ 5, EMU_SRC_ALICE_EMU32A
+ 5);
1213 emu
->emu1010
.output_source
[21] = 26;
1214 snd_emu1010_fpga_link_dst_src_write(emu
,
1215 EMU_DST_HANA_ADAT
+ 6, EMU_SRC_ALICE_EMU32A
+ 6);
1216 emu
->emu1010
.output_source
[22] = 27;
1217 snd_emu1010_fpga_link_dst_src_write(emu
,
1218 EMU_DST_HANA_ADAT
+ 7, EMU_SRC_ALICE_EMU32A
+ 7);
1219 emu
->emu1010
.output_source
[23] = 28;
1221 /* TEMP: Select SPDIF in/out */
1222 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1224 /* TEMP: Select 48kHz SPDIF out */
1225 snd_emu1010_fpga_write(emu
, EMU_HANA_UNMUTE
, 0x0); /* Mute all */
1226 snd_emu1010_fpga_write(emu
, EMU_HANA_DEFCLOCK
, 0x0); /* Default fallback clock 48kHz */
1227 /* Word Clock source, Internal 48kHz x1 */
1228 snd_emu1010_fpga_write(emu
, EMU_HANA_WCLOCK
, EMU_HANA_WCLOCK_INT_48K
);
1229 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1230 emu
->emu1010
.internal_clock
= 1; /* 48000 */
1231 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_LEDS_2
, 0x12); /* Set LEDs on Audio Dock */
1232 snd_emu1010_fpga_write(emu
, EMU_HANA_UNMUTE
, 0x1); /* Unmute all */
1233 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1234 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1235 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1240 * Create the EMU10K1 instance
1244 static int alloc_pm_buffer(struct snd_emu10k1
*emu
);
1245 static void free_pm_buffer(struct snd_emu10k1
*emu
);
1248 static int snd_emu10k1_free(struct snd_emu10k1
*emu
)
1250 if (emu
->port
) { /* avoid access to already used hardware */
1251 snd_emu10k1_fx8010_tram_setup(emu
, 0);
1252 snd_emu10k1_done(emu
);
1253 snd_emu10k1_free_efx(emu
);
1255 if (emu
->card_capabilities
->emu_model
== EMU_MODEL_EMU1010
) {
1256 /* Disable 48Volt power to Audio Dock */
1257 snd_emu1010_fpga_write(emu
, EMU_HANA_DOCK_PWR
, 0);
1259 if (emu
->emu1010
.firmware_thread
)
1260 kthread_stop(emu
->emu1010
.firmware_thread
);
1262 free_irq(emu
->irq
, emu
);
1263 /* remove reserved page */
1264 if (emu
->reserved_page
) {
1265 snd_emu10k1_synth_free(emu
,
1266 (struct snd_util_memblk
*)emu
->reserved_page
);
1267 emu
->reserved_page
= NULL
;
1270 snd_util_memhdr_free(emu
->memhdr
);
1271 if (emu
->silent_page
.area
)
1272 snd_dma_free_pages(&emu
->silent_page
);
1273 if (emu
->ptb_pages
.area
)
1274 snd_dma_free_pages(&emu
->ptb_pages
);
1275 vfree(emu
->page_ptr_table
);
1276 vfree(emu
->page_addr_table
);
1278 free_pm_buffer(emu
);
1281 pci_release_regions(emu
->pci
);
1282 if (emu
->card_capabilities
->ca0151_chip
) /* P16V */
1284 pci_disable_device(emu
->pci
);
1289 static int snd_emu10k1_dev_free(struct snd_device
*device
)
1291 struct snd_emu10k1
*emu
= device
->device_data
;
1292 return snd_emu10k1_free(emu
);
1295 static struct snd_emu_chip_details emu_chip_details
[] = {
1296 /* Audigy4 (Not PRO) SB0610 */
1297 /* Tested by James@superbug.co.uk 4th April 2006 */
1303 * 3: 0 - Digital Out, 1 - Line in
1311 * A: Green jack sense (Front)
1313 * C: Black jack sense (Rear/Side Right)
1314 * D: Yellow jack sense (Center/LFE/Side Left)
1318 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1322 /* Mic input not tested.
1323 * Analog CD input not tested
1324 * Digital Out not tested.
1326 * Audio output 5.1 working. Side outputs not working.
1328 /* DSP: CA10300-IAT LF
1329 * DAC: Cirrus Logic CS4382-KQZ
1330 * ADC: Philips 1361T
1331 * AC97: Sigmatel STAC9750
1334 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x10211102,
1335 .driver
= "Audigy2", .name
= "SB Audigy 4 [SB0610]",
1340 .adc_1361t
= 1, /* 24 bit capture instead of 16bit */
1342 /* Audigy 2 Value AC3 out does not work yet.
1343 * Need to find out how to turn off interpolators.
1345 /* Tested by James@superbug.co.uk 3rd July 2005 */
1348 * ADC: Philips 1361T
1352 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x10011102,
1353 .driver
= "Audigy2", .name
= "SB Audigy 2 Value [SB0400]",
1359 /* Audigy 2 ZS Notebook Cardbus card.*/
1360 /* Tested by James@superbug.co.uk 6th November 2006 */
1361 /* Audio output 7.1/Headphones working.
1362 * Digital output working. (AC3 not checked, only PCM)
1363 * Audio Mic/Line inputs working.
1364 * Digital input not tested.
1367 * DAC: Wolfson WM8768/WM8568
1368 * ADC: Wolfson WM8775
1372 /* Tested by James@superbug.co.uk 4th April 2006 */
1376 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1377 * 2: Analog input 0 = line in, 1 = mic in
1379 * 4: Digital output 0 = off, 1 = on.
1384 * All bits 1 (0x3fxx) means nothing plugged in.
1385 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1386 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1387 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1391 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x20011102,
1392 .driver
= "Audigy2", .name
= "SB Audigy 2 ZS Notebook [SB0530]",
1396 .ca_cardbus_chip
= 1,
1400 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1401 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x42011102,
1402 .driver
= "Audigy2", .name
= "E-mu 1010 Notebook [MAEM8950]",
1406 .ca_cardbus_chip
= 1,
1408 .emu_model
= EMU_MODEL_EMU1616
},
1409 /* Tested by James@superbug.co.uk 4th Nov 2007. */
1410 /* This is MAEM8960, 0202 is MAEM 8980 */
1411 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x40041102,
1412 .driver
= "Audigy2", .name
= "E-mu 1010b PCI [MAEM8960]",
1417 .emu_model
= EMU_MODEL_EMU1010B
}, /* EMU 1010 new revision */
1418 /* Tested by James@superbug.co.uk 8th July 2005. */
1419 /* This is MAEM8810, 0202 is MAEM8820 */
1420 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x40011102,
1421 .driver
= "Audigy2", .name
= "E-mu 1010 [MAEM8810]",
1426 .emu_model
= EMU_MODEL_EMU1010
}, /* EMU 1010 old revision */
1428 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x40021102,
1429 .driver
= "Audigy2", .name
= "E-mu 0404b PCI [MAEM8852]",
1434 .emu_model
= EMU_MODEL_EMU0404
}, /* EMU 0404 new revision */
1435 /* Tested by James@superbug.co.uk 20-3-2007. */
1436 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x40021102,
1437 .driver
= "Audigy2", .name
= "E-mu 0404 [MAEM8850]",
1442 .emu_model
= EMU_MODEL_EMU0404
}, /* EMU 0404 */
1444 {.vendor
= 0x1102, .device
= 0x0008, .subsystem
= 0x40051102,
1445 .driver
= "Audigy2", .name
= "E-mu 0404 PCIe [MAEM8984]",
1450 .emu_model
= EMU_MODEL_EMU0404
}, /* EMU 0404 PCIe ver_03 */
1451 /* Note that all E-mu cards require kernel 2.6 or newer. */
1452 {.vendor
= 0x1102, .device
= 0x0008,
1453 .driver
= "Audigy2", .name
= "SB Audigy 2 Value [Unknown]",
1458 /* Tested by James@superbug.co.uk 3rd July 2005 */
1459 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20071102,
1460 .driver
= "Audigy2", .name
= "SB Audigy 4 PRO [SB0380]",
1468 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1469 /* The 0x20061102 does have SB0350 written on it
1470 * Just like 0x20021102
1472 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20061102,
1473 .driver
= "Audigy2", .name
= "SB Audigy 2 [SB0350b]",
1480 .invert_shared_spdif
= 1, /* digital/analog switch swapped */
1482 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20021102,
1483 .driver
= "Audigy2", .name
= "SB Audigy 2 ZS [SB0350]",
1490 .invert_shared_spdif
= 1, /* digital/analog switch swapped */
1492 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x20011102,
1493 .driver
= "Audigy2", .name
= "SB Audigy 2 ZS [SB0360]",
1500 .invert_shared_spdif
= 1, /* digital/analog switch swapped */
1503 /* Tested by James@superbug.co.uk 3rd July 2005 */
1506 * ADC: Philips 1361T
1510 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10071102,
1511 .driver
= "Audigy2", .name
= "SB Audigy 2 [SB0240]",
1518 .adc_1361t
= 1, /* 24 bit capture instead of 16bit */
1520 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10051102,
1521 .driver
= "Audigy2", .name
= "SB Audigy 2 Platinum EX [SB0280]",
1528 /* Dell OEM/Creative Labs Audigy 2 ZS */
1529 /* See ALSA bug#1365 */
1530 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10031102,
1531 .driver
= "Audigy2", .name
= "SB Audigy 2 ZS [SB0353]",
1538 .invert_shared_spdif
= 1, /* digital/analog switch swapped */
1540 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x10021102,
1541 .driver
= "Audigy2", .name
= "SB Audigy 2 Platinum [SB0240P]",
1548 .invert_shared_spdif
= 1, /* digital/analog switch swapped */
1549 .adc_1361t
= 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1551 {.vendor
= 0x1102, .device
= 0x0004, .revision
= 0x04,
1552 .driver
= "Audigy2", .name
= "SB Audigy 2 [Unknown]",
1559 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00531102,
1560 .driver
= "Audigy", .name
= "SB Audigy 1 [SB0092]",
1565 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00521102,
1566 .driver
= "Audigy", .name
= "SB Audigy 1 ES [SB0160]",
1572 {.vendor
= 0x1102, .device
= 0x0004, .subsystem
= 0x00511102,
1573 .driver
= "Audigy", .name
= "SB Audigy 1 [SB0090]",
1578 {.vendor
= 0x1102, .device
= 0x0004,
1579 .driver
= "Audigy", .name
= "Audigy 1 [Unknown]",
1584 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x100a1102,
1585 .driver
= "EMU10K1", .name
= "SB Live! 5.1 [SB0220]",
1590 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x806b1102,
1591 .driver
= "EMU10K1", .name
= "SB Live! [SB0105]",
1596 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x806a1102,
1597 .driver
= "EMU10K1", .name
= "SB Live! Value [SB0103]",
1602 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80691102,
1603 .driver
= "EMU10K1", .name
= "SB Live! Value [SB0101]",
1608 /* Tested by ALSA bug#1680 26th December 2005 */
1609 /* note: It really has SB0220 written on the card, */
1610 /* but it's SB0228 according to kx.inf */
1611 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80661102,
1612 .driver
= "EMU10K1", .name
= "SB Live! 5.1 Dell OEM [SB0228]",
1617 /* Tested by Thomas Zehetbauer 27th Aug 2005 */
1618 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80651102,
1619 .driver
= "EMU10K1", .name
= "SB Live! 5.1 [SB0220]",
1624 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80641102,
1625 .driver
= "EMU10K1", .name
= "SB Live! 5.1",
1630 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1631 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80611102,
1632 .driver
= "EMU10K1", .name
= "SB Live! 5.1 [SB0060]",
1635 .ac97_chip
= 2, /* ac97 is optional; both SBLive 5.1 and platinum
1636 * share the same IDs!
1639 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80511102,
1640 .driver
= "EMU10K1", .name
= "SB Live! Value [CT4850]",
1645 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80401102,
1646 .driver
= "EMU10K1", .name
= "SB Live! Platinum [CT4760P]",
1650 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80321102,
1651 .driver
= "EMU10K1", .name
= "SB Live! Value [CT4871]",
1656 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80311102,
1657 .driver
= "EMU10K1", .name
= "SB Live! Value [CT4831]",
1662 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80281102,
1663 .driver
= "EMU10K1", .name
= "SB Live! Value [CT4870]",
1668 /* Tested by James@superbug.co.uk 3rd July 2005 */
1669 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80271102,
1670 .driver
= "EMU10K1", .name
= "SB Live! Value [CT4832]",
1675 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80261102,
1676 .driver
= "EMU10K1", .name
= "SB Live! Value [CT4830]",
1681 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80231102,
1682 .driver
= "EMU10K1", .name
= "SB PCI512 [CT4790]",
1687 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x80221102,
1688 .driver
= "EMU10K1", .name
= "SB Live! Value [CT4780]",
1693 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x40011102,
1694 .driver
= "EMU10K1", .name
= "E-mu APS [PC545]",
1698 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x00211102,
1699 .driver
= "EMU10K1", .name
= "SB Live! [CT4620]",
1704 {.vendor
= 0x1102, .device
= 0x0002, .subsystem
= 0x00201102,
1705 .driver
= "EMU10K1", .name
= "SB Live! Value [CT4670]",
1710 {.vendor
= 0x1102, .device
= 0x0002,
1711 .driver
= "EMU10K1", .name
= "SB Live! [Unknown]",
1716 { } /* terminator */
1719 int __devinit
snd_emu10k1_create(struct snd_card
*card
,
1720 struct pci_dev
*pci
,
1721 unsigned short extin_mask
,
1722 unsigned short extout_mask
,
1723 long max_cache_bytes
,
1726 struct snd_emu10k1
**remu
)
1728 struct snd_emu10k1
*emu
;
1731 unsigned int silent_page
;
1732 const struct snd_emu_chip_details
*c
;
1733 static struct snd_device_ops ops
= {
1734 .dev_free
= snd_emu10k1_dev_free
,
1739 /* enable PCI device */
1740 err
= pci_enable_device(pci
);
1744 emu
= kzalloc(sizeof(*emu
), GFP_KERNEL
);
1746 pci_disable_device(pci
);
1750 spin_lock_init(&emu
->reg_lock
);
1751 spin_lock_init(&emu
->emu_lock
);
1752 spin_lock_init(&emu
->spi_lock
);
1753 spin_lock_init(&emu
->i2c_lock
);
1754 spin_lock_init(&emu
->voice_lock
);
1755 spin_lock_init(&emu
->synth_lock
);
1756 spin_lock_init(&emu
->memblk_lock
);
1757 mutex_init(&emu
->fx8010
.lock
);
1758 INIT_LIST_HEAD(&emu
->mapped_link_head
);
1759 INIT_LIST_HEAD(&emu
->mapped_order_link_head
);
1763 emu
->get_synth_voice
= NULL
;
1764 /* read revision & serial */
1765 emu
->revision
= pci
->revision
;
1766 pci_read_config_dword(pci
, PCI_SUBSYSTEM_VENDOR_ID
, &emu
->serial
);
1767 pci_read_config_word(pci
, PCI_SUBSYSTEM_ID
, &emu
->model
);
1768 snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci
->vendor
, pci
->device
, emu
->serial
, emu
->model
);
1770 for (c
= emu_chip_details
; c
->vendor
; c
++) {
1771 if (c
->vendor
== pci
->vendor
&& c
->device
== pci
->device
) {
1773 if (c
->subsystem
&& (c
->subsystem
== subsystem
))
1778 if (c
->subsystem
&& (c
->subsystem
!= emu
->serial
))
1780 if (c
->revision
&& c
->revision
!= emu
->revision
)
1786 if (c
->vendor
== 0) {
1787 snd_printk(KERN_ERR
"emu10k1: Card not recognised\n");
1789 pci_disable_device(pci
);
1792 emu
->card_capabilities
= c
;
1793 if (c
->subsystem
&& !subsystem
)
1794 snd_printdd("Sound card name = %s\n", c
->name
);
1796 snd_printdd("Sound card name = %s, "
1797 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1798 "Forced to subsystem = 0x%x\n", c
->name
,
1799 pci
->vendor
, pci
->device
, emu
->serial
, c
->subsystem
);
1801 snd_printdd("Sound card name = %s, "
1802 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1803 c
->name
, pci
->vendor
, pci
->device
,
1806 if (!*card
->id
&& c
->id
) {
1808 strlcpy(card
->id
, c
->id
, sizeof(card
->id
));
1810 for (i
= 0; i
< snd_ecards_limit
; i
++) {
1811 if (snd_cards
[i
] && !strcmp(snd_cards
[i
]->id
, card
->id
))
1814 if (i
>= snd_ecards_limit
)
1817 if (n
>= SNDRV_CARDS
)
1819 snprintf(card
->id
, sizeof(card
->id
), "%s_%d", c
->id
, n
);
1823 is_audigy
= emu
->audigy
= c
->emu10k2_chip
;
1825 /* set the DMA transfer mask */
1826 emu
->dma_mask
= is_audigy
? AUDIGY_DMA_MASK
: EMU10K1_DMA_MASK
;
1827 if (pci_set_dma_mask(pci
, emu
->dma_mask
) < 0 ||
1828 pci_set_consistent_dma_mask(pci
, emu
->dma_mask
) < 0) {
1829 snd_printk(KERN_ERR
"architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu
->dma_mask
);
1831 pci_disable_device(pci
);
1835 emu
->gpr_base
= A_FXGPREGBASE
;
1837 emu
->gpr_base
= FXGPREGBASE
;
1839 err
= pci_request_regions(pci
, "EMU10K1");
1842 pci_disable_device(pci
);
1845 emu
->port
= pci_resource_start(pci
, 0);
1847 emu
->max_cache_pages
= max_cache_bytes
>> PAGE_SHIFT
;
1848 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
1849 32 * 1024, &emu
->ptb_pages
) < 0) {
1854 emu
->page_ptr_table
= vmalloc(emu
->max_cache_pages
* sizeof(void *));
1855 emu
->page_addr_table
= vmalloc(emu
->max_cache_pages
*
1856 sizeof(unsigned long));
1857 if (emu
->page_ptr_table
== NULL
|| emu
->page_addr_table
== NULL
) {
1862 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
1863 EMUPAGESIZE
, &emu
->silent_page
) < 0) {
1867 emu
->memhdr
= snd_util_memhdr_new(emu
->max_cache_pages
* PAGE_SIZE
);
1868 if (emu
->memhdr
== NULL
) {
1872 emu
->memhdr
->block_extra_size
= sizeof(struct snd_emu10k1_memblk
) -
1873 sizeof(struct snd_util_memblk
);
1875 pci_set_master(pci
);
1877 emu
->fx8010
.fxbus_mask
= 0x303f;
1878 if (extin_mask
== 0)
1879 extin_mask
= 0x3fcf;
1880 if (extout_mask
== 0)
1881 extout_mask
= 0x7fff;
1882 emu
->fx8010
.extin_mask
= extin_mask
;
1883 emu
->fx8010
.extout_mask
= extout_mask
;
1884 emu
->enable_ir
= enable_ir
;
1886 if (emu
->card_capabilities
->ca_cardbus_chip
) {
1887 err
= snd_emu10k1_cardbus_init(emu
);
1891 if (emu
->card_capabilities
->ecard
) {
1892 err
= snd_emu10k1_ecard_init(emu
);
1895 } else if (emu
->card_capabilities
->emu_model
) {
1896 err
= snd_emu10k1_emu1010_init(emu
);
1898 snd_emu10k1_free(emu
);
1902 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1903 does not support this, it shouldn't do any harm */
1904 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0,
1905 AC97SLOT_CNTR
|AC97SLOT_LFE
);
1908 /* initialize TRAM setup */
1909 emu
->fx8010
.itram_size
= (16 * 1024)/2;
1910 emu
->fx8010
.etram_pages
.area
= NULL
;
1911 emu
->fx8010
.etram_pages
.bytes
= 0;
1913 /* irq handler must be registered after I/O ports are activated */
1914 if (request_irq(pci
->irq
, snd_emu10k1_interrupt
, IRQF_SHARED
,
1915 KBUILD_MODNAME
, emu
)) {
1919 emu
->irq
= pci
->irq
;
1922 * Init to 0x02109204 :
1923 * Clock accuracy = 0 (1000ppm)
1924 * Sample Rate = 2 (48kHz)
1925 * Audio Channel = 1 (Left of 2)
1926 * Source Number = 0 (Unspecified)
1927 * Generation Status = 1 (Original for Cat Code 12)
1928 * Cat Code = 12 (Digital Signal Mixer)
1930 * Emphasis = 0 (None)
1931 * CP = 1 (Copyright unasserted)
1932 * AN = 0 (Audio data)
1935 emu
->spdif_bits
[0] = emu
->spdif_bits
[1] =
1936 emu
->spdif_bits
[2] = SPCS_CLKACCY_1000PPM
| SPCS_SAMPLERATE_48
|
1937 SPCS_CHANNELNUM_LEFT
| SPCS_SOURCENUM_UNSPEC
|
1938 SPCS_GENERATIONSTATUS
| 0x00001200 |
1939 0x00000000 | SPCS_EMPHASIS_NONE
| SPCS_COPYRIGHT
;
1941 emu
->reserved_page
= (struct snd_emu10k1_memblk
*)
1942 snd_emu10k1_synth_alloc(emu
, 4096);
1943 if (emu
->reserved_page
)
1944 emu
->reserved_page
->map_locked
= 1;
1946 /* Clear silent pages and set up pointers */
1947 memset(emu
->silent_page
.area
, 0, PAGE_SIZE
);
1948 silent_page
= emu
->silent_page
.addr
<< 1;
1949 for (idx
= 0; idx
< MAXPAGES
; idx
++)
1950 ((u32
*)emu
->ptb_pages
.area
)[idx
] = cpu_to_le32(silent_page
| idx
);
1952 /* set up voice indices */
1953 for (idx
= 0; idx
< NUM_G
; idx
++) {
1954 emu
->voices
[idx
].emu
= emu
;
1955 emu
->voices
[idx
].number
= idx
;
1958 err
= snd_emu10k1_init(emu
, enable_ir
, 0);
1962 err
= alloc_pm_buffer(emu
);
1967 /* Initialize the effect engine */
1968 err
= snd_emu10k1_init_efx(emu
);
1971 snd_emu10k1_audio_enable(emu
);
1973 err
= snd_device_new(card
, SNDRV_DEV_LOWLEVEL
, emu
, &ops
);
1977 #ifdef CONFIG_PROC_FS
1978 snd_emu10k1_proc_init(emu
);
1981 snd_card_set_dev(card
, &pci
->dev
);
1986 snd_emu10k1_free(emu
);
1991 static unsigned char saved_regs
[] = {
1992 CPF
, PTRX
, CVCF
, VTFT
, Z1
, Z2
, PSST
, DSL
, CCCA
, CCR
, CLP
,
1993 FXRT
, MAPA
, MAPB
, ENVVOL
, ATKHLDV
, DCYSUSV
, LFOVAL1
, ENVVAL
,
1994 ATKHLDM
, DCYSUSM
, LFOVAL2
, IP
, IFATN
, PEFE
, FMMOD
, TREMFRQ
, FM2FRQ2
,
1995 TEMPENV
, ADCCR
, FXWC
, MICBA
, ADCBA
, FXBA
,
1996 MICBS
, ADCBS
, FXBS
, CDCS
, GPSCS
, SPCS0
, SPCS1
, SPCS2
,
1997 SPBYPASS
, AC97SLOT
, CDSRCS
, GPSRCS
, ZVSRCS
, MICIDX
, ADCIDX
, FXIDX
,
2000 static unsigned char saved_regs_audigy
[] = {
2001 A_ADCIDX
, A_MICIDX
, A_FXWC1
, A_FXWC2
, A_SAMPLE_RATE
,
2002 A_FXRT2
, A_SENDAMOUNTS
, A_FXRT1
,
2006 static int __devinit
alloc_pm_buffer(struct snd_emu10k1
*emu
)
2010 size
= ARRAY_SIZE(saved_regs
);
2012 size
+= ARRAY_SIZE(saved_regs_audigy
);
2013 emu
->saved_ptr
= vmalloc(4 * NUM_G
* size
);
2014 if (!emu
->saved_ptr
)
2016 if (snd_emu10k1_efx_alloc_pm_buffer(emu
) < 0)
2018 if (emu
->card_capabilities
->ca0151_chip
&&
2019 snd_p16v_alloc_pm_buffer(emu
) < 0)
2024 static void free_pm_buffer(struct snd_emu10k1
*emu
)
2026 vfree(emu
->saved_ptr
);
2027 snd_emu10k1_efx_free_pm_buffer(emu
);
2028 if (emu
->card_capabilities
->ca0151_chip
)
2029 snd_p16v_free_pm_buffer(emu
);
2032 void snd_emu10k1_suspend_regs(struct snd_emu10k1
*emu
)
2038 val
= emu
->saved_ptr
;
2039 for (reg
= saved_regs
; *reg
!= 0xff; reg
++)
2040 for (i
= 0; i
< NUM_G
; i
++, val
++)
2041 *val
= snd_emu10k1_ptr_read(emu
, *reg
, i
);
2043 for (reg
= saved_regs_audigy
; *reg
!= 0xff; reg
++)
2044 for (i
= 0; i
< NUM_G
; i
++, val
++)
2045 *val
= snd_emu10k1_ptr_read(emu
, *reg
, i
);
2048 emu
->saved_a_iocfg
= inl(emu
->port
+ A_IOCFG
);
2049 emu
->saved_hcfg
= inl(emu
->port
+ HCFG
);
2052 void snd_emu10k1_resume_init(struct snd_emu10k1
*emu
)
2054 if (emu
->card_capabilities
->ca_cardbus_chip
)
2055 snd_emu10k1_cardbus_init(emu
);
2056 if (emu
->card_capabilities
->ecard
)
2057 snd_emu10k1_ecard_init(emu
);
2058 else if (emu
->card_capabilities
->emu_model
)
2059 snd_emu10k1_emu1010_init(emu
);
2061 snd_emu10k1_ptr_write(emu
, AC97SLOT
, 0, AC97SLOT_CNTR
|AC97SLOT_LFE
);
2062 snd_emu10k1_init(emu
, emu
->enable_ir
, 1);
2065 void snd_emu10k1_resume_regs(struct snd_emu10k1
*emu
)
2071 snd_emu10k1_audio_enable(emu
);
2073 /* resore for spdif */
2075 outl(emu
->saved_a_iocfg
, emu
->port
+ A_IOCFG
);
2076 outl(emu
->saved_hcfg
, emu
->port
+ HCFG
);
2078 val
= emu
->saved_ptr
;
2079 for (reg
= saved_regs
; *reg
!= 0xff; reg
++)
2080 for (i
= 0; i
< NUM_G
; i
++, val
++)
2081 snd_emu10k1_ptr_write(emu
, *reg
, i
, *val
);
2083 for (reg
= saved_regs_audigy
; *reg
!= 0xff; reg
++)
2084 for (i
= 0; i
< NUM_G
; i
++, val
++)
2085 snd_emu10k1_ptr_write(emu
, *reg
, i
, *val
);