sound/soc/codecs/wm_hubs.c

   1 /*
   2  * wm_hubs.c  --  WM8993/4 common code
   3  *
   4  * Copyright 2009 Wolfson Microelectronics plc
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/moduleparam.h>
  16 #include <linux/init.h>
  17 #include <linux/delay.h>
  18 #include <linux/pm.h>
  19 #include <linux/i2c.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/mfd/wm8994/registers.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include <sound/pcm_params.h>
  25 #include <sound/soc.h>
  26 #include <sound/initval.h>
  27 #include <sound/tlv.h>
  28
  29 #include "wm8993.h"
  30 #include "wm_hubs.h"
  31
  32 const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0);
  33 EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv);
  34
  35 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0);
  36 static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0);
  37 static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1);
  38 static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0);
  39 static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0);
  40 static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1);
  41 static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0);
  42 static const unsigned int spkboost_tlv[] = {
  43         TLV_DB_RANGE_HEAD(7),
  44         0, 6, TLV_DB_SCALE_ITEM(0, 150, 0),
  45         7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0),
  46 };
  47 static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0);
  48
  49 static const char *speaker_ref_text[] = {
  50         "SPKVDD/2",
  51         "VMID",
  52 };
  53
  54 static const struct soc_enum speaker_ref =
  55         SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text);
  56
  57 static const char *speaker_mode_text[] = {
  58         "Class D",
  59         "Class AB",
  60 };
  61
  62 static const struct soc_enum speaker_mode =
  63         SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text);
  64
  65 static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op)
  66 {
  67         struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
  68         unsigned int reg;
  69         int count = 0;
  70         int timeout;
  71         unsigned int val;
  72
  73         val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1;
  74
  75         /* Trigger the command */
  76         snd_soc_write(codec, WM8993_DC_SERVO_0, val);
  77
  78         dev_dbg(codec->dev, "Waiting for DC servo...\n");
  79
  80         if (hubs->dcs_done_irq)
  81                 timeout = 4;
  82         else
  83                 timeout = 400;
  84
  85         do {
  86                 count++;
  87
  88                 if (hubs->dcs_done_irq)
  89                         wait_for_completion_timeout(&hubs->dcs_done,
  90                                                     msecs_to_jiffies(250));
  91                 else
  92                         msleep(1);
  93
  94                 reg = snd_soc_read(codec, WM8993_DC_SERVO_0);
  95                 dev_dbg(codec->dev, "DC servo: %x\n", reg);
  96         } while (reg & op && count < timeout);
  97
  98         if (reg & op)
  99                 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n",
 100                         op);
 101 }
 102
 103 irqreturn_t wm_hubs_dcs_done(int irq, void *data)
 104 {
 105         struct wm_hubs_data *hubs = data;
 106
 107         complete(&hubs->dcs_done);
 108
 109         return IRQ_HANDLED;
 110 }
 111 EXPORT_SYMBOL_GPL(wm_hubs_dcs_done);
 112
 113 /*
 114  * Startup calibration of the DC servo
 115  */
 116 static void calibrate_dc_servo(struct snd_soc_codec *codec)
 117 {
 118         struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
 119         s8 offset;
 120         u16 reg, reg_l, reg_r, dcs_cfg, dcs_reg;
 121
 122         switch (hubs->dcs_readback_mode) {
 123         case 2:
 124                 dcs_reg = WM8994_DC_SERVO_4E;
 125                 break;
 126         default:
 127                 dcs_reg = WM8993_DC_SERVO_3;
 128                 break;
 129         }
 130
 131         /* If we're using a digital only path and have a previously
 132          * callibrated DC servo offset stored then use that. */
 133         if (hubs->class_w && hubs->class_w_dcs) {
 134                 dev_dbg(codec->dev, "Using cached DC servo offset %x\n",
 135                         hubs->class_w_dcs);
 136                 snd_soc_write(codec, dcs_reg, hubs->class_w_dcs);
 137                 wait_for_dc_servo(codec,
 138                                   WM8993_DCS_TRIG_DAC_WR_0 |
 139                                   WM8993_DCS_TRIG_DAC_WR_1);
 140                 return;
 141         }
 142
 143         if (hubs->series_startup) {
 144                 /* Set for 32 series updates */
 145                 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
 146                                     WM8993_DCS_SERIES_NO_01_MASK,
 147                                     32 << WM8993_DCS_SERIES_NO_01_SHIFT);
 148                 wait_for_dc_servo(codec,
 149                                   WM8993_DCS_TRIG_SERIES_0 |
 150                                   WM8993_DCS_TRIG_SERIES_1);
 151         } else {
 152                 wait_for_dc_servo(codec,
 153                                   WM8993_DCS_TRIG_STARTUP_0 |
 154                                   WM8993_DCS_TRIG_STARTUP_1);
 155         }
 156
 157         /* Different chips in the family support different readback
 158          * methods.
 159          */
 160         switch (hubs->dcs_readback_mode) {
 161         case 0:
 162                 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1)
 163                         & WM8993_DCS_INTEG_CHAN_0_MASK;
 164                 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2)
 165                         & WM8993_DCS_INTEG_CHAN_1_MASK;
 166                 break;
 167         case 2:
 168         case 1:
 169                 reg = snd_soc_read(codec, dcs_reg);
 170                 reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK)
 171                         >> WM8993_DCS_DAC_WR_VAL_1_SHIFT;
 172                 reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK;
 173                 break;
 174         default:
 175                 WARN(1, "Unknown DCS readback method\n");
 176                 break;
 177         }
 178
 179         dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r);
 180
 181         /* Apply correction to DC servo result */
 182         if (hubs->dcs_codes_l || hubs->dcs_codes_r) {
 183                 dev_dbg(codec->dev,
 184                         "Applying %d/%d code DC servo correction\n",
 185                         hubs->dcs_codes_l, hubs->dcs_codes_r);
 186
 187                 /* HPOUT1R */
 188                 offset = reg_r;
 189                 offset += hubs->dcs_codes_r;
 190                 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
 191
 192                 /* HPOUT1L */
 193                 offset = reg_l;
 194                 offset += hubs->dcs_codes_l;
 195                 dcs_cfg |= (u8)offset;
 196
 197                 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg);
 198
 199                 /* Do it */
 200                 snd_soc_write(codec, dcs_reg, dcs_cfg);
 201                 wait_for_dc_servo(codec,
 202                                   WM8993_DCS_TRIG_DAC_WR_0 |
 203                                   WM8993_DCS_TRIG_DAC_WR_1);
 204         } else {
 205                 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT;
 206                 dcs_cfg |= reg_l;
 207         }
 208
 209         /* Save the callibrated offset if we're in class W mode and
 210          * therefore don't have any analogue signal mixed in. */
 211         if (hubs->class_w)
 212                 hubs->class_w_dcs = dcs_cfg;
 213 }
 214
 215 /*
 216  * Update the DC servo calibration on gain changes
 217  */
 218 static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol,
 219                                struct snd_ctl_elem_value *ucontrol)
 220 {
 221         struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
 222         struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
 223         int ret;
 224
 225         ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
 226
 227         /* Updating the analogue gains invalidates the DC servo cache */
 228         hubs->class_w_dcs = 0;
 229
 230         /* If we're applying an offset correction then updating the
 231          * callibration would be likely to introduce further offsets. */
 232         if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update)
 233                 return ret;
 234
 235         /* Only need to do this if the outputs are active */
 236         if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
 237             & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
 238                 snd_soc_update_bits(codec,
 239                                     WM8993_DC_SERVO_0,
 240                                     WM8993_DCS_TRIG_SINGLE_0 |
 241                                     WM8993_DCS_TRIG_SINGLE_1,
 242                                     WM8993_DCS_TRIG_SINGLE_0 |
 243                                     WM8993_DCS_TRIG_SINGLE_1);
 244
 245         return ret;
 246 }
 247
 248 static const struct snd_kcontrol_new analogue_snd_controls[] = {
 249 SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
 250                inpga_tlv),
 251 SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
 252 SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
 253
 254 SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0,
 255                inpga_tlv),
 256 SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1),
 257 SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0),
 258
 259
 260 SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
 261                inpga_tlv),
 262 SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
 263 SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
 264
 265 SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0,
 266                inpga_tlv),
 267 SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1),
 268 SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0),
 269
 270 SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0,
 271                inmix_sw_tlv),
 272 SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0,
 273                inmix_sw_tlv),
 274 SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0,
 275                inmix_tlv),
 276 SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv),
 277 SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0,
 278                inmix_tlv),
 279
 280 SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0,
 281                inmix_sw_tlv),
 282 SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0,
 283                inmix_sw_tlv),
 284 SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0,
 285                inmix_tlv),
 286 SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv),
 287 SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0,
 288                inmix_tlv),
 289
 290 SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1,
 291                outmix_tlv),
 292 SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1,
 293                outmix_tlv),
 294 SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1,
 295                outmix_tlv),
 296 SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1,
 297                outmix_tlv),
 298 SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1,
 299                outmix_tlv),
 300 SOC_SINGLE_TLV("Left Output Mixer Right Input Volume",
 301                WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv),
 302 SOC_SINGLE_TLV("Left Output Mixer Left Input Volume",
 303                WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv),
 304 SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1,
 305                outmix_tlv),
 306
 307 SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume",
 308                WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
 309 SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume",
 310                WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv),
 311 SOC_SINGLE_TLV("Right Output Mixer IN1L Volume",
 312                WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv),
 313 SOC_SINGLE_TLV("Right Output Mixer IN1R Volume",
 314                WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv),
 315 SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume",
 316                WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv),
 317 SOC_SINGLE_TLV("Right Output Mixer Left Input Volume",
 318                WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv),
 319 SOC_SINGLE_TLV("Right Output Mixer Right Input Volume",
 320                WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv),
 321 SOC_SINGLE_TLV("Right Output Mixer DAC Volume",
 322                WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv),
 323
 324 SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME,
 325                  WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv),
 326 SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME,
 327              WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0),
 328 SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME,
 329              WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0),
 330
 331 SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1),
 332 SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv),
 333
 334 SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION,
 335                5, 1, 1, wm_hubs_spkmix_tlv),
 336 SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION,
 337                4, 1, 1, wm_hubs_spkmix_tlv),
 338 SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION,
 339                3, 1, 1, wm_hubs_spkmix_tlv),
 340
 341 SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION,
 342                5, 1, 1, wm_hubs_spkmix_tlv),
 343 SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION,
 344                4, 1, 1, wm_hubs_spkmix_tlv),
 345 SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION,
 346                3, 1, 1, wm_hubs_spkmix_tlv),
 347
 348 SOC_DOUBLE_R_TLV("Speaker Mixer Volume",
 349                  WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION,
 350                  0, 3, 1, spkmixout_tlv),
 351 SOC_DOUBLE_R_TLV("Speaker Volume",
 352                  WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
 353                  0, 63, 0, outpga_tlv),
 354 SOC_DOUBLE_R("Speaker Switch",
 355              WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
 356              6, 1, 0),
 357 SOC_DOUBLE_R("Speaker ZC Switch",
 358              WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT,
 359              7, 1, 0),
 360 SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0,
 361                spkboost_tlv),
 362 SOC_ENUM("Speaker Reference", speaker_ref),
 363 SOC_ENUM("Speaker Mode", speaker_mode),
 364
 365 {
 366         .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Headphone Volume",
 367         .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |
 368                  SNDRV_CTL_ELEM_ACCESS_READWRITE,
 369         .tlv.p = outpga_tlv,
 370         .info = snd_soc_info_volsw_2r,
 371         .get = snd_soc_get_volsw_2r, .put = wm8993_put_dc_servo,
 372         .private_value = (unsigned long)&(struct soc_mixer_control) {
 373                 .reg = WM8993_LEFT_OUTPUT_VOLUME,
 374                 .rreg = WM8993_RIGHT_OUTPUT_VOLUME,
 375                 .shift = 0, .max = 63
 376         },
 377 },
 378 SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME,
 379              WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0),
 380 SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME,
 381              WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0),
 382
 383 SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1),
 384 SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1),
 385 SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1,
 386                line_tlv),
 387
 388 SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1),
 389 SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1),
 390 SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1,
 391                line_tlv),
 392 };
 393
 394 static int hp_supply_event(struct snd_soc_dapm_widget *w,
 395                            struct snd_kcontrol *kcontrol, int event)
 396 {
 397         struct snd_soc_codec *codec = w->codec;
 398         struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
 399
 400         switch (event) {
 401         case SND_SOC_DAPM_PRE_PMU:
 402                 switch (hubs->hp_startup_mode) {
 403                 case 0:
 404                         break;
 405                 case 1:
 406                         /* Enable the headphone amp */
 407                         snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
 408                                             WM8993_HPOUT1L_ENA |
 409                                             WM8993_HPOUT1R_ENA,
 410                                             WM8993_HPOUT1L_ENA |
 411                                             WM8993_HPOUT1R_ENA);
 412
 413                         /* Enable the second stage */
 414                         snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
 415                                             WM8993_HPOUT1L_DLY |
 416                                             WM8993_HPOUT1R_DLY,
 417                                             WM8993_HPOUT1L_DLY |
 418                                             WM8993_HPOUT1R_DLY);
 419                         break;
 420                 default:
 421                         dev_err(codec->dev, "Unknown HP startup mode %d\n",
 422                                 hubs->hp_startup_mode);
 423                         break;
 424                 }
 425
 426         case SND_SOC_DAPM_PRE_PMD:
 427                 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
 428                                     WM8993_CP_ENA, 0);
 429                 break;
 430         }
 431
 432         return 0;
 433 }
 434
 435 static int hp_event(struct snd_soc_dapm_widget *w,
 436                     struct snd_kcontrol *kcontrol, int event)
 437 {
 438         struct snd_soc_codec *codec = w->codec;
 439         unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0);
 440
 441         switch (event) {
 442         case SND_SOC_DAPM_POST_PMU:
 443                 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1,
 444                                     WM8993_CP_ENA, WM8993_CP_ENA);
 445
 446                 msleep(5);
 447
 448                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
 449                                     WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
 450                                     WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA);
 451
 452                 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY;
 453                 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
 454
 455                 snd_soc_update_bits(codec, WM8993_DC_SERVO_1,
 456                                     WM8993_DCS_TIMER_PERIOD_01_MASK, 0);
 457
 458                 calibrate_dc_servo(codec);
 459
 460                 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT |
 461                         WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT;
 462                 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg);
 463                 break;
 464
 465         case SND_SOC_DAPM_PRE_PMD:
 466                 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
 467                                     WM8993_HPOUT1L_OUTP |
 468                                     WM8993_HPOUT1R_OUTP |
 469                                     WM8993_HPOUT1L_RMV_SHORT |
 470                                     WM8993_HPOUT1R_RMV_SHORT, 0);
 471
 472                 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
 473                                     WM8993_HPOUT1L_DLY |
 474                                     WM8993_HPOUT1R_DLY, 0);
 475
 476                 snd_soc_write(codec, WM8993_DC_SERVO_0, 0);
 477
 478                 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
 479                                     WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA,
 480                                     0);
 481                 break;
 482         }
 483
 484         return 0;
 485 }
 486
 487 static int earpiece_event(struct snd_soc_dapm_widget *w,
 488                           struct snd_kcontrol *control, int event)
 489 {
 490         struct snd_soc_codec *codec = w->codec;
 491         u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA;
 492
 493         switch (event) {
 494         case SND_SOC_DAPM_PRE_PMU:
 495                 reg |= WM8993_HPOUT2_IN_ENA;
 496                 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
 497                 udelay(50);
 498                 break;
 499
 500         case SND_SOC_DAPM_POST_PMD:
 501                 snd_soc_write(codec, WM8993_ANTIPOP1, reg);
 502                 break;
 503
 504         default:
 505                 BUG();
 506                 break;
 507         }
 508
 509         return 0;
 510 }
 511
 512 static const struct snd_kcontrol_new in1l_pga[] = {
 513 SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0),
 514 SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0),
 515 };
 516
 517 static const struct snd_kcontrol_new in1r_pga[] = {
 518 SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0),
 519 SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0),
 520 };
 521
 522 static const struct snd_kcontrol_new in2l_pga[] = {
 523 SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0),
 524 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0),
 525 };
 526
 527 static const struct snd_kcontrol_new in2r_pga[] = {
 528 SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0),
 529 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0),
 530 };
 531
 532 static const struct snd_kcontrol_new mixinl[] = {
 533 SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0),
 534 SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0),
 535 };
 536
 537 static const struct snd_kcontrol_new mixinr[] = {
 538 SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0),
 539 SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0),
 540 };
 541
 542 static const struct snd_kcontrol_new left_output_mixer[] = {
 543 SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0),
 544 SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0),
 545 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0),
 546 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0),
 547 SOC_DAPM_SINGLE("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0),
 548 SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0),
 549 SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0),
 550 SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0),
 551 };
 552
 553 static const struct snd_kcontrol_new right_output_mixer[] = {
 554 SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0),
 555 SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0),
 556 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0),
 557 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0),
 558 SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0),
 559 SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0),
 560 SOC_DAPM_SINGLE("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0),
 561 SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0),
 562 };
 563
 564 static const struct snd_kcontrol_new earpiece_mixer[] = {
 565 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0),
 566 SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0),
 567 SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0),
 568 };
 569
 570 static const struct snd_kcontrol_new left_speaker_boost[] = {
 571 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0),
 572 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0),
 573 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0),
 574 };
 575
 576 static const struct snd_kcontrol_new right_speaker_boost[] = {
 577 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0),
 578 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0),
 579 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0),
 580 };
 581
 582 static const struct snd_kcontrol_new line1_mix[] = {
 583 SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0),
 584 SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0),
 585 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
 586 };
 587
 588 static const struct snd_kcontrol_new line1n_mix[] = {
 589 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0),
 590 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0),
 591 };
 592
 593 static const struct snd_kcontrol_new line1p_mix[] = {
 594 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0),
 595 };
 596
 597 static const struct snd_kcontrol_new line2_mix[] = {
 598 SOC_DAPM_SINGLE("IN2R Switch", WM8993_LINE_MIXER2, 2, 1, 0),
 599 SOC_DAPM_SINGLE("IN2L Switch", WM8993_LINE_MIXER2, 1, 1, 0),
 600 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
 601 };
 602
 603 static const struct snd_kcontrol_new line2n_mix[] = {
 604 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 6, 1, 0),
 605 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 5, 1, 0),
 606 };
 607
 608 static const struct snd_kcontrol_new line2p_mix[] = {
 609 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0),
 610 };
 611
 612 static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = {
 613 SND_SOC_DAPM_INPUT("IN1LN"),
 614 SND_SOC_DAPM_INPUT("IN1LP"),
 615 SND_SOC_DAPM_INPUT("IN2LN"),
 616 SND_SOC_DAPM_INPUT("IN2LP:VXRN"),
 617 SND_SOC_DAPM_INPUT("IN1RN"),
 618 SND_SOC_DAPM_INPUT("IN1RP"),
 619 SND_SOC_DAPM_INPUT("IN2RN"),
 620 SND_SOC_DAPM_INPUT("IN2RP:VXRP"),
 621
 622 SND_SOC_DAPM_MICBIAS("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0),
 623 SND_SOC_DAPM_MICBIAS("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0),
 624
 625 SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0,
 626                    in1l_pga, ARRAY_SIZE(in1l_pga)),
 627 SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0,
 628                    in1r_pga, ARRAY_SIZE(in1r_pga)),
 629
 630 SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0,
 631                    in2l_pga, ARRAY_SIZE(in2l_pga)),
 632 SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0,
 633                    in2r_pga, ARRAY_SIZE(in2r_pga)),
 634
 635 SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0,
 636                    mixinl, ARRAY_SIZE(mixinl)),
 637 SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0,
 638                    mixinr, ARRAY_SIZE(mixinr)),
 639
 640 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0,
 641                    left_output_mixer, ARRAY_SIZE(left_output_mixer)),
 642 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0,
 643                    right_output_mixer, ARRAY_SIZE(right_output_mixer)),
 644
 645 SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0),
 646 SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0),
 647
 648 SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event,
 649                     SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
 650 SND_SOC_DAPM_PGA_E("Headphone PGA", SND_SOC_NOPM, 0, 0,
 651                    NULL, 0,
 652                    hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
 653
 654 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
 655                    earpiece_mixer, ARRAY_SIZE(earpiece_mixer)),
 656 SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0,
 657                    NULL, 0, earpiece_event,
 658                    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
 659
 660 SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0,
 661                    left_speaker_boost, ARRAY_SIZE(left_speaker_boost)),
 662 SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0,
 663                    right_speaker_boost, ARRAY_SIZE(right_speaker_boost)),
 664
 665 SND_SOC_DAPM_PGA("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0,
 666                  NULL, 0),
 667 SND_SOC_DAPM_PGA("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0,
 668                  NULL, 0),
 669
 670 SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0,
 671                    line1_mix, ARRAY_SIZE(line1_mix)),
 672 SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0,
 673                    line2_mix, ARRAY_SIZE(line2_mix)),
 674
 675 SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0,
 676                    line1n_mix, ARRAY_SIZE(line1n_mix)),
 677 SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0,
 678                    line1p_mix, ARRAY_SIZE(line1p_mix)),
 679 SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0,
 680                    line2n_mix, ARRAY_SIZE(line2n_mix)),
 681 SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0,
 682                    line2p_mix, ARRAY_SIZE(line2p_mix)),
 683
 684 SND_SOC_DAPM_PGA("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0,
 685                  NULL, 0),
 686 SND_SOC_DAPM_PGA("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0,
 687                  NULL, 0),
 688 SND_SOC_DAPM_PGA("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0,
 689                  NULL, 0),
 690 SND_SOC_DAPM_PGA("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0,
 691                  NULL, 0),
 692
 693 SND_SOC_DAPM_OUTPUT("SPKOUTLP"),
 694 SND_SOC_DAPM_OUTPUT("SPKOUTLN"),
 695 SND_SOC_DAPM_OUTPUT("SPKOUTRP"),
 696 SND_SOC_DAPM_OUTPUT("SPKOUTRN"),
 697 SND_SOC_DAPM_OUTPUT("HPOUT1L"),
 698 SND_SOC_DAPM_OUTPUT("HPOUT1R"),
 699 SND_SOC_DAPM_OUTPUT("HPOUT2P"),
 700 SND_SOC_DAPM_OUTPUT("HPOUT2N"),
 701 SND_SOC_DAPM_OUTPUT("LINEOUT1P"),
 702 SND_SOC_DAPM_OUTPUT("LINEOUT1N"),
 703 SND_SOC_DAPM_OUTPUT("LINEOUT2P"),
 704 SND_SOC_DAPM_OUTPUT("LINEOUT2N"),
 705 };
 706
 707 static const struct snd_soc_dapm_route analogue_routes[] = {
 708         { "MICBIAS1", NULL, "CLK_SYS" },
 709         { "MICBIAS2", NULL, "CLK_SYS" },
 710
 711         { "IN1L PGA", "IN1LP Switch", "IN1LP" },
 712         { "IN1L PGA", "IN1LN Switch", "IN1LN" },
 713
 714         { "IN1L PGA", NULL, "VMID" },
 715         { "IN1R PGA", NULL, "VMID" },
 716         { "IN2L PGA", NULL, "VMID" },
 717         { "IN2R PGA", NULL, "VMID" },
 718
 719         { "IN1R PGA", "IN1RP Switch", "IN1RP" },
 720         { "IN1R PGA", "IN1RN Switch", "IN1RN" },
 721
 722         { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" },
 723         { "IN2L PGA", "IN2LN Switch", "IN2LN" },
 724
 725         { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" },
 726         { "IN2R PGA", "IN2RN Switch", "IN2RN" },
 727
 728         { "Direct Voice", NULL, "IN2LP:VXRN" },
 729         { "Direct Voice", NULL, "IN2RP:VXRP" },
 730
 731         { "MIXINL", "IN1L Switch", "IN1L PGA" },
 732         { "MIXINL", "IN2L Switch", "IN2L PGA" },
 733         { "MIXINL", NULL, "Direct Voice" },
 734         { "MIXINL", NULL, "IN1LP" },
 735         { "MIXINL", NULL, "Left Output Mixer" },
 736         { "MIXINL", NULL, "VMID" },
 737
 738         { "MIXINR", "IN1R Switch", "IN1R PGA" },
 739         { "MIXINR", "IN2R Switch", "IN2R PGA" },
 740         { "MIXINR", NULL, "Direct Voice" },
 741         { "MIXINR", NULL, "IN1RP" },
 742         { "MIXINR", NULL, "Right Output Mixer" },
 743         { "MIXINR", NULL, "VMID" },
 744
 745         { "ADCL", NULL, "MIXINL" },
 746         { "ADCR", NULL, "MIXINR" },
 747
 748         { "Left Output Mixer", "Left Input Switch", "MIXINL" },
 749         { "Left Output Mixer", "Right Input Switch", "MIXINR" },
 750         { "Left Output Mixer", "IN2RN Switch", "IN2RN" },
 751         { "Left Output Mixer", "IN2LN Switch", "IN2LN" },
 752         { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" },
 753         { "Left Output Mixer", "IN1L Switch", "IN1L PGA" },
 754         { "Left Output Mixer", "IN1R Switch", "IN1R PGA" },
 755
 756         { "Right Output Mixer", "Left Input Switch", "MIXINL" },
 757         { "Right Output Mixer", "Right Input Switch", "MIXINR" },
 758         { "Right Output Mixer", "IN2LN Switch", "IN2LN" },
 759         { "Right Output Mixer", "IN2RN Switch", "IN2RN" },
 760         { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" },
 761         { "Right Output Mixer", "IN1L Switch", "IN1L PGA" },
 762         { "Right Output Mixer", "IN1R Switch", "IN1R PGA" },
 763
 764         { "Left Output PGA", NULL, "Left Output Mixer" },
 765         { "Left Output PGA", NULL, "TOCLK" },
 766
 767         { "Right Output PGA", NULL, "Right Output Mixer" },
 768         { "Right Output PGA", NULL, "TOCLK" },
 769
 770         { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" },
 771         { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" },
 772         { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" },
 773
 774         { "Earpiece Driver", NULL, "VMID" },
 775         { "Earpiece Driver", NULL, "Earpiece Mixer" },
 776         { "HPOUT2N", NULL, "Earpiece Driver" },
 777         { "HPOUT2P", NULL, "Earpiece Driver" },
 778
 779         { "SPKL", "Input Switch", "MIXINL" },
 780         { "SPKL", "IN1LP Switch", "IN1LP" },
 781         { "SPKL", "Output Switch", "Left Output PGA" },
 782         { "SPKL", NULL, "TOCLK" },
 783
 784         { "SPKR", "Input Switch", "MIXINR" },
 785         { "SPKR", "IN1RP Switch", "IN1RP" },
 786         { "SPKR", "Output Switch", "Right Output PGA" },
 787         { "SPKR", NULL, "TOCLK" },
 788
 789         { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
 790         { "SPKL Boost", "SPKL Switch", "SPKL" },
 791         { "SPKL Boost", "SPKR Switch", "SPKR" },
 792
 793         { "SPKR Boost", "Direct Voice Switch", "Direct Voice" },
 794         { "SPKR Boost", "SPKR Switch", "SPKR" },
 795         { "SPKR Boost", "SPKL Switch", "SPKL" },
 796
 797         { "SPKL Driver", NULL, "VMID" },
 798         { "SPKL Driver", NULL, "SPKL Boost" },
 799         { "SPKL Driver", NULL, "CLK_SYS" },
 800
 801         { "SPKR Driver", NULL, "VMID" },
 802         { "SPKR Driver", NULL, "SPKR Boost" },
 803         { "SPKR Driver", NULL, "CLK_SYS" },
 804
 805         { "SPKOUTLP", NULL, "SPKL Driver" },
 806         { "SPKOUTLN", NULL, "SPKL Driver" },
 807         { "SPKOUTRP", NULL, "SPKR Driver" },
 808         { "SPKOUTRN", NULL, "SPKR Driver" },
 809
 810         { "Left Headphone Mux", "Mixer", "Left Output PGA" },
 811         { "Right Headphone Mux", "Mixer", "Right Output PGA" },
 812
 813         { "Headphone PGA", NULL, "Left Headphone Mux" },
 814         { "Headphone PGA", NULL, "Right Headphone Mux" },
 815         { "Headphone PGA", NULL, "VMID" },
 816         { "Headphone PGA", NULL, "CLK_SYS" },
 817         { "Headphone PGA", NULL, "Headphone Supply" },
 818
 819         { "HPOUT1L", NULL, "Headphone PGA" },
 820         { "HPOUT1R", NULL, "Headphone PGA" },
 821
 822         { "LINEOUT1N Driver", NULL, "VMID" },
 823         { "LINEOUT1P Driver", NULL, "VMID" },
 824         { "LINEOUT2N Driver", NULL, "VMID" },
 825         { "LINEOUT2P Driver", NULL, "VMID" },
 826
 827         { "LINEOUT1N", NULL, "LINEOUT1N Driver" },
 828         { "LINEOUT1P", NULL, "LINEOUT1P Driver" },
 829         { "LINEOUT2N", NULL, "LINEOUT2N Driver" },
 830         { "LINEOUT2P", NULL, "LINEOUT2P Driver" },
 831 };
 832
 833 static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
 834         { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
 835         { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
 836         { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
 837
 838         { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
 839         { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
 840 };
 841
 842 static const struct snd_soc_dapm_route lineout1_se_routes[] = {
 843         { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
 844         { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
 845
 846         { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
 847
 848         { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
 849         { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
 850 };
 851
 852 static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
 853         { "LINEOUT2 Mixer", "IN2L Switch", "IN2L PGA" },
 854         { "LINEOUT2 Mixer", "IN2R Switch", "IN2R PGA" },
 855         { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
 856
 857         { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
 858         { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
 859 };
 860
 861 static const struct snd_soc_dapm_route lineout2_se_routes[] = {
 862         { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
 863         { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
 864
 865         { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
 866
 867         { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
 868         { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
 869 };
 870
 871 int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec)
 872 {
 873         struct snd_soc_dapm_context *dapm = &codec->dapm;
 874
 875         /* Latch volume update bits & default ZC on */
 876         snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME,
 877                             WM8993_IN1_VU, WM8993_IN1_VU);
 878         snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME,
 879                             WM8993_IN1_VU, WM8993_IN1_VU);
 880         snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME,
 881                             WM8993_IN2_VU, WM8993_IN2_VU);
 882         snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
 883                             WM8993_IN2_VU, WM8993_IN2_VU);
 884
 885         snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
 886                             WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
 887         snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
 888                             WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
 889
 890         snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
 891                             WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
 892                             WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
 893         snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
 894                             WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
 895                             WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
 896
 897         snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
 898                             WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
 899                             WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
 900         snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
 901                             WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
 902                             WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
 903
 904         snd_soc_add_controls(codec, analogue_snd_controls,
 905                              ARRAY_SIZE(analogue_snd_controls));
 906
 907         snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets,
 908                                   ARRAY_SIZE(analogue_dapm_widgets));
 909         return 0;
 910 }
 911 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls);
 912
 913 int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec,
 914                                 int lineout1_diff, int lineout2_diff)
 915 {
 916         struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec);
 917         struct snd_soc_dapm_context *dapm = &codec->dapm;
 918
 919         init_completion(&hubs->dcs_done);
 920
 921         snd_soc_dapm_add_routes(dapm, analogue_routes,
 922                                 ARRAY_SIZE(analogue_routes));
 923
 924         if (lineout1_diff)
 925                 snd_soc_dapm_add_routes(dapm,
 926                                         lineout1_diff_routes,
 927                                         ARRAY_SIZE(lineout1_diff_routes));
 928         else
 929                 snd_soc_dapm_add_routes(dapm,
 930                                         lineout1_se_routes,
 931                                         ARRAY_SIZE(lineout1_se_routes));
 932
 933         if (lineout2_diff)
 934                 snd_soc_dapm_add_routes(dapm,
 935                                         lineout2_diff_routes,
 936                                         ARRAY_SIZE(lineout2_diff_routes));
 937         else
 938                 snd_soc_dapm_add_routes(dapm,
 939                                         lineout2_se_routes,
 940                                         ARRAY_SIZE(lineout2_se_routes));
 941
 942         return 0;
 943 }
 944 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes);
 945
 946 int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec,
 947                                   int lineout1_diff, int lineout2_diff,
 948                                   int lineout1fb, int lineout2fb,
 949                                   int jd_scthr, int jd_thr, int micbias1_lvl,
 950                                   int micbias2_lvl)
 951 {
 952         if (!lineout1_diff)
 953                 snd_soc_update_bits(codec, WM8993_LINE_MIXER1,
 954                                     WM8993_LINEOUT1_MODE,
 955                                     WM8993_LINEOUT1_MODE);
 956         if (!lineout2_diff)
 957                 snd_soc_update_bits(codec, WM8993_LINE_MIXER2,
 958                                     WM8993_LINEOUT2_MODE,
 959                                     WM8993_LINEOUT2_MODE);
 960
 961         /* If the line outputs are differential then we aren't presenting
 962          * VMID as an output and can disable it.
 963          */
 964         if (lineout1_diff && lineout2_diff)
 965                 codec->dapm.idle_bias_off = 1;
 966
 967         if (lineout1fb)
 968                 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
 969                                     WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB);
 970
 971         if (lineout2fb)
 972                 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL,
 973                                     WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB);
 974
 975         snd_soc_update_bits(codec, WM8993_MICBIAS,
 976                             WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK |
 977                             WM8993_MICB1_LVL | WM8993_MICB2_LVL,
 978                             jd_scthr << WM8993_JD_SCTHR_SHIFT |
 979                             jd_thr << WM8993_JD_THR_SHIFT |
 980                             micbias1_lvl |
 981                             micbias2_lvl << WM8993_MICB2_LVL_SHIFT);
 982
 983         return 0;
 984 }
 985 EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata);
 986
 987 MODULE_DESCRIPTION("Shared support for Wolfson hubs products");
 988 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
 989 MODULE_LICENSE("GPL");