arch/mips/momentum/jaguar_atx/irq.c

   1 /*
   2  * Copyright (C) 2002 Momentum Computer, Inc.
   3  * Author: Matthew Dharm, mdharm@momenco.com
   4  *
   5  * Based on work by:
   6  *   Copyright (C) 2000 RidgeRun, Inc.
   7  *   Author: RidgeRun, Inc.
   8  *   glonnon@ridgerun.com, skranz@ridgerun.com, stevej@ridgerun.com
   9  *
  10  *   Copyright 2001 MontaVista Software Inc.
  11  *   Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
  12  *
  13  *   Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org)
  14  *
  15  *  This program is free software; you can redistribute  it and/or modify it
  16  *  under  the terms of  the GNU General  Public License as published by the
  17  *  Free Software Foundation;  either version 2 of the  License, or (at your
  18  *  option) any later version.
  19  *
  20  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  21  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  22  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  23  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  24  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  25  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  26  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  27  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  28  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  29  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30  *
  31  *  You should have received a copy of the  GNU General Public License along
  32  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  33  *  675 Mass Ave, Cambridge, MA 02139, USA.
  34  */
  35 #include <linux/init.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/signal.h>
  38 #include <linux/types.h>
  39 #include <asm/irq_cpu.h>
  40 #include <asm/mipsregs.h>
  41
  42 extern asmlinkage void jaguar_handle_int(void);
  43
  44 static struct irqaction cascade_mv64340 = {
  45         no_action, SA_INTERRUPT, CPU_MASK_NONE, "MV64340-Cascade", NULL, NULL
  46 };
  47
  48 void __init arch_init_irq(void)
  49 {
  50         /*
  51          * Clear all of the interrupts while we change the able around a bit.
  52          * int-handler is not on bootstrap
  53          */
  54         clear_c0_status(ST0_IM);
  55
  56         /* Sets the first-level interrupt dispatcher. */
  57         set_except_vector(0, jaguar_handle_int);
  58         mips_cpu_irq_init(0);
  59         rm7k_cpu_irq_init(8);
  60
  61         /* set up the cascading interrupts */
  62         setup_irq(8, &cascade_mv64340);
  63
  64         mv64340_irq_init(16);
  65
  66         set_c0_status(ST0_IM);
  67 }