Linux 2.6.13-rc3
[linux-2.6/next.git] / include / asm-ppc / pci.h
bloba13d55870e62202b9045e80ac9e8b9ab7c2bb25a
1 #ifndef __PPC_PCI_H
2 #define __PPC_PCI_H
3 #ifdef __KERNEL__
5 #include <linux/types.h>
6 #include <linux/slab.h>
7 #include <linux/string.h>
8 #include <linux/mm.h>
9 #include <asm/scatterlist.h>
10 #include <asm/io.h>
11 #include <asm/pci-bridge.h>
12 #include <asm-generic/pci-dma-compat.h>
14 struct pci_dev;
16 /* Values for the `which' argument to sys_pciconfig_iobase syscall. */
17 #define IOBASE_BRIDGE_NUMBER 0
18 #define IOBASE_MEMORY 1
19 #define IOBASE_IO 2
20 #define IOBASE_ISA_IO 3
21 #define IOBASE_ISA_MEM 4
24 * Set this to 1 if you want the kernel to re-assign all PCI
25 * bus numbers
27 extern int pci_assign_all_busses;
29 #define pcibios_assign_all_busses() (pci_assign_all_busses)
30 #define pcibios_scan_all_fns(a, b) 0
32 #define PCIBIOS_MIN_IO 0x1000
33 #define PCIBIOS_MIN_MEM 0x10000000
35 extern inline void pcibios_set_master(struct pci_dev *dev)
37 /* No special bus mastering setup handling */
40 extern inline void pcibios_penalize_isa_irq(int irq, int active)
42 /* We don't do dynamic PCI IRQ allocation */
45 extern unsigned long pci_resource_to_bus(struct pci_dev *pdev, struct resource *res);
48 * The PCI bus bridge can translate addresses issued by the processor(s)
49 * into a different address on the PCI bus. On 32-bit cpus, we assume
50 * this mapping is 1-1, but on 64-bit systems it often isn't.
52 * Obsolete ! Drivers should now use pci_resource_to_bus
54 extern unsigned long phys_to_bus(unsigned long pa);
55 extern unsigned long pci_phys_to_bus(unsigned long pa, int busnr);
56 extern unsigned long pci_bus_to_phys(unsigned int ba, int busnr);
58 /* The PCI address space does equal the physical memory
59 * address space. The networking and block device layers use
60 * this boolean for bounce buffer decisions.
62 #define PCI_DMA_BUS_IS_PHYS (1)
64 /* pci_unmap_{page,single} is a nop so... */
65 #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
66 #define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
67 #define pci_unmap_addr(PTR, ADDR_NAME) (0)
68 #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
69 #define pci_unmap_len(PTR, LEN_NAME) (0)
70 #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
72 #ifdef CONFIG_PCI
73 static inline void pci_dma_burst_advice(struct pci_dev *pdev,
74 enum pci_dma_burst_strategy *strat,
75 unsigned long *strategy_parameter)
77 *strat = PCI_DMA_BURST_INFINITY;
78 *strategy_parameter = ~0UL;
80 #endif
83 * At present there are very few 32-bit PPC machines that can have
84 * memory above the 4GB point, and we don't support that.
86 #define pci_dac_dma_supported(pci_dev, mask) (0)
88 /* Return the index of the PCI controller for device PDEV. */
89 #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
91 /* Set the name of the bus as it appears in /proc/bus/pci */
92 static inline int pci_proc_domain(struct pci_bus *bus)
94 return 0;
97 /* Map a range of PCI memory or I/O space for a device into user space */
98 int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
99 enum pci_mmap_state mmap_state, int write_combine);
101 /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
102 #define HAVE_PCI_MMAP 1
104 extern void
105 pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
106 struct resource *res);
108 extern void pcibios_add_platform_entries(struct pci_dev *dev);
110 struct file;
111 extern pgprot_t pci_phys_mem_access_prot(struct file *file,
112 unsigned long offset,
113 unsigned long size,
114 pgprot_t prot);
116 #define HAVE_ARCH_PCI_RESOURCE_TO_USER
117 extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
118 const struct resource *rsrc,
119 u64 *start, u64 *end);
122 #endif /* __KERNEL__ */
124 #endif /* __PPC_PCI_H */