1 #ifndef __ASM_CPU_SH3_RTC_H
2 #define __ASM_CPU_SH3_RTC_H
5 #define R64CNT 0xfffffec0
6 #define RSECCNT 0xfffffec2
7 #define RMINCNT 0xfffffec4
8 #define RHRCNT 0xfffffec6
9 #define RWKCNT 0xfffffec8
10 #define RDAYCNT 0xfffffeca
11 #define RMONCNT 0xfffffecc
12 #define RYRCNT 0xfffffece
13 #define RSECAR 0xfffffed0
14 #define RMINAR 0xfffffed2
15 #define RHRAR 0xfffffed4
16 #define RWKAR 0xfffffed6
17 #define RDAYAR 0xfffffed8
18 #define RMONAR 0xfffffeda
19 #define RCR1 0xfffffedc
20 #define RCR2 0xfffffede
22 #define RTC_BIT_INVERTED 0 /* No bug on SH7708, SH7709A */
24 #endif /* __ASM_CPU_SH3_RTC_H */