2 * core.c - DesignWare USB3 DRD Controller Core file
4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com
7 * Authors: Felipe Balbi <balbi@ti.com>,
8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de>
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions, and the following disclaimer,
15 * without modification.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. The names of the above-listed copyright holders may not be used
20 * to endorse or promote products derived from this software without
21 * specific prior written permission.
23 * ALTERNATIVELY, this software may be distributed under the terms of the
24 * GNU General Public License ("GPL") version 2, as published by the Free
25 * Software Foundation.
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
28 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
29 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
31 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
32 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
33 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
34 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
35 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
36 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
37 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
40 #include <linux/kernel.h>
41 #include <linux/slab.h>
42 #include <linux/spinlock.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_runtime.h>
45 #include <linux/interrupt.h>
46 #include <linux/ioport.h>
48 #include <linux/list.h>
49 #include <linux/delay.h>
50 #include <linux/dma-mapping.h>
52 #include <linux/usb/ch9.h>
53 #include <linux/usb/gadget.h>
62 * dwc3_core_soft_reset - Issues core soft reset and PHY reset
63 * @dwc: pointer to our context structure
65 static void dwc3_core_soft_reset(struct dwc3
*dwc
)
69 /* Before Resetting PHY, put Core in Reset */
70 reg
= dwc3_readl(dwc
->regs
, DWC3_GCTL
);
71 reg
|= DWC3_GCTL_CORESOFTRESET
;
72 dwc3_writel(dwc
->regs
, DWC3_GCTL
, reg
);
74 /* Assert USB3 PHY reset */
75 reg
= dwc3_readl(dwc
->regs
, DWC3_GUSB3PIPECTL(0));
76 reg
|= DWC3_GUSB3PIPECTL_PHYSOFTRST
;
77 dwc3_writel(dwc
->regs
, DWC3_GUSB3PIPECTL(0), reg
);
79 /* Assert USB2 PHY reset */
80 reg
= dwc3_readl(dwc
->regs
, DWC3_GUSB2PHYCFG(0));
81 reg
|= DWC3_GUSB2PHYCFG_PHYSOFTRST
;
82 dwc3_writel(dwc
->regs
, DWC3_GUSB2PHYCFG(0), reg
);
86 /* Clear USB3 PHY reset */
87 reg
= dwc3_readl(dwc
->regs
, DWC3_GUSB3PIPECTL(0));
88 reg
&= ~DWC3_GUSB3PIPECTL_PHYSOFTRST
;
89 dwc3_writel(dwc
->regs
, DWC3_GUSB3PIPECTL(0), reg
);
91 /* Clear USB2 PHY reset */
92 reg
= dwc3_readl(dwc
->regs
, DWC3_GUSB2PHYCFG(0));
93 reg
&= ~DWC3_GUSB2PHYCFG_PHYSOFTRST
;
94 dwc3_writel(dwc
->regs
, DWC3_GUSB2PHYCFG(0), reg
);
96 /* After PHYs are stable we can take Core out of reset state */
97 reg
= dwc3_readl(dwc
->regs
, DWC3_GCTL
);
98 reg
&= ~DWC3_GCTL_CORESOFTRESET
;
99 dwc3_writel(dwc
->regs
, DWC3_GCTL
, reg
);
103 * dwc3_free_one_event_buffer - Frees one event buffer
104 * @dwc: Pointer to our controller context structure
105 * @evt: Pointer to event buffer to be freed
107 static void dwc3_free_one_event_buffer(struct dwc3
*dwc
,
108 struct dwc3_event_buffer
*evt
)
110 dma_free_coherent(dwc
->dev
, evt
->length
, evt
->buf
, evt
->dma
);
115 * dwc3_alloc_one_event_buffer - Allocated one event buffer structure
116 * @dwc: Pointer to our controller context structure
117 * @length: size of the event buffer
119 * Returns a pointer to the allocated event buffer structure on succes
120 * otherwise ERR_PTR(errno).
122 static struct dwc3_event_buffer
*__devinit
123 dwc3_alloc_one_event_buffer(struct dwc3
*dwc
, unsigned length
)
125 struct dwc3_event_buffer
*evt
;
127 evt
= kzalloc(sizeof(*evt
), GFP_KERNEL
);
129 return ERR_PTR(-ENOMEM
);
132 evt
->length
= length
;
133 evt
->buf
= dma_alloc_coherent(dwc
->dev
, length
,
134 &evt
->dma
, GFP_KERNEL
);
137 return ERR_PTR(-ENOMEM
);
144 * dwc3_free_event_buffers - frees all allocated event buffers
145 * @dwc: Pointer to our controller context structure
147 static void dwc3_free_event_buffers(struct dwc3
*dwc
)
149 struct dwc3_event_buffer
*evt
;
152 for (i
= 0; i
< DWC3_EVENT_BUFFERS_NUM
; i
++) {
153 evt
= dwc
->ev_buffs
[i
];
155 dwc3_free_one_event_buffer(dwc
, evt
);
156 dwc
->ev_buffs
[i
] = NULL
;
162 * dwc3_alloc_event_buffers - Allocates @num event buffers of size @length
163 * @dwc: Pointer to out controller context structure
164 * @num: number of event buffers to allocate
165 * @length: size of event buffer
167 * Returns 0 on success otherwise negative errno. In error the case, dwc
168 * may contain some buffers allocated but not all which were requested.
170 static int __devinit
dwc3_alloc_event_buffers(struct dwc3
*dwc
, unsigned num
,
175 for (i
= 0; i
< num
; i
++) {
176 struct dwc3_event_buffer
*evt
;
178 evt
= dwc3_alloc_one_event_buffer(dwc
, length
);
180 dev_err(dwc
->dev
, "can't allocate event buffer\n");
183 dwc
->ev_buffs
[i
] = evt
;
190 * dwc3_event_buffers_setup - setup our allocated event buffers
191 * @dwc: Pointer to out controller context structure
193 * Returns 0 on success otherwise negative errno.
195 static int __devinit
dwc3_event_buffers_setup(struct dwc3
*dwc
)
197 struct dwc3_event_buffer
*evt
;
200 for (n
= 0; n
< DWC3_EVENT_BUFFERS_NUM
; n
++) {
201 evt
= dwc
->ev_buffs
[n
];
202 dev_dbg(dwc
->dev
, "Event buf %p dma %08llx length %d\n",
203 evt
->buf
, (unsigned long long) evt
->dma
,
206 dwc3_writel(dwc
->regs
, DWC3_GEVNTADRLO(n
),
207 lower_32_bits(evt
->dma
));
208 dwc3_writel(dwc
->regs
, DWC3_GEVNTADRHI(n
),
209 upper_32_bits(evt
->dma
));
210 dwc3_writel(dwc
->regs
, DWC3_GEVNTSIZ(n
),
211 evt
->length
& 0xffff);
212 dwc3_writel(dwc
->regs
, DWC3_GEVNTCOUNT(n
), 0);
218 static void dwc3_event_buffers_cleanup(struct dwc3
*dwc
)
220 struct dwc3_event_buffer
*evt
;
223 for (n
= 0; n
< DWC3_EVENT_BUFFERS_NUM
; n
++) {
224 evt
= dwc
->ev_buffs
[n
];
225 dwc3_writel(dwc
->regs
, DWC3_GEVNTADRLO(n
), 0);
226 dwc3_writel(dwc
->regs
, DWC3_GEVNTADRHI(n
), 0);
227 dwc3_writel(dwc
->regs
, DWC3_GEVNTSIZ(n
), 0);
228 dwc3_writel(dwc
->regs
, DWC3_GEVNTCOUNT(n
), 0);
233 * dwc3_core_init - Low-level initialization of DWC3 Core
234 * @dwc: Pointer to our controller context structure
236 * Returns 0 on success otherwise negative errno.
238 static int __devinit
dwc3_core_init(struct dwc3
*dwc
)
240 unsigned long timeout
;
244 dwc3_core_soft_reset(dwc
);
246 /* issue device SoftReset too */
247 timeout
= jiffies
+ msecs_to_jiffies(500);
248 dwc3_writel(dwc
->regs
, DWC3_DCTL
, DWC3_DCTL_CSFTRST
);
250 reg
= dwc3_readl(dwc
->regs
, DWC3_DCTL
);
251 if (!(reg
& DWC3_DCTL_CSFTRST
))
254 if (time_after(jiffies
, timeout
)) {
255 dev_err(dwc
->dev
, "Reset Timed Out\n");
263 reg
= dwc3_readl(dwc
->regs
, DWC3_GSNPSID
);
264 /* This should read as U3 followed by revision number */
265 if ((reg
& DWC3_GSNPSID_MASK
) != 0x55330000) {
266 dev_err(dwc
->dev
, "this is not a DesignWare USB3 DRD Core\n");
271 dwc
->revision
= reg
& DWC3_GSNPSREV_MASK
;
273 ret
= dwc3_alloc_event_buffers(dwc
, DWC3_EVENT_BUFFERS_NUM
,
274 DWC3_EVENT_BUFFERS_SIZE
);
276 dev_err(dwc
->dev
, "failed to allocate event buffers\n");
281 ret
= dwc3_event_buffers_setup(dwc
);
283 dev_err(dwc
->dev
, "failed to setup event buffers\n");
290 dwc3_free_event_buffers(dwc
);
296 static void dwc3_core_exit(struct dwc3
*dwc
)
298 dwc3_event_buffers_cleanup(dwc
);
299 dwc3_free_event_buffers(dwc
);
302 #define DWC3_ALIGN_MASK (16 - 1)
304 static int __devinit
dwc3_probe(struct platform_device
*pdev
)
306 const struct platform_device_id
*id
= platform_get_device_id(pdev
);
307 struct resource
*res
;
310 unsigned int features
= id
->driver_data
;
315 mem
= kzalloc(sizeof(*dwc
) + DWC3_ALIGN_MASK
, GFP_KERNEL
);
317 dev_err(&pdev
->dev
, "not enough memory\n");
320 dwc
= PTR_ALIGN(mem
, DWC3_ALIGN_MASK
+ 1);
323 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
325 dev_err(&pdev
->dev
, "missing resource\n");
329 res
= request_mem_region(res
->start
, resource_size(res
),
330 dev_name(&pdev
->dev
));
332 dev_err(&pdev
->dev
, "can't request mem region\n");
336 regs
= ioremap(res
->start
, resource_size(res
));
338 dev_err(&pdev
->dev
, "ioremap failed\n");
342 irq
= platform_get_irq(pdev
, 0);
344 dev_err(&pdev
->dev
, "missing IRQ\n");
348 spin_lock_init(&dwc
->lock
);
349 platform_set_drvdata(pdev
, dwc
);
352 dwc
->regs_size
= resource_size(res
);
353 dwc
->dev
= &pdev
->dev
;
356 pm_runtime_enable(&pdev
->dev
);
357 pm_runtime_get_sync(&pdev
->dev
);
358 pm_runtime_forbid(&pdev
->dev
);
360 ret
= dwc3_core_init(dwc
);
362 dev_err(&pdev
->dev
, "failed to initialize core\n");
366 if (features
& DWC3_HAS_PERIPHERAL
) {
367 ret
= dwc3_gadget_init(dwc
);
369 dev_err(&pdev
->dev
, "failed to initialized gadget\n");
374 ret
= dwc3_debugfs_init(dwc
);
376 dev_err(&pdev
->dev
, "failed to initialize debugfs\n");
380 pm_runtime_allow(&pdev
->dev
);
385 if (features
& DWC3_HAS_PERIPHERAL
)
386 dwc3_gadget_exit(dwc
);
395 release_mem_region(res
->start
, resource_size(res
));
404 static int __devexit
dwc3_remove(struct platform_device
*pdev
)
406 const struct platform_device_id
*id
= platform_get_device_id(pdev
);
407 struct dwc3
*dwc
= platform_get_drvdata(pdev
);
408 struct resource
*res
;
409 unsigned int features
= id
->driver_data
;
411 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
413 pm_runtime_put(&pdev
->dev
);
414 pm_runtime_disable(&pdev
->dev
);
416 dwc3_debugfs_exit(dwc
);
418 if (features
& DWC3_HAS_PERIPHERAL
)
419 dwc3_gadget_exit(dwc
);
422 release_mem_region(res
->start
, resource_size(res
));
429 static const struct platform_device_id dwc3_id_table
[] __devinitconst
= {
432 .driver_data
= (DWC3_HAS_PERIPHERAL
438 .driver_data
= DWC3_HAS_PERIPHERAL
,
440 { }, /* Terminating Entry */
442 MODULE_DEVICE_TABLE(platform
, dwc3_id_table
);
444 static struct platform_driver dwc3_driver
= {
446 .remove
= __devexit_p(dwc3_remove
),
450 .id_table
= dwc3_id_table
,
453 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
454 MODULE_LICENSE("Dual BSD/GPL");
455 MODULE_DESCRIPTION("DesignWare USB3 DRD Controller Driver");
457 static int __devinit
dwc3_init(void)
459 return platform_driver_register(&dwc3_driver
);
461 module_init(dwc3_init
);
463 static void __exit
dwc3_exit(void)
465 platform_driver_unregister(&dwc3_driver
);
467 module_exit(dwc3_exit
);