2 * wm8958-dsp2.c -- WM8958 DSP2 support
4 * Copyright 2011 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
18 #include <linux/i2c.h>
19 #include <linux/platform_device.h>
20 #include <linux/slab.h>
21 #include <sound/soc.h>
22 #include <sound/initval.h>
23 #include <sound/tlv.h>
24 #include <trace/events/asoc.h>
26 #include <linux/mfd/wm8994/core.h>
27 #include <linux/mfd/wm8994/registers.h>
28 #include <linux/mfd/wm8994/pdata.h>
29 #include <linux/mfd/wm8994/gpio.h>
33 #define WM_FW_BLOCK_INFO 0xff
34 #define WM_FW_BLOCK_PM 0x00
35 #define WM_FW_BLOCK_X 0x01
36 #define WM_FW_BLOCK_Y 0x02
37 #define WM_FW_BLOCK_Z 0x03
38 #define WM_FW_BLOCK_I 0x06
39 #define WM_FW_BLOCK_A 0x08
40 #define WM_FW_BLOCK_C 0x0c
42 static int wm8958_dsp2_fw(struct snd_soc_codec
*codec
, const char *name
,
43 const struct firmware
*fw
, bool check
)
45 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
50 size_t block_len
, len
;
53 /* Suppress unneeded downloads */
54 if (wm8994
->cur_fw
== fw
)
58 dev_err(codec
->dev
, "%s: firmware too short\n", name
);
62 if (memcmp(fw
->data
, "WMFW", 4) != 0) {
63 dev_err(codec
->dev
, "%s: firmware has bad file magic %08x\n",
68 memcpy(&data32
, fw
->data
+ 4, sizeof(data32
));
69 len
= be32_to_cpu(data32
);
71 memcpy(&data32
, fw
->data
+ 8, sizeof(data32
));
72 data32
= be32_to_cpu(data32
);
73 if ((data32
>> 24) & 0xff) {
74 dev_err(codec
->dev
, "%s: unsupported firmware version %d\n",
75 name
, (data32
>> 24) & 0xff);
78 if ((data32
& 0xffff) != 8958) {
79 dev_err(codec
->dev
, "%s: unsupported target device %d\n",
80 name
, data32
& 0xffff);
83 if (((data32
>> 16) & 0xff) != 0xc) {
84 dev_err(codec
->dev
, "%s: unsupported target core %d\n",
85 name
, (data32
>> 16) & 0xff);
90 memcpy(&data64
, fw
->data
+ 24, sizeof(u64
));
91 dev_info(codec
->dev
, "%s timestamp %llx\n",
92 name
, be64_to_cpu(data64
));
94 snd_soc_write(codec
, 0x102, 0x2);
95 snd_soc_write(codec
, 0x900, 0x2);
98 data
= fw
->data
+ len
;
102 dev_err(codec
->dev
, "%s short data block of %zd\n",
107 memcpy(&data32
, data
+ 4, sizeof(data32
));
108 block_len
= be32_to_cpu(data32
);
109 if (block_len
+ 8 > len
) {
110 dev_err(codec
->dev
, "%zd byte block longer than file\n",
114 if (block_len
== 0) {
115 dev_err(codec
->dev
, "Zero length block\n");
119 memcpy(&data32
, data
, sizeof(data32
));
120 data32
= be32_to_cpu(data32
);
122 switch ((data32
>> 24) & 0xff) {
123 case WM_FW_BLOCK_INFO
:
124 /* Informational text */
128 str
= kzalloc(block_len
+ 1, GFP_KERNEL
);
130 memcpy(str
, data
+ 8, block_len
);
131 dev_info(codec
->dev
, "%s: %s\n", name
, str
);
134 dev_err(codec
->dev
, "Out of memory\n");
144 dev_dbg(codec
->dev
, "%s: %zd bytes of %x@%x\n", name
,
145 block_len
, (data32
>> 24) & 0xff,
153 wm8994_bulk_write(codec
->control_data
,
160 dev_warn(codec
->dev
, "%s: unknown block type %d\n",
161 name
, (data32
>> 24) & 0xff);
165 /* Round up to the next 32 bit word */
166 block_len
+= block_len
% 4;
168 data
+= block_len
+ 8;
169 len
-= block_len
+ 8;
173 dev_dbg(codec
->dev
, "%s: download done\n", name
);
176 dev_info(codec
->dev
, "%s: got firmware\n", name
);
185 snd_soc_write(codec
, 0x900, 0x0);
186 snd_soc_write(codec
, 0x102, 0x0);
192 static void wm8958_dsp_start_mbc(struct snd_soc_codec
*codec
, int path
)
194 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
195 struct wm8994_pdata
*pdata
= wm8994
->pdata
;
198 /* If the DSP is already running then noop */
199 if (snd_soc_read(codec
, WM8958_DSP2_PROGRAM
) & WM8958_DSP2_ENA
)
202 /* If we have MBC firmware download it */
204 wm8958_dsp2_fw(codec
, "MBC", wm8994
->mbc
, false);
206 snd_soc_update_bits(codec
, WM8958_DSP2_PROGRAM
,
207 WM8958_DSP2_ENA
, WM8958_DSP2_ENA
);
209 /* If we've got user supplied MBC settings use them */
210 if (pdata
&& pdata
->num_mbc_cfgs
) {
211 struct wm8958_mbc_cfg
*cfg
212 = &pdata
->mbc_cfgs
[wm8994
->mbc_cfg
];
214 for (i
= 0; i
< ARRAY_SIZE(cfg
->coeff_regs
); i
++)
215 snd_soc_write(codec
, i
+ WM8958_MBC_BAND_1_K_1
,
218 for (i
= 0; i
< ARRAY_SIZE(cfg
->cutoff_regs
); i
++)
220 i
+ WM8958_MBC_BAND_2_LOWER_CUTOFF_C1_1
,
221 cfg
->cutoff_regs
[i
]);
225 snd_soc_write(codec
, WM8958_DSP2_EXECCONTROL
,
229 snd_soc_update_bits(codec
, WM8958_DSP2_CONFIG
,
232 path
<< WM8958_MBC_SEL_SHIFT
|
236 static void wm8958_dsp_start_vss(struct snd_soc_codec
*codec
, int path
)
238 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
239 struct wm8994_pdata
*pdata
= wm8994
->pdata
;
243 wm8958_dsp2_fw(codec
, "MBC+VSS", wm8994
->mbc_vss
, false);
245 snd_soc_update_bits(codec
, WM8958_DSP2_PROGRAM
,
246 WM8958_DSP2_ENA
, WM8958_DSP2_ENA
);
248 /* If we've got user supplied settings use them */
249 if (pdata
&& pdata
->num_mbc_cfgs
) {
250 struct wm8958_mbc_cfg
*cfg
251 = &pdata
->mbc_cfgs
[wm8994
->mbc_cfg
];
253 for (i
= 0; i
< ARRAY_SIZE(cfg
->combined_regs
); i
++)
254 snd_soc_write(codec
, i
+ 0x2800,
255 cfg
->combined_regs
[i
]);
258 if (pdata
&& pdata
->num_vss_cfgs
) {
259 struct wm8958_vss_cfg
*cfg
260 = &pdata
->vss_cfgs
[wm8994
->vss_cfg
];
262 for (i
= 0; i
< ARRAY_SIZE(cfg
->regs
); i
++)
263 snd_soc_write(codec
, i
+ 0x2600, cfg
->regs
[i
]);
266 if (pdata
&& pdata
->num_vss_hpf_cfgs
) {
267 struct wm8958_vss_hpf_cfg
*cfg
268 = &pdata
->vss_hpf_cfgs
[wm8994
->vss_hpf_cfg
];
270 for (i
= 0; i
< ARRAY_SIZE(cfg
->regs
); i
++)
271 snd_soc_write(codec
, i
+ 0x2400, cfg
->regs
[i
]);
275 snd_soc_write(codec
, WM8958_DSP2_EXECCONTROL
,
278 /* Enable the algorithms we've selected */
280 if (wm8994
->mbc_ena
[path
])
282 if (wm8994
->hpf2_ena
[path
])
284 if (wm8994
->hpf1_ena
[path
])
286 if (wm8994
->vss_ena
[path
])
289 snd_soc_write(codec
, 0x2201, ena
);
291 /* Switch the DSP into the data path */
292 snd_soc_update_bits(codec
, WM8958_DSP2_CONFIG
,
293 WM8958_MBC_SEL_MASK
| WM8958_MBC_ENA
,
294 path
<< WM8958_MBC_SEL_SHIFT
| WM8958_MBC_ENA
);
297 static void wm8958_dsp_start_enh_eq(struct snd_soc_codec
*codec
, int path
)
299 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
300 struct wm8994_pdata
*pdata
= wm8994
->pdata
;
303 wm8958_dsp2_fw(codec
, "ENH_EQ", wm8994
->enh_eq
, false);
305 snd_soc_update_bits(codec
, WM8958_DSP2_PROGRAM
,
306 WM8958_DSP2_ENA
, WM8958_DSP2_ENA
);
308 /* If we've got user supplied settings use them */
309 if (pdata
&& pdata
->num_enh_eq_cfgs
) {
310 struct wm8958_enh_eq_cfg
*cfg
311 = &pdata
->enh_eq_cfgs
[wm8994
->enh_eq_cfg
];
313 for (i
= 0; i
< ARRAY_SIZE(cfg
->regs
); i
++)
314 snd_soc_write(codec
, i
+ 0x2200,
319 snd_soc_write(codec
, WM8958_DSP2_EXECCONTROL
,
322 /* Switch the DSP into the data path */
323 snd_soc_update_bits(codec
, WM8958_DSP2_CONFIG
,
324 WM8958_MBC_SEL_MASK
| WM8958_MBC_ENA
,
325 path
<< WM8958_MBC_SEL_SHIFT
| WM8958_MBC_ENA
);
328 static void wm8958_dsp_apply(struct snd_soc_codec
*codec
, int path
, int start
)
330 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
331 int pwr_reg
= snd_soc_read(codec
, WM8994_POWER_MANAGEMENT_5
);
336 pwr_reg
&= (WM8994_AIF1DAC1L_ENA
| WM8994_AIF1DAC1R_ENA
);
340 pwr_reg
&= (WM8994_AIF1DAC2L_ENA
| WM8994_AIF1DAC2R_ENA
);
344 pwr_reg
&= (WM8994_AIF2DACL_ENA
| WM8994_AIF2DACR_ENA
);
352 /* Do we have both an active AIF and an active algorithm? */
353 ena
= wm8994
->mbc_ena
[path
] || wm8994
->vss_ena
[path
] ||
354 wm8994
->hpf1_ena
[path
] || wm8994
->hpf2_ena
[path
] ||
355 wm8994
->enh_eq_ena
[path
];
359 reg
= snd_soc_read(codec
, WM8958_DSP2_PROGRAM
);
361 dev_dbg(codec
->dev
, "DSP path %d %d startup: %d, power: %x, DSP: %x\n",
362 path
, wm8994
->dsp_active
, start
, pwr_reg
, reg
);
365 /* If the DSP is already running then noop */
366 if (reg
& WM8958_DSP2_ENA
)
369 /* If either AIFnCLK is not yet enabled postpone */
370 if (!(snd_soc_read(codec
, WM8994_AIF1_CLOCKING_1
)
371 & WM8994_AIF1CLK_ENA_MASK
) &&
372 !(snd_soc_read(codec
, WM8994_AIF2_CLOCKING_1
)
373 & WM8994_AIF2CLK_ENA_MASK
))
376 /* Switch the clock over to the appropriate AIF */
377 snd_soc_update_bits(codec
, WM8994_CLOCKING_1
,
378 WM8958_DSP2CLK_SRC
| WM8958_DSP2CLK_ENA
,
379 aif
<< WM8958_DSP2CLK_SRC_SHIFT
|
382 if (wm8994
->enh_eq_ena
[path
])
383 wm8958_dsp_start_enh_eq(codec
, path
);
384 else if (wm8994
->vss_ena
[path
] || wm8994
->hpf1_ena
[path
] ||
385 wm8994
->hpf2_ena
[path
])
386 wm8958_dsp_start_vss(codec
, path
);
387 else if (wm8994
->mbc_ena
[path
])
388 wm8958_dsp_start_mbc(codec
, path
);
390 wm8994
->dsp_active
= path
;
392 dev_dbg(codec
->dev
, "DSP running in path %d\n", path
);
395 if (!start
&& wm8994
->dsp_active
== path
) {
396 /* If the DSP is already stopped then noop */
397 if (!(reg
& WM8958_DSP2_ENA
))
400 snd_soc_update_bits(codec
, WM8958_DSP2_CONFIG
,
402 snd_soc_write(codec
, WM8958_DSP2_EXECCONTROL
,
404 snd_soc_update_bits(codec
, WM8958_DSP2_PROGRAM
,
406 snd_soc_update_bits(codec
, WM8994_CLOCKING_1
,
407 WM8958_DSP2CLK_ENA
, 0);
409 wm8994
->dsp_active
= -1;
411 dev_dbg(codec
->dev
, "DSP stopped\n");
415 int wm8958_aif_ev(struct snd_soc_dapm_widget
*w
,
416 struct snd_kcontrol
*kcontrol
, int event
)
418 struct snd_soc_codec
*codec
= w
->codec
;
422 case SND_SOC_DAPM_POST_PMU
:
423 case SND_SOC_DAPM_PRE_PMU
:
424 for (i
= 0; i
< 3; i
++)
425 wm8958_dsp_apply(codec
, i
, 1);
427 case SND_SOC_DAPM_POST_PMD
:
428 case SND_SOC_DAPM_PRE_PMD
:
429 for (i
= 0; i
< 3; i
++)
430 wm8958_dsp_apply(codec
, i
, 0);
437 /* Check if DSP2 is in use on another AIF */
438 static int wm8958_dsp2_busy(struct wm8994_priv
*wm8994
, int aif
)
442 for (i
= 0; i
< ARRAY_SIZE(wm8994
->mbc_ena
); i
++) {
445 if (wm8994
->mbc_ena
[i
] || wm8994
->vss_ena
[i
] ||
446 wm8994
->hpf1_ena
[i
] || wm8994
->hpf2_ena
[i
])
453 static int wm8958_put_mbc_enum(struct snd_kcontrol
*kcontrol
,
454 struct snd_ctl_elem_value
*ucontrol
)
456 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
457 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
458 struct wm8994_pdata
*pdata
= wm8994
->pdata
;
459 int value
= ucontrol
->value
.integer
.value
[0];
462 /* Don't allow on the fly reconfiguration */
463 reg
= snd_soc_read(codec
, WM8994_CLOCKING_1
);
464 if (reg
< 0 || reg
& WM8958_DSP2CLK_ENA
)
467 if (value
>= pdata
->num_mbc_cfgs
)
470 wm8994
->mbc_cfg
= value
;
475 static int wm8958_get_mbc_enum(struct snd_kcontrol
*kcontrol
,
476 struct snd_ctl_elem_value
*ucontrol
)
478 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
479 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
481 ucontrol
->value
.enumerated
.item
[0] = wm8994
->mbc_cfg
;
486 static int wm8958_mbc_info(struct snd_kcontrol
*kcontrol
,
487 struct snd_ctl_elem_info
*uinfo
)
489 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
491 uinfo
->value
.integer
.min
= 0;
492 uinfo
->value
.integer
.max
= 1;
496 static int wm8958_mbc_get(struct snd_kcontrol
*kcontrol
,
497 struct snd_ctl_elem_value
*ucontrol
)
499 int mbc
= kcontrol
->private_value
;
500 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
501 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
503 ucontrol
->value
.integer
.value
[0] = wm8994
->mbc_ena
[mbc
];
508 static int wm8958_mbc_put(struct snd_kcontrol
*kcontrol
,
509 struct snd_ctl_elem_value
*ucontrol
)
511 int mbc
= kcontrol
->private_value
;
512 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
513 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
515 if (wm8994
->mbc_ena
[mbc
] == ucontrol
->value
.integer
.value
[0])
518 if (ucontrol
->value
.integer
.value
[0] > 1)
521 if (wm8958_dsp2_busy(wm8994
, mbc
)) {
522 dev_dbg(codec
->dev
, "DSP2 active on %d already\n", mbc
);
526 if (wm8994
->enh_eq_ena
[mbc
])
529 wm8994
->mbc_ena
[mbc
] = ucontrol
->value
.integer
.value
[0];
531 wm8958_dsp_apply(codec
, mbc
, wm8994
->mbc_ena
[mbc
]);
536 #define WM8958_MBC_SWITCH(xname, xval) {\
537 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
538 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
539 .info = wm8958_mbc_info, \
540 .get = wm8958_mbc_get, .put = wm8958_mbc_put, \
541 .private_value = xval }
543 static int wm8958_put_vss_enum(struct snd_kcontrol
*kcontrol
,
544 struct snd_ctl_elem_value
*ucontrol
)
546 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
547 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
548 struct wm8994_pdata
*pdata
= wm8994
->pdata
;
549 int value
= ucontrol
->value
.integer
.value
[0];
552 /* Don't allow on the fly reconfiguration */
553 reg
= snd_soc_read(codec
, WM8994_CLOCKING_1
);
554 if (reg
< 0 || reg
& WM8958_DSP2CLK_ENA
)
557 if (value
>= pdata
->num_vss_cfgs
)
560 wm8994
->vss_cfg
= value
;
565 static int wm8958_get_vss_enum(struct snd_kcontrol
*kcontrol
,
566 struct snd_ctl_elem_value
*ucontrol
)
568 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
569 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
571 ucontrol
->value
.enumerated
.item
[0] = wm8994
->vss_cfg
;
576 static int wm8958_put_vss_hpf_enum(struct snd_kcontrol
*kcontrol
,
577 struct snd_ctl_elem_value
*ucontrol
)
579 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
580 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
581 struct wm8994_pdata
*pdata
= wm8994
->pdata
;
582 int value
= ucontrol
->value
.integer
.value
[0];
585 /* Don't allow on the fly reconfiguration */
586 reg
= snd_soc_read(codec
, WM8994_CLOCKING_1
);
587 if (reg
< 0 || reg
& WM8958_DSP2CLK_ENA
)
590 if (value
>= pdata
->num_vss_hpf_cfgs
)
593 wm8994
->vss_hpf_cfg
= value
;
598 static int wm8958_get_vss_hpf_enum(struct snd_kcontrol
*kcontrol
,
599 struct snd_ctl_elem_value
*ucontrol
)
601 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
602 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
604 ucontrol
->value
.enumerated
.item
[0] = wm8994
->vss_hpf_cfg
;
609 static int wm8958_vss_info(struct snd_kcontrol
*kcontrol
,
610 struct snd_ctl_elem_info
*uinfo
)
612 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
614 uinfo
->value
.integer
.min
= 0;
615 uinfo
->value
.integer
.max
= 1;
619 static int wm8958_vss_get(struct snd_kcontrol
*kcontrol
,
620 struct snd_ctl_elem_value
*ucontrol
)
622 int vss
= kcontrol
->private_value
;
623 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
624 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
626 ucontrol
->value
.integer
.value
[0] = wm8994
->vss_ena
[vss
];
631 static int wm8958_vss_put(struct snd_kcontrol
*kcontrol
,
632 struct snd_ctl_elem_value
*ucontrol
)
634 int vss
= kcontrol
->private_value
;
635 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
636 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
638 if (wm8994
->vss_ena
[vss
] == ucontrol
->value
.integer
.value
[0])
641 if (ucontrol
->value
.integer
.value
[0] > 1)
644 if (!wm8994
->mbc_vss
)
647 if (wm8958_dsp2_busy(wm8994
, vss
)) {
648 dev_dbg(codec
->dev
, "DSP2 active on %d already\n", vss
);
652 if (wm8994
->enh_eq_ena
[vss
])
655 wm8994
->vss_ena
[vss
] = ucontrol
->value
.integer
.value
[0];
657 wm8958_dsp_apply(codec
, vss
, wm8994
->vss_ena
[vss
]);
663 #define WM8958_VSS_SWITCH(xname, xval) {\
664 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
665 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
666 .info = wm8958_vss_info, \
667 .get = wm8958_vss_get, .put = wm8958_vss_put, \
668 .private_value = xval }
670 static int wm8958_hpf_info(struct snd_kcontrol
*kcontrol
,
671 struct snd_ctl_elem_info
*uinfo
)
673 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
675 uinfo
->value
.integer
.min
= 0;
676 uinfo
->value
.integer
.max
= 1;
680 static int wm8958_hpf_get(struct snd_kcontrol
*kcontrol
,
681 struct snd_ctl_elem_value
*ucontrol
)
683 int hpf
= kcontrol
->private_value
;
684 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
685 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
688 ucontrol
->value
.integer
.value
[0] = wm8994
->hpf1_ena
[hpf
% 3];
690 ucontrol
->value
.integer
.value
[0] = wm8994
->hpf2_ena
[hpf
% 3];
695 static int wm8958_hpf_put(struct snd_kcontrol
*kcontrol
,
696 struct snd_ctl_elem_value
*ucontrol
)
698 int hpf
= kcontrol
->private_value
;
699 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
700 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
703 if (wm8994
->hpf1_ena
[hpf
% 3] ==
704 ucontrol
->value
.integer
.value
[0])
707 if (wm8994
->hpf2_ena
[hpf
% 3] ==
708 ucontrol
->value
.integer
.value
[0])
712 if (ucontrol
->value
.integer
.value
[0] > 1)
715 if (!wm8994
->mbc_vss
)
718 if (wm8958_dsp2_busy(wm8994
, hpf
% 3)) {
719 dev_dbg(codec
->dev
, "DSP2 active on %d already\n", hpf
);
723 if (wm8994
->enh_eq_ena
[hpf
% 3])
727 wm8994
->hpf1_ena
[hpf
% 3] = ucontrol
->value
.integer
.value
[0];
729 wm8994
->hpf2_ena
[hpf
% 3] = ucontrol
->value
.integer
.value
[0];
731 wm8958_dsp_apply(codec
, hpf
% 3, ucontrol
->value
.integer
.value
[0]);
736 #define WM8958_HPF_SWITCH(xname, xval) {\
737 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
738 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
739 .info = wm8958_hpf_info, \
740 .get = wm8958_hpf_get, .put = wm8958_hpf_put, \
741 .private_value = xval }
743 static int wm8958_put_enh_eq_enum(struct snd_kcontrol
*kcontrol
,
744 struct snd_ctl_elem_value
*ucontrol
)
746 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
747 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
748 struct wm8994_pdata
*pdata
= wm8994
->pdata
;
749 int value
= ucontrol
->value
.integer
.value
[0];
752 /* Don't allow on the fly reconfiguration */
753 reg
= snd_soc_read(codec
, WM8994_CLOCKING_1
);
754 if (reg
< 0 || reg
& WM8958_DSP2CLK_ENA
)
757 if (value
>= pdata
->num_enh_eq_cfgs
)
760 wm8994
->enh_eq_cfg
= value
;
765 static int wm8958_get_enh_eq_enum(struct snd_kcontrol
*kcontrol
,
766 struct snd_ctl_elem_value
*ucontrol
)
768 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
769 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
771 ucontrol
->value
.enumerated
.item
[0] = wm8994
->enh_eq_cfg
;
776 static int wm8958_enh_eq_info(struct snd_kcontrol
*kcontrol
,
777 struct snd_ctl_elem_info
*uinfo
)
779 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
781 uinfo
->value
.integer
.min
= 0;
782 uinfo
->value
.integer
.max
= 1;
786 static int wm8958_enh_eq_get(struct snd_kcontrol
*kcontrol
,
787 struct snd_ctl_elem_value
*ucontrol
)
789 int eq
= kcontrol
->private_value
;
790 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
791 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
793 ucontrol
->value
.integer
.value
[0] = wm8994
->enh_eq_ena
[eq
];
798 static int wm8958_enh_eq_put(struct snd_kcontrol
*kcontrol
,
799 struct snd_ctl_elem_value
*ucontrol
)
801 int eq
= kcontrol
->private_value
;
802 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
803 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
805 if (wm8994
->enh_eq_ena
[eq
] == ucontrol
->value
.integer
.value
[0])
808 if (ucontrol
->value
.integer
.value
[0] > 1)
814 if (wm8958_dsp2_busy(wm8994
, eq
)) {
815 dev_dbg(codec
->dev
, "DSP2 active on %d already\n", eq
);
819 if (wm8994
->mbc_ena
[eq
] || wm8994
->vss_ena
[eq
] ||
820 wm8994
->hpf1_ena
[eq
] || wm8994
->hpf2_ena
[eq
])
823 wm8994
->enh_eq_ena
[eq
] = ucontrol
->value
.integer
.value
[0];
825 wm8958_dsp_apply(codec
, eq
, ucontrol
->value
.integer
.value
[0]);
830 #define WM8958_ENH_EQ_SWITCH(xname, xval) {\
831 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
832 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,\
833 .info = wm8958_enh_eq_info, \
834 .get = wm8958_enh_eq_get, .put = wm8958_enh_eq_put, \
835 .private_value = xval }
837 static const struct snd_kcontrol_new wm8958_mbc_snd_controls
[] = {
838 WM8958_MBC_SWITCH("AIF1DAC1 MBC Switch", 0),
839 WM8958_MBC_SWITCH("AIF1DAC2 MBC Switch", 1),
840 WM8958_MBC_SWITCH("AIF2DAC MBC Switch", 2),
843 static const struct snd_kcontrol_new wm8958_vss_snd_controls
[] = {
844 WM8958_VSS_SWITCH("AIF1DAC1 VSS Switch", 0),
845 WM8958_VSS_SWITCH("AIF1DAC2 VSS Switch", 1),
846 WM8958_VSS_SWITCH("AIF2DAC VSS Switch", 2),
847 WM8958_HPF_SWITCH("AIF1DAC1 HPF1 Switch", 0),
848 WM8958_HPF_SWITCH("AIF1DAC2 HPF1 Switch", 1),
849 WM8958_HPF_SWITCH("AIF2DAC HPF1 Switch", 2),
850 WM8958_HPF_SWITCH("AIF1DAC1 HPF2 Switch", 3),
851 WM8958_HPF_SWITCH("AIF1DAC2 HPF2 Switch", 4),
852 WM8958_HPF_SWITCH("AIF2DAC HPF2 Switch", 5),
855 static const struct snd_kcontrol_new wm8958_enh_eq_snd_controls
[] = {
856 WM8958_ENH_EQ_SWITCH("AIF1DAC1 Enhanced EQ Switch", 0),
857 WM8958_ENH_EQ_SWITCH("AIF1DAC2 Enhanced EQ Switch", 1),
858 WM8958_ENH_EQ_SWITCH("AIF2DAC Enhanced EQ Switch", 2),
861 static void wm8958_enh_eq_loaded(const struct firmware
*fw
, void *context
)
863 struct snd_soc_codec
*codec
= context
;
864 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
866 if (fw
&& (wm8958_dsp2_fw(codec
, "ENH_EQ", fw
, true) == 0)) {
867 mutex_lock(&codec
->mutex
);
869 mutex_unlock(&codec
->mutex
);
873 static void wm8958_mbc_vss_loaded(const struct firmware
*fw
, void *context
)
875 struct snd_soc_codec
*codec
= context
;
876 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
878 if (fw
&& (wm8958_dsp2_fw(codec
, "MBC+VSS", fw
, true) == 0)) {
879 mutex_lock(&codec
->mutex
);
880 wm8994
->mbc_vss
= fw
;
881 mutex_unlock(&codec
->mutex
);
884 /* We can't have more than one request outstanding at once so
887 request_firmware_nowait(THIS_MODULE
, FW_ACTION_HOTPLUG
,
888 "wm8958_enh_eq.wfw", codec
->dev
, GFP_KERNEL
,
889 codec
, wm8958_enh_eq_loaded
);
892 static void wm8958_mbc_loaded(const struct firmware
*fw
, void *context
)
894 struct snd_soc_codec
*codec
= context
;
895 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
897 if (wm8958_dsp2_fw(codec
, "MBC", fw
, true) != 0)
900 mutex_lock(&codec
->mutex
);
902 mutex_unlock(&codec
->mutex
);
904 /* We can't have more than one request outstanding at once so
907 request_firmware_nowait(THIS_MODULE
, FW_ACTION_HOTPLUG
,
908 "wm8958_mbc_vss.wfw", codec
->dev
, GFP_KERNEL
,
909 codec
, wm8958_mbc_vss_loaded
);
912 void wm8958_dsp2_init(struct snd_soc_codec
*codec
)
914 struct wm8994_priv
*wm8994
= snd_soc_codec_get_drvdata(codec
);
915 struct wm8994_pdata
*pdata
= wm8994
->pdata
;
918 wm8994
->dsp_active
= -1;
920 snd_soc_add_controls(codec
, wm8958_mbc_snd_controls
,
921 ARRAY_SIZE(wm8958_mbc_snd_controls
));
922 snd_soc_add_controls(codec
, wm8958_vss_snd_controls
,
923 ARRAY_SIZE(wm8958_vss_snd_controls
));
924 snd_soc_add_controls(codec
, wm8958_enh_eq_snd_controls
,
925 ARRAY_SIZE(wm8958_enh_eq_snd_controls
));
928 /* We don't *require* firmware and don't want to delay boot */
929 request_firmware_nowait(THIS_MODULE
, FW_ACTION_HOTPLUG
,
930 "wm8958_mbc.wfw", codec
->dev
, GFP_KERNEL
,
931 codec
, wm8958_mbc_loaded
);
936 if (pdata
->num_mbc_cfgs
) {
937 struct snd_kcontrol_new control
[] = {
938 SOC_ENUM_EXT("MBC Mode", wm8994
->mbc_enum
,
939 wm8958_get_mbc_enum
, wm8958_put_mbc_enum
),
942 /* We need an array of texts for the enum API */
943 wm8994
->mbc_texts
= kmalloc(sizeof(char *)
944 * pdata
->num_mbc_cfgs
, GFP_KERNEL
);
945 if (!wm8994
->mbc_texts
) {
946 dev_err(wm8994
->codec
->dev
,
947 "Failed to allocate %d MBC config texts\n",
948 pdata
->num_mbc_cfgs
);
952 for (i
= 0; i
< pdata
->num_mbc_cfgs
; i
++)
953 wm8994
->mbc_texts
[i
] = pdata
->mbc_cfgs
[i
].name
;
955 wm8994
->mbc_enum
.max
= pdata
->num_mbc_cfgs
;
956 wm8994
->mbc_enum
.texts
= wm8994
->mbc_texts
;
958 ret
= snd_soc_add_controls(wm8994
->codec
, control
, 1);
960 dev_err(wm8994
->codec
->dev
,
961 "Failed to add MBC mode controls: %d\n", ret
);
964 if (pdata
->num_vss_cfgs
) {
965 struct snd_kcontrol_new control
[] = {
966 SOC_ENUM_EXT("VSS Mode", wm8994
->vss_enum
,
967 wm8958_get_vss_enum
, wm8958_put_vss_enum
),
970 /* We need an array of texts for the enum API */
971 wm8994
->vss_texts
= kmalloc(sizeof(char *)
972 * pdata
->num_vss_cfgs
, GFP_KERNEL
);
973 if (!wm8994
->vss_texts
) {
974 dev_err(wm8994
->codec
->dev
,
975 "Failed to allocate %d VSS config texts\n",
976 pdata
->num_vss_cfgs
);
980 for (i
= 0; i
< pdata
->num_vss_cfgs
; i
++)
981 wm8994
->vss_texts
[i
] = pdata
->vss_cfgs
[i
].name
;
983 wm8994
->vss_enum
.max
= pdata
->num_vss_cfgs
;
984 wm8994
->vss_enum
.texts
= wm8994
->vss_texts
;
986 ret
= snd_soc_add_controls(wm8994
->codec
, control
, 1);
988 dev_err(wm8994
->codec
->dev
,
989 "Failed to add VSS mode controls: %d\n", ret
);
992 if (pdata
->num_vss_hpf_cfgs
) {
993 struct snd_kcontrol_new control
[] = {
994 SOC_ENUM_EXT("VSS HPF Mode", wm8994
->vss_hpf_enum
,
995 wm8958_get_vss_hpf_enum
,
996 wm8958_put_vss_hpf_enum
),
999 /* We need an array of texts for the enum API */
1000 wm8994
->vss_hpf_texts
= kmalloc(sizeof(char *)
1001 * pdata
->num_vss_hpf_cfgs
, GFP_KERNEL
);
1002 if (!wm8994
->vss_hpf_texts
) {
1003 dev_err(wm8994
->codec
->dev
,
1004 "Failed to allocate %d VSS HPF config texts\n",
1005 pdata
->num_vss_hpf_cfgs
);
1009 for (i
= 0; i
< pdata
->num_vss_hpf_cfgs
; i
++)
1010 wm8994
->vss_hpf_texts
[i
] = pdata
->vss_hpf_cfgs
[i
].name
;
1012 wm8994
->vss_hpf_enum
.max
= pdata
->num_vss_hpf_cfgs
;
1013 wm8994
->vss_hpf_enum
.texts
= wm8994
->vss_hpf_texts
;
1015 ret
= snd_soc_add_controls(wm8994
->codec
, control
, 1);
1017 dev_err(wm8994
->codec
->dev
,
1018 "Failed to add VSS HPFmode controls: %d\n",
1022 if (pdata
->num_enh_eq_cfgs
) {
1023 struct snd_kcontrol_new control
[] = {
1024 SOC_ENUM_EXT("Enhanced EQ Mode", wm8994
->enh_eq_enum
,
1025 wm8958_get_enh_eq_enum
,
1026 wm8958_put_enh_eq_enum
),
1029 /* We need an array of texts for the enum API */
1030 wm8994
->enh_eq_texts
= kmalloc(sizeof(char *)
1031 * pdata
->num_enh_eq_cfgs
, GFP_KERNEL
);
1032 if (!wm8994
->enh_eq_texts
) {
1033 dev_err(wm8994
->codec
->dev
,
1034 "Failed to allocate %d enhanced EQ config texts\n",
1035 pdata
->num_enh_eq_cfgs
);
1039 for (i
= 0; i
< pdata
->num_enh_eq_cfgs
; i
++)
1040 wm8994
->enh_eq_texts
[i
] = pdata
->enh_eq_cfgs
[i
].name
;
1042 wm8994
->enh_eq_enum
.max
= pdata
->num_enh_eq_cfgs
;
1043 wm8994
->enh_eq_enum
.texts
= wm8994
->enh_eq_texts
;
1045 ret
= snd_soc_add_controls(wm8994
->codec
, control
, 1);
1047 dev_err(wm8994
->codec
->dev
,
1048 "Failed to add enhanced EQ controls: %d\n",