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Linux 2.6.22-rc3
[linux-2.6/next.git] / drivers / rtc / rtc-vr41xx.c
blobaf7596ef29e2d837f2c9c8ea6b6d4fc7b7d37102
1 /*
2 * Driver for NEC VR4100 series Real Time Clock unit.
3 *
4 * Copyright (C) 2003-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20 #include <linux/fs.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/irq.h>
24 #include <linux/module.h>
25 #include <linux/platform_device.h>
26 #include <linux/rtc.h>
27 #include <linux/spinlock.h>
28 #include <linux/types.h>
29
30 #include <asm/div64.h>
31 #include <asm/io.h>
32 #include <asm/uaccess.h>
33 #include <asm/vr41xx/irq.h>
34
35 MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
36 MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
37 MODULE_LICENSE("GPL");
38
39 #define RTC1_TYPE1_START 0x0b0000c0UL
40 #define RTC1_TYPE1_END 0x0b0000dfUL
41 #define RTC2_TYPE1_START 0x0b0001c0UL
42 #define RTC2_TYPE1_END 0x0b0001dfUL
43
44 #define RTC1_TYPE2_START 0x0f000100UL
45 #define RTC1_TYPE2_END 0x0f00011fUL
46 #define RTC2_TYPE2_START 0x0f000120UL
47 #define RTC2_TYPE2_END 0x0f00013fUL
48
49 #define RTC1_SIZE 0x20
50 #define RTC2_SIZE 0x20
51
52 /* RTC 1 registers */
53 #define ETIMELREG 0x00
54 #define ETIMEMREG 0x02
55 #define ETIMEHREG 0x04
56 /* RFU */
57 #define ECMPLREG 0x08
58 #define ECMPMREG 0x0a
59 #define ECMPHREG 0x0c
60 /* RFU */
61 #define RTCL1LREG 0x10
62 #define RTCL1HREG 0x12
63 #define RTCL1CNTLREG 0x14
64 #define RTCL1CNTHREG 0x16
65 #define RTCL2LREG 0x18
66 #define RTCL2HREG 0x1a
67 #define RTCL2CNTLREG 0x1c
68 #define RTCL2CNTHREG 0x1e
69
70 /* RTC 2 registers */
71 #define TCLKLREG 0x00
72 #define TCLKHREG 0x02
73 #define TCLKCNTLREG 0x04
74 #define TCLKCNTHREG 0x06
75 /* RFU */
76 #define RTCINTREG 0x1e
77 #define TCLOCK_INT 0x08
78 #define RTCLONG2_INT 0x04
79 #define RTCLONG1_INT 0x02
80 #define ELAPSEDTIME_INT 0x01
81
82 #define RTC_FREQUENCY 32768
83 #define MAX_PERIODIC_RATE 6553
84
85 static void __iomem *rtc1_base;
86 static void __iomem *rtc2_base;
87
88 #define rtc1_read(offset) readw(rtc1_base + (offset))
89 #define rtc1_write(offset, value) writew((value), rtc1_base + (offset))
90
91 #define rtc2_read(offset) readw(rtc2_base + (offset))
92 #define rtc2_write(offset, value) writew((value), rtc2_base + (offset))
93
94 static unsigned long epoch = 1970; /* Jan 1 1970 00:00:00 */
95
96 static DEFINE_SPINLOCK(rtc_lock);
97 static char rtc_name[] = "RTC";
98 static unsigned long periodic_frequency;
99 static unsigned long periodic_count;
100 static unsigned int alarm_enabled;
101
102 struct resource rtc_resource[2] = {
103 { .name = rtc_name,
104 .flags = IORESOURCE_MEM, },
105 { .name = rtc_name,
106 .flags = IORESOURCE_MEM, },
107 };
108
109 static inline unsigned long read_elapsed_second(void)
110 {
111
112 unsigned long first_low, first_mid, first_high;
113
114 unsigned long second_low, second_mid, second_high;
115
116 do {
117 first_low = rtc1_read(ETIMELREG);
118 first_mid = rtc1_read(ETIMEMREG);
119 first_high = rtc1_read(ETIMEHREG);
120 second_low = rtc1_read(ETIMELREG);
121 second_mid = rtc1_read(ETIMEMREG);
122 second_high = rtc1_read(ETIMEHREG);
123 } while (first_low != second_low || first_mid != second_mid ||
124 first_high != second_high);
125
126 return (first_high << 17) | (first_mid << 1) | (first_low >> 15);
127 }
128
129 static inline void write_elapsed_second(unsigned long sec)
130 {
131 spin_lock_irq(&rtc_lock);
132
133 rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
134 rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
135 rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
136
137 spin_unlock_irq(&rtc_lock);
138 }
139
140 static void vr41xx_rtc_release(struct device *dev)
141 {
142
143 spin_lock_irq(&rtc_lock);
144
145 rtc1_write(ECMPLREG, 0);
146 rtc1_write(ECMPMREG, 0);
147 rtc1_write(ECMPHREG, 0);
148 rtc1_write(RTCL1LREG, 0);
149 rtc1_write(RTCL1HREG, 0);
150
151 spin_unlock_irq(&rtc_lock);
152
153 disable_irq(ELAPSEDTIME_IRQ);
154 disable_irq(RTCLONG1_IRQ);
155 }
156
157 static int vr41xx_rtc_read_time(struct device *dev, struct rtc_time *time)
158 {
159 unsigned long epoch_sec, elapsed_sec;
160
161 epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
162 elapsed_sec = read_elapsed_second();
163
164 rtc_time_to_tm(epoch_sec + elapsed_sec, time);
165
166 return 0;
167 }
168
169 static int vr41xx_rtc_set_time(struct device *dev, struct rtc_time *time)
170 {
171 unsigned long epoch_sec, current_sec;
172
173 epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
174 current_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
175 time->tm_hour, time->tm_min, time->tm_sec);
176
177 write_elapsed_second(current_sec - epoch_sec);
178
179 return 0;
180 }
181
182 static int vr41xx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
183 {
184 unsigned long low, mid, high;
185 struct rtc_time *time = &wkalrm->time;
186
187 spin_lock_irq(&rtc_lock);
188
189 low = rtc1_read(ECMPLREG);
190 mid = rtc1_read(ECMPMREG);
191 high = rtc1_read(ECMPHREG);
192 wkalrm->enabled = alarm_enabled;
193
194 spin_unlock_irq(&rtc_lock);
195
196 rtc_time_to_tm((high << 17) | (mid << 1) | (low >> 15), time);
197
198 return 0;
199 }
200
201 static int vr41xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
202 {
203 unsigned long alarm_sec;
204 struct rtc_time *time = &wkalrm->time;
205
206 alarm_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
207 time->tm_hour, time->tm_min, time->tm_sec);
208
209 spin_lock_irq(&rtc_lock);
210
211 if (alarm_enabled)
212 disable_irq(ELAPSEDTIME_IRQ);
213
214 rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
215 rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
216 rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
217
218 if (wkalrm->enabled)
219 enable_irq(ELAPSEDTIME_IRQ);
220
221 alarm_enabled = wkalrm->enabled;
222
223 spin_unlock_irq(&rtc_lock);
224
225 return 0;
226 }
227
228 static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
229 {
230 unsigned long count;
231
232 switch (cmd) {
233 case RTC_AIE_ON:
234 spin_lock_irq(&rtc_lock);
235
236 if (!alarm_enabled) {
237 enable_irq(ELAPSEDTIME_IRQ);
238 alarm_enabled = 1;
239 }
240
241 spin_unlock_irq(&rtc_lock);
242 break;
243 case RTC_AIE_OFF:
244 spin_lock_irq(&rtc_lock);
245
246 if (alarm_enabled) {
247 disable_irq(ELAPSEDTIME_IRQ);
248 alarm_enabled = 0;
249 }
250
251 spin_unlock_irq(&rtc_lock);
252 break;
253 case RTC_PIE_ON:
254 enable_irq(RTCLONG1_IRQ);
255 break;
256 case RTC_PIE_OFF:
257 disable_irq(RTCLONG1_IRQ);
258 break;
259 case RTC_IRQP_READ:
260 return put_user(periodic_frequency, (unsigned long __user *)arg);
261 break;
262 case RTC_IRQP_SET:
263 if (arg > MAX_PERIODIC_RATE)
264 return -EINVAL;
265
266 periodic_frequency = arg;
267
268 count = RTC_FREQUENCY;
269 do_div(count, arg);
270
271 periodic_count = count;
272
273 spin_lock_irq(&rtc_lock);
274
275 rtc1_write(RTCL1LREG, count);
276 rtc1_write(RTCL1HREG, count >> 16);
277
278 spin_unlock_irq(&rtc_lock);
279 break;
280 case RTC_EPOCH_READ:
281 return put_user(epoch, (unsigned long __user *)arg);
282 case RTC_EPOCH_SET:
283 /* Doesn't support before 1900 */
284 if (arg < 1900)
285 return -EINVAL;
286 epoch = arg;
287 break;
288 default:
289 return -ENOIOCTLCMD;
290 }
291
292 return 0;
293 }
294
295 static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id)
296 {
297 struct platform_device *pdev = (struct platform_device *)dev_id;
298 struct rtc_device *rtc = platform_get_drvdata(pdev);
299
300 rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
301
302 rtc_update_irq(rtc, 1, RTC_AF);
303
304 return IRQ_HANDLED;
305 }
306
307 static irqreturn_t rtclong1_interrupt(int irq, void *dev_id)
308 {
309 struct platform_device *pdev = (struct platform_device *)dev_id;
310 struct rtc_device *rtc = platform_get_drvdata(pdev);
311 unsigned long count = periodic_count;
312
313 rtc2_write(RTCINTREG, RTCLONG1_INT);
314
315 rtc1_write(RTCL1LREG, count);
316 rtc1_write(RTCL1HREG, count >> 16);
317
318 rtc_update_irq(rtc, 1, RTC_PF);
319
320 return IRQ_HANDLED;
321 }
322
323 static const struct rtc_class_ops vr41xx_rtc_ops = {
324 .release = vr41xx_rtc_release,
325 .ioctl = vr41xx_rtc_ioctl,
326 .read_time = vr41xx_rtc_read_time,
327 .set_time = vr41xx_rtc_set_time,
328 .read_alarm = vr41xx_rtc_read_alarm,
329 .set_alarm = vr41xx_rtc_set_alarm,
330 };
331
332 static int __devinit rtc_probe(struct platform_device *pdev)
333 {
334 struct rtc_device *rtc;
335 unsigned int irq;
336 int retval;
337
338 if (pdev->num_resources != 2)
339 return -EBUSY;
340
341 rtc1_base = ioremap(pdev->resource[0].start, RTC1_SIZE);
342 if (rtc1_base == NULL)
343 return -EBUSY;
344
345 rtc2_base = ioremap(pdev->resource[1].start, RTC2_SIZE);
346 if (rtc2_base == NULL) {
347 iounmap(rtc1_base);
348 rtc1_base = NULL;
349 return -EBUSY;
350 }
351
352 rtc = rtc_device_register(rtc_name, &pdev->dev, &vr41xx_rtc_ops, THIS_MODULE);
353 if (IS_ERR(rtc)) {
354 iounmap(rtc1_base);
355 iounmap(rtc2_base);
356 rtc1_base = NULL;
357 rtc2_base = NULL;
358 return PTR_ERR(rtc);
359 }
360
361 spin_lock_irq(&rtc_lock);
362
363 rtc1_write(ECMPLREG, 0);
364 rtc1_write(ECMPMREG, 0);
365 rtc1_write(ECMPHREG, 0);
366 rtc1_write(RTCL1LREG, 0);
367 rtc1_write(RTCL1HREG, 0);
368
369 spin_unlock_irq(&rtc_lock);
370
371 irq = ELAPSEDTIME_IRQ;
372 retval = request_irq(irq, elapsedtime_interrupt, IRQF_DISABLED,
373 "elapsed_time", pdev);
374 if (retval == 0) {
375 irq = RTCLONG1_IRQ;
376 retval = request_irq(irq, rtclong1_interrupt, IRQF_DISABLED,
377 "rtclong1", pdev);
378 }
379
380 if (retval < 0) {
381 printk(KERN_ERR "rtc: IRQ%d is busy\n", irq);
382 rtc_device_unregister(rtc);
383 if (irq == RTCLONG1_IRQ)
384 free_irq(ELAPSEDTIME_IRQ, NULL);
385 iounmap(rtc1_base);
386 iounmap(rtc2_base);
387 rtc1_base = NULL;
388 rtc2_base = NULL;
389 return retval;
390 }
391
392 platform_set_drvdata(pdev, rtc);
393
394 disable_irq(ELAPSEDTIME_IRQ);
395 disable_irq(RTCLONG1_IRQ);
396
397 printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n");
398
399 return 0;
400 }
401
402 static int __devexit rtc_remove(struct platform_device *pdev)
403 {
404 struct rtc_device *rtc;
405
406 rtc = platform_get_drvdata(pdev);
407 if (rtc != NULL)
408 rtc_device_unregister(rtc);
409
410 platform_set_drvdata(pdev, NULL);
411
412 free_irq(ELAPSEDTIME_IRQ, NULL);
413 free_irq(RTCLONG1_IRQ, NULL);
414 if (rtc1_base != NULL)
415 iounmap(rtc1_base);
416 if (rtc2_base != NULL)
417 iounmap(rtc2_base);
418
419 return 0;
420 }
421
422 static struct platform_device *rtc_platform_device;
423
424 static struct platform_driver rtc_platform_driver = {
425 .probe = rtc_probe,
426 .remove = __devexit_p(rtc_remove),
427 .driver = {
428 .name = rtc_name,
429 .owner = THIS_MODULE,
430 },
431 };
432
433 static int __init vr41xx_rtc_init(void)
434 {
435 int retval;
436
437 switch (current_cpu_data.cputype) {
438 case CPU_VR4111:
439 case CPU_VR4121:
440 rtc_resource[0].start = RTC1_TYPE1_START;
441 rtc_resource[0].end = RTC1_TYPE1_END;
442 rtc_resource[1].start = RTC2_TYPE1_START;
443 rtc_resource[1].end = RTC2_TYPE1_END;
444 break;
445 case CPU_VR4122:
446 case CPU_VR4131:
447 case CPU_VR4133:
448 rtc_resource[0].start = RTC1_TYPE2_START;
449 rtc_resource[0].end = RTC1_TYPE2_END;
450 rtc_resource[1].start = RTC2_TYPE2_START;
451 rtc_resource[1].end = RTC2_TYPE2_END;
452 break;
453 default:
454 return -ENODEV;
455 break;
456 }
457
458 rtc_platform_device = platform_device_alloc("RTC", -1);
459 if (rtc_platform_device == NULL)
460 return -ENOMEM;
461
462 retval = platform_device_add_resources(rtc_platform_device,
463 rtc_resource, ARRAY_SIZE(rtc_resource));
464
465 if (retval == 0)
466 retval = platform_device_add(rtc_platform_device);
467
468 if (retval < 0) {
469 platform_device_put(rtc_platform_device);
470 return retval;
471 }
472
473 retval = platform_driver_register(&rtc_platform_driver);
474 if (retval < 0)
475 platform_device_unregister(rtc_platform_device);
476
477 return retval;
478 }
479
480 static void __exit vr41xx_rtc_exit(void)
481 {
482 platform_driver_unregister(&rtc_platform_driver);
483 platform_device_unregister(rtc_platform_device);
484 }
485
486 module_init(vr41xx_rtc_init);
487 module_exit(vr41xx_rtc_exit);
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