1 #ifndef _ASM_ARCH_IRQ_H
2 #define _ASM_ARCH_IRQ_H
4 #include "hwregs/intr_vect.h"
6 /* Number of non-cpu interrupts. */
7 #define NR_IRQS 0x50 /* Exceptions + IRQs */
8 #define NR_REAL_IRQS 0x20 /* IRQs */
9 #define FIRST_IRQ 0x31 /* Exception number for first IRQ */
12 /* Global IRQ vector. */
13 typedef void (*irqvectptr
)(void);
15 struct etrax_interrupt_vector
{
19 extern struct etrax_interrupt_vector
*etrax_irv
; /* head.S */
21 void mask_irq(int irq
);
22 void unmask_irq(int irq
);
24 void set_exception_vector(int n
, irqvectptr addr
);
26 /* Save registers so that they match pt_regs. */
29 "move $erp,[$sp]\n\t" \
31 "move $srp,[$sp]\n\t" \
33 "move $ccs,[$sp]\n\t" \
35 "move $spc,[$sp]\n\t" \
37 "move $mof,[$sp]\n\t" \
39 "move $srs,[$sp]\n\t" \
41 "move.d $acr,[$sp]\n\t" \
43 "movem $r13,[$sp]\n\t" \
48 #define STR(x) STR2(x)
50 #define IRQ_NAME2(nr) nr##_interrupt(void)
51 #define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
54 * The reason for setting the S-bit when debugging the kernel is that we want
55 * hardware breakpoints to remain active while we are in an exception handler.
56 * Note that we cannot simply copy S1, since we may come here from user-space,
57 * or any context where the S-bit wasn't set.
59 #ifdef CONFIG_ETRAX_KGDB
61 "move $ccs, $r10\n\t" \
62 "or.d (1<<9), $r10\n\t" \
69 * Make sure the causing IRQ is blocked, then call do_IRQ. After that, unblock
70 * and jump to ret_from_intr which is found in entry.S.
72 * The reason for blocking the IRQ is to allow an sti() before the handler,
73 * which will acknowledge the interrupt, is run. The actual blocking is made
76 #define BUILD_IRQ(nr, mask) \
80 "IRQ" #nr "_interrupt:\n\t" \
83 "move.d "#nr",$r10\n\t" \
84 "move.d $sp,$r12\n\t" \
85 "jsr crisv32_do_IRQ\n\t" \
87 "jump ret_from_intr\n\t" \
90 * This is subtle. The timer interrupt is crucial and it should not be disabled
91 * for too long. However, if it had been a normal interrupt as per BUILD_IRQ, it
92 * would have been BLOCK'ed, and then softirq's are run before we return here to
93 * UNBLOCK. If the softirq's take too much time to run, the timer irq won't run
94 * and the watchdog will kill us.
96 * Furthermore, if a lot of other irq's occur before we return here, the
97 * multiple_irq handler is run and it prioritizes the timer interrupt. However
98 * if we had BLOCK'edit here, we would not get the multiple_irq at all.
100 * The non-blocking here is based on the knowledge that the timer interrupt is
101 * registred as a fast interrupt (IRQF_DISABLED) so that we _know_ there will not
102 * be an sti() before the timer irq handler is run to acknowledge the interrupt.
104 #define BUILD_TIMER_IRQ(nr, mask) \
108 "IRQ" #nr "_interrupt:\n\t" \
111 "move.d "#nr",$r10\n\t" \
112 "move.d $sp,$r12\n\t" \
113 "jsr crisv32_do_IRQ\n\t" \
115 "jump ret_from_intr\n\t" \
118 #endif /* __ASSEMBLY__ */
119 #endif /* _ASM_ARCH_IRQ_H */