include/linux/ssb/ssb.h

   1 #ifndef LINUX_SSB_H_
   2 #define LINUX_SSB_H_
   3
   4 #include <linux/device.h>
   5 #include <linux/list.h>
   6 #include <linux/types.h>
   7 #include <linux/spinlock.h>
   8 #include <linux/pci.h>
   9 #include <linux/mod_devicetable.h>
  10 #include <linux/dma-mapping.h>
  11
  12 #include <linux/ssb/ssb_regs.h>
  13
  14
  15 struct pcmcia_device;
  16 struct ssb_bus;
  17 struct ssb_driver;
  18
  19 struct ssb_sprom {
  20         u8 revision;
  21         u8 il0mac[6];           /* MAC address for 802.11b/g */
  22         u8 et0mac[6];           /* MAC address for Ethernet */
  23         u8 et1mac[6];           /* MAC address for 802.11a */
  24         u8 et0phyaddr;          /* MII address for enet0 */
  25         u8 et1phyaddr;          /* MII address for enet1 */
  26         u8 et0mdcport;          /* MDIO for enet0 */
  27         u8 et1mdcport;          /* MDIO for enet1 */
  28         u8 board_rev;           /* Board revision number from SPROM. */
  29         u8 country_code;        /* Country Code */
  30         u16 leddc_on_time;      /* LED Powersave Duty Cycle On Count */
  31         u16 leddc_off_time;     /* LED Powersave Duty Cycle Off Count */
  32         u8 ant_available_a;     /* 2GHz antenna available bits (up to 4) */
  33         u8 ant_available_bg;    /* 5GHz antenna available bits (up to 4) */
  34         u16 pa0b0;
  35         u16 pa0b1;
  36         u16 pa0b2;
  37         u16 pa1b0;
  38         u16 pa1b1;
  39         u16 pa1b2;
  40         u16 pa1lob0;
  41         u16 pa1lob1;
  42         u16 pa1lob2;
  43         u16 pa1hib0;
  44         u16 pa1hib1;
  45         u16 pa1hib2;
  46         u8 gpio0;               /* GPIO pin 0 */
  47         u8 gpio1;               /* GPIO pin 1 */
  48         u8 gpio2;               /* GPIO pin 2 */
  49         u8 gpio3;               /* GPIO pin 3 */
  50         u16 maxpwr_bg;          /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
  51         u16 maxpwr_al;          /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
  52         u16 maxpwr_a;           /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
  53         u16 maxpwr_ah;          /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
  54         u8 itssi_a;             /* Idle TSSI Target for A-PHY */
  55         u8 itssi_bg;            /* Idle TSSI Target for B/G-PHY */
  56         u8 tri2g;               /* 2.4GHz TX isolation */
  57         u8 tri5gl;              /* 5.2GHz TX isolation */
  58         u8 tri5g;               /* 5.3GHz TX isolation */
  59         u8 tri5gh;              /* 5.8GHz TX isolation */
  60         u8 txpid2g[4];          /* 2GHz TX power index */
  61         u8 txpid5gl[4];         /* 4.9 - 5.1GHz TX power index */
  62         u8 txpid5g[4];          /* 5.1 - 5.5GHz TX power index */
  63         u8 txpid5gh[4];         /* 5.5 - ...GHz TX power index */
  64         u8 rxpo2g;              /* 2GHz RX power offset */
  65         u8 rxpo5g;              /* 5GHz RX power offset */
  66         u8 rssisav2g;           /* 2GHz RSSI params */
  67         u8 rssismc2g;
  68         u8 rssismf2g;
  69         u8 bxa2g;               /* 2GHz BX arch */
  70         u8 rssisav5g;           /* 5GHz RSSI params */
  71         u8 rssismc5g;
  72         u8 rssismf5g;
  73         u8 bxa5g;               /* 5GHz BX arch */
  74         u16 cck2gpo;            /* CCK power offset */
  75         u32 ofdm2gpo;           /* 2.4GHz OFDM power offset */
  76         u32 ofdm5glpo;          /* 5.2GHz OFDM power offset */
  77         u32 ofdm5gpo;           /* 5.3GHz OFDM power offset */
  78         u32 ofdm5ghpo;          /* 5.8GHz OFDM power offset */
  79         u16 boardflags_lo;      /* Board flags (bits 0-15) */
  80         u16 boardflags_hi;      /* Board flags (bits 16-31) */
  81         u16 boardflags2_lo;     /* Board flags (bits 32-47) */
  82         u16 boardflags2_hi;     /* Board flags (bits 48-63) */
  83         /* TODO store board flags in a single u64 */
  84
  85         /* Antenna gain values for up to 4 antennas
  86          * on each band. Values in dBm/4 (Q5.2). Negative gain means the
  87          * loss in the connectors is bigger than the gain. */
  88         struct {
  89                 struct {
  90                         s8 a0, a1, a2, a3;
  91                 } ghz24;        /* 2.4GHz band */
  92                 struct {
  93                         s8 a0, a1, a2, a3;
  94                 } ghz5;         /* 5GHz band */
  95         } antenna_gain;
  96
  97         /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
  98 };
  99
 100 /* Information about the PCB the circuitry is soldered on. */
 101 struct ssb_boardinfo {
 102         u16 vendor;
 103         u16 type;
 104         u8  rev;
 105 };
 106
 107
 108 struct ssb_device;
 109 /* Lowlevel read/write operations on the device MMIO.
 110  * Internal, don't use that outside of ssb. */
 111 struct ssb_bus_ops {
 112         u8 (*read8)(struct ssb_device *dev, u16 offset);
 113         u16 (*read16)(struct ssb_device *dev, u16 offset);
 114         u32 (*read32)(struct ssb_device *dev, u16 offset);
 115         void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
 116         void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
 117         void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
 118 #ifdef CONFIG_SSB_BLOCKIO
 119         void (*block_read)(struct ssb_device *dev, void *buffer,
 120                            size_t count, u16 offset, u8 reg_width);
 121         void (*block_write)(struct ssb_device *dev, const void *buffer,
 122                             size_t count, u16 offset, u8 reg_width);
 123 #endif
 124 };
 125
 126
 127 /* Core-ID values. */
 128 #define SSB_DEV_CHIPCOMMON      0x800
 129 #define SSB_DEV_ILINE20         0x801
 130 #define SSB_DEV_SDRAM           0x803
 131 #define SSB_DEV_PCI             0x804
 132 #define SSB_DEV_MIPS            0x805
 133 #define SSB_DEV_ETHERNET        0x806
 134 #define SSB_DEV_V90             0x807
 135 #define SSB_DEV_USB11_HOSTDEV   0x808
 136 #define SSB_DEV_ADSL            0x809
 137 #define SSB_DEV_ILINE100        0x80A
 138 #define SSB_DEV_IPSEC           0x80B
 139 #define SSB_DEV_PCMCIA          0x80D
 140 #define SSB_DEV_INTERNAL_MEM    0x80E
 141 #define SSB_DEV_MEMC_SDRAM      0x80F
 142 #define SSB_DEV_EXTIF           0x811
 143 #define SSB_DEV_80211           0x812
 144 #define SSB_DEV_MIPS_3302       0x816
 145 #define SSB_DEV_USB11_HOST      0x817
 146 #define SSB_DEV_USB11_DEV       0x818
 147 #define SSB_DEV_USB20_HOST      0x819
 148 #define SSB_DEV_USB20_DEV       0x81A
 149 #define SSB_DEV_SDIO_HOST       0x81B
 150 #define SSB_DEV_ROBOSWITCH      0x81C
 151 #define SSB_DEV_PARA_ATA        0x81D
 152 #define SSB_DEV_SATA_XORDMA     0x81E
 153 #define SSB_DEV_ETHERNET_GBIT   0x81F
 154 #define SSB_DEV_PCIE            0x820
 155 #define SSB_DEV_MIMO_PHY        0x821
 156 #define SSB_DEV_SRAM_CTRLR      0x822
 157 #define SSB_DEV_MINI_MACPHY     0x823
 158 #define SSB_DEV_ARM_1176        0x824
 159 #define SSB_DEV_ARM_7TDMI       0x825
 160
 161 /* Vendor-ID values */
 162 #define SSB_VENDOR_BROADCOM     0x4243
 163
 164 /* Some kernel subsystems poke with dev->drvdata, so we must use the
 165  * following ugly workaround to get from struct device to struct ssb_device */
 166 struct __ssb_dev_wrapper {
 167         struct device dev;
 168         struct ssb_device *sdev;
 169 };
 170
 171 struct ssb_device {
 172         /* Having a copy of the ops pointer in each dev struct
 173          * is an optimization. */
 174         const struct ssb_bus_ops *ops;
 175
 176         struct device *dev, *dma_dev;
 177
 178         struct ssb_bus *bus;
 179         struct ssb_device_id id;
 180
 181         u8 core_index;
 182         unsigned int irq;
 183
 184         /* Internal-only stuff follows. */
 185         void *drvdata;          /* Per-device data */
 186         void *devtypedata;      /* Per-devicetype (eg 802.11) data */
 187 };
 188
 189 /* Go from struct device to struct ssb_device. */
 190 static inline
 191 struct ssb_device * dev_to_ssb_dev(struct device *dev)
 192 {
 193         struct __ssb_dev_wrapper *wrap;
 194         wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
 195         return wrap->sdev;
 196 }
 197
 198 /* Device specific user data */
 199 static inline
 200 void ssb_set_drvdata(struct ssb_device *dev, void *data)
 201 {
 202         dev->drvdata = data;
 203 }
 204 static inline
 205 void * ssb_get_drvdata(struct ssb_device *dev)
 206 {
 207         return dev->drvdata;
 208 }
 209
 210 /* Devicetype specific user data. This is per device-type (not per device) */
 211 void ssb_set_devtypedata(struct ssb_device *dev, void *data);
 212 static inline
 213 void * ssb_get_devtypedata(struct ssb_device *dev)
 214 {
 215         return dev->devtypedata;
 216 }
 217
 218
 219 struct ssb_driver {
 220         const char *name;
 221         const struct ssb_device_id *id_table;
 222
 223         int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
 224         void (*remove)(struct ssb_device *dev);
 225         int (*suspend)(struct ssb_device *dev, pm_message_t state);
 226         int (*resume)(struct ssb_device *dev);
 227         void (*shutdown)(struct ssb_device *dev);
 228
 229         struct device_driver drv;
 230 };
 231 #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
 232
 233 extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
 234 #define ssb_driver_register(drv) \
 235         __ssb_driver_register(drv, THIS_MODULE)
 236
 237 extern void ssb_driver_unregister(struct ssb_driver *drv);
 238
 239
 240
 241
 242 enum ssb_bustype {
 243         SSB_BUSTYPE_SSB,        /* This SSB bus is the system bus */
 244         SSB_BUSTYPE_PCI,        /* SSB is connected to PCI bus */
 245         SSB_BUSTYPE_PCMCIA,     /* SSB is connected to PCMCIA bus */
 246         SSB_BUSTYPE_SDIO,       /* SSB is connected to SDIO bus */
 247 };
 248
 249 /* board_vendor */
 250 #define SSB_BOARDVENDOR_BCM     0x14E4  /* Broadcom */
 251 #define SSB_BOARDVENDOR_DELL    0x1028  /* Dell */
 252 #define SSB_BOARDVENDOR_HP      0x0E11  /* HP */
 253 /* board_type */
 254 #define SSB_BOARD_BCM94306MP    0x0418
 255 #define SSB_BOARD_BCM4309G      0x0421
 256 #define SSB_BOARD_BCM4306CB     0x0417
 257 #define SSB_BOARD_BCM4309MP     0x040C
 258 #define SSB_BOARD_MP4318        0x044A
 259 #define SSB_BOARD_BU4306        0x0416
 260 #define SSB_BOARD_BU4309        0x040A
 261 /* chip_package */
 262 #define SSB_CHIPPACK_BCM4712S   1       /* Small 200pin 4712 */
 263 #define SSB_CHIPPACK_BCM4712M   2       /* Medium 225pin 4712 */
 264 #define SSB_CHIPPACK_BCM4712L   0       /* Large 340pin 4712 */
 265
 266 #include <linux/ssb/ssb_driver_chipcommon.h>
 267 #include <linux/ssb/ssb_driver_mips.h>
 268 #include <linux/ssb/ssb_driver_extif.h>
 269 #include <linux/ssb/ssb_driver_pci.h>
 270
 271 struct ssb_bus {
 272         /* The MMIO area. */
 273         void __iomem *mmio;
 274
 275         const struct ssb_bus_ops *ops;
 276
 277         /* The core currently mapped into the MMIO window.
 278          * Not valid on all host-buses. So don't use outside of SSB. */
 279         struct ssb_device *mapped_device;
 280         union {
 281                 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
 282                 u8 mapped_pcmcia_seg;
 283                 /* Current SSB base address window for SDIO. */
 284                 u32 sdio_sbaddr;
 285         };
 286         /* Lock for core and segment switching.
 287          * On PCMCIA-host busses this is used to protect the whole MMIO access. */
 288         spinlock_t bar_lock;
 289
 290         /* The host-bus this backplane is running on. */
 291         enum ssb_bustype bustype;
 292         /* Pointers to the host-bus. Check bustype before using any of these pointers. */
 293         union {
 294                 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
 295                 struct pci_dev *host_pci;
 296                 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
 297                 struct pcmcia_device *host_pcmcia;
 298                 /* Pointer to the SDIO device (only if bustype == SSB_BUSTYPE_SDIO). */
 299                 struct sdio_func *host_sdio;
 300         };
 301
 302         /* See enum ssb_quirks */
 303         unsigned int quirks;
 304
 305 #ifdef CONFIG_SSB_SPROM
 306         /* Mutex to protect the SPROM writing. */
 307         struct mutex sprom_mutex;
 308 #endif
 309
 310         /* ID information about the Chip. */
 311         u16 chip_id;
 312         u8 chip_rev;
 313         u16 sprom_offset;
 314         u16 sprom_size;         /* number of words in sprom */
 315         u8 chip_package;
 316
 317         /* List of devices (cores) on the backplane. */
 318         struct ssb_device devices[SSB_MAX_NR_CORES];
 319         u8 nr_devices;
 320
 321         /* Software ID number for this bus. */
 322         unsigned int busnumber;
 323
 324         /* The ChipCommon device (if available). */
 325         struct ssb_chipcommon chipco;
 326         /* The PCI-core device (if available). */
 327         struct ssb_pcicore pcicore;
 328         /* The MIPS-core device (if available). */
 329         struct ssb_mipscore mipscore;
 330         /* The EXTif-core device (if available). */
 331         struct ssb_extif extif;
 332
 333         /* The following structure elements are not available in early
 334          * SSB initialization. Though, they are available for regular
 335          * registered drivers at any stage. So be careful when
 336          * using them in the ssb core code. */
 337
 338         /* ID information about the PCB. */
 339         struct ssb_boardinfo boardinfo;
 340         /* Contents of the SPROM. */
 341         struct ssb_sprom sprom;
 342         /* If the board has a cardbus slot, this is set to true. */
 343         bool has_cardbus_slot;
 344
 345 #ifdef CONFIG_SSB_EMBEDDED
 346         /* Lock for GPIO register access. */
 347         spinlock_t gpio_lock;
 348 #endif /* EMBEDDED */
 349
 350         /* Internal-only stuff follows. Do not touch. */
 351         struct list_head list;
 352 #ifdef CONFIG_SSB_DEBUG
 353         /* Is the bus already powered up? */
 354         bool powered_up;
 355         int power_warn_count;
 356 #endif /* DEBUG */
 357 };
 358
 359 enum ssb_quirks {
 360         /* SDIO connected card requires performing a read after writing a 32-bit value */
 361         SSB_QUIRK_SDIO_READ_AFTER_WRITE32       = (1 << 0),
 362 };
 363
 364 /* The initialization-invariants. */
 365 struct ssb_init_invariants {
 366         /* Versioning information about the PCB. */
 367         struct ssb_boardinfo boardinfo;
 368         /* The SPROM information. That's either stored in an
 369          * EEPROM or NVRAM on the board. */
 370         struct ssb_sprom sprom;
 371         /* If the board has a cardbus slot, this is set to true. */
 372         bool has_cardbus_slot;
 373 };
 374 /* Type of function to fetch the invariants. */
 375 typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
 376                                      struct ssb_init_invariants *iv);
 377
 378 /* Register a SSB system bus. get_invariants() is called after the
 379  * basic system devices are initialized.
 380  * The invariants are usually fetched from some NVRAM.
 381  * Put the invariants into the struct pointed to by iv. */
 382 extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
 383                                    unsigned long baseaddr,
 384                                    ssb_invariants_func_t get_invariants);
 385 #ifdef CONFIG_SSB_PCIHOST
 386 extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
 387                                    struct pci_dev *host_pci);
 388 #endif /* CONFIG_SSB_PCIHOST */
 389 #ifdef CONFIG_SSB_PCMCIAHOST
 390 extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
 391                                       struct pcmcia_device *pcmcia_dev,
 392                                       unsigned long baseaddr);
 393 #endif /* CONFIG_SSB_PCMCIAHOST */
 394 #ifdef CONFIG_SSB_SDIOHOST
 395 extern int ssb_bus_sdiobus_register(struct ssb_bus *bus,
 396                                     struct sdio_func *sdio_func,
 397                                     unsigned int quirks);
 398 #endif /* CONFIG_SSB_SDIOHOST */
 399
 400
 401 extern void ssb_bus_unregister(struct ssb_bus *bus);
 402
 403 /* Does the device have an SPROM? */
 404 extern bool ssb_is_sprom_available(struct ssb_bus *bus);
 405
 406 /* Set a fallback SPROM.
 407  * See kdoc at the function definition for complete documentation. */
 408 extern int ssb_arch_register_fallback_sprom(
 409                 int (*sprom_callback)(struct ssb_bus *bus,
 410                 struct ssb_sprom *out));
 411
 412 /* Suspend a SSB bus.
 413  * Call this from the parent bus suspend routine. */
 414 extern int ssb_bus_suspend(struct ssb_bus *bus);
 415 /* Resume a SSB bus.
 416  * Call this from the parent bus resume routine. */
 417 extern int ssb_bus_resume(struct ssb_bus *bus);
 418
 419 extern u32 ssb_clockspeed(struct ssb_bus *bus);
 420
 421 /* Is the device enabled in hardware? */
 422 int ssb_device_is_enabled(struct ssb_device *dev);
 423 /* Enable a device and pass device-specific SSB_TMSLOW flags.
 424  * If no device-specific flags are available, use 0. */
 425 void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
 426 /* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
 427 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
 428
 429
 430 /* Device MMIO register read/write functions. */
 431 static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
 432 {
 433         return dev->ops->read8(dev, offset);
 434 }
 435 static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
 436 {
 437         return dev->ops->read16(dev, offset);
 438 }
 439 static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
 440 {
 441         return dev->ops->read32(dev, offset);
 442 }
 443 static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
 444 {
 445         dev->ops->write8(dev, offset, value);
 446 }
 447 static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
 448 {
 449         dev->ops->write16(dev, offset, value);
 450 }
 451 static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
 452 {
 453         dev->ops->write32(dev, offset, value);
 454 }
 455 #ifdef CONFIG_SSB_BLOCKIO
 456 static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
 457                                   size_t count, u16 offset, u8 reg_width)
 458 {
 459         dev->ops->block_read(dev, buffer, count, offset, reg_width);
 460 }
 461
 462 static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
 463                                    size_t count, u16 offset, u8 reg_width)
 464 {
 465         dev->ops->block_write(dev, buffer, count, offset, reg_width);
 466 }
 467 #endif /* CONFIG_SSB_BLOCKIO */
 468
 469
 470 /* The SSB DMA API. Use this API for any DMA operation on the device.
 471  * This API basically is a wrapper that calls the correct DMA API for
 472  * the host device type the SSB device is attached to. */
 473
 474 /* Translation (routing) bits that need to be ORed to DMA
 475  * addresses before they are given to a device. */
 476 extern u32 ssb_dma_translation(struct ssb_device *dev);
 477 #define SSB_DMA_TRANSLATION_MASK        0xC0000000
 478 #define SSB_DMA_TRANSLATION_SHIFT       30
 479
 480 static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
 481 {
 482 #ifdef CONFIG_SSB_DEBUG
 483         printk(KERN_ERR "SSB: BUG! Calling DMA API for "
 484                "unsupported bustype %d\n", dev->bus->bustype);
 485 #endif /* DEBUG */
 486 }
 487
 488 #ifdef CONFIG_SSB_PCIHOST
 489 /* PCI-host wrapper driver */
 490 extern int ssb_pcihost_register(struct pci_driver *driver);
 491 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 492 {
 493         pci_unregister_driver(driver);
 494 }
 495
 496 static inline
 497 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 498 {
 499         if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
 500                 pci_set_power_state(sdev->bus->host_pci, state);
 501 }
 502 #else
 503 static inline void ssb_pcihost_unregister(struct pci_driver *driver)
 504 {
 505 }
 506
 507 static inline
 508 void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
 509 {
 510 }
 511 #endif /* CONFIG_SSB_PCIHOST */
 512
 513
 514 /* If a driver is shutdown or suspended, call this to signal
 515  * that the bus may be completely powered down. SSB will decide,
 516  * if it's really time to power down the bus, based on if there
 517  * are other devices that want to run. */
 518 extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
 519 /* Before initializing and enabling a device, call this to power-up the bus.
 520  * If you want to allow use of dynamic-power-control, pass the flag.
 521  * Otherwise static always-on powercontrol will be used. */
 522 extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
 523
 524 extern void ssb_commit_settings(struct ssb_bus *bus);
 525
 526 /* Various helper functions */
 527 extern u32 ssb_admatch_base(u32 adm);
 528 extern u32 ssb_admatch_size(u32 adm);
 529
 530 /* PCI device mapping and fixup routines.
 531  * Called from the architecture pcibios init code.
 532  * These are only available on SSB_EMBEDDED configurations. */
 533 #ifdef CONFIG_SSB_EMBEDDED
 534 int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
 535 int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
 536 #endif /* CONFIG_SSB_EMBEDDED */
 537
 538 #endif /* LINUX_SSB_H_ */