2 * linux/arch/m32r/mm/fault.c
4 * Copyright (c) 2001, 2002 Hitoshi Yamamoto, and H. Kondo
5 * Copyright (c) 2004 Naoto Sugai, NIIBE Yutaka
7 * Some code taken from i386 version.
8 * Copyright (C) 1995 Linus Torvalds
11 #include <linux/signal.h>
12 #include <linux/sched.h>
13 #include <linux/kernel.h>
14 #include <linux/errno.h>
15 #include <linux/string.h>
16 #include <linux/types.h>
17 #include <linux/ptrace.h>
18 #include <linux/mman.h>
20 #include <linux/smp.h>
21 #include <linux/interrupt.h>
22 #include <linux/init.h>
23 #include <linux/tty.h>
24 #include <linux/vt_kern.h> /* For unblank_screen() */
25 #include <linux/highmem.h>
26 #include <linux/module.h>
29 #include <asm/system.h>
30 #include <asm/uaccess.h>
31 #include <asm/hardirq.h>
32 #include <asm/mmu_context.h>
33 #include <asm/tlbflush.h>
35 extern void die(const char *, struct pt_regs
*, long);
38 asmlinkage
unsigned int tlb_entry_i_dat
;
39 asmlinkage
unsigned int tlb_entry_d_dat
;
40 #define tlb_entry_i tlb_entry_i_dat
41 #define tlb_entry_d tlb_entry_d_dat
43 unsigned int tlb_entry_i_dat
[NR_CPUS
];
44 unsigned int tlb_entry_d_dat
[NR_CPUS
];
45 #define tlb_entry_i tlb_entry_i_dat[smp_processor_id()]
46 #define tlb_entry_d tlb_entry_d_dat[smp_processor_id()]
49 extern void init_tlb(void);
51 /*======================================================================*
53 *======================================================================*
54 * This routine handles page faults. It determines the address,
55 * and the problem, and then passes it off to one of the appropriate
60 * error_code : See below
61 * address : M32R MMU MDEVA reg. (Operand ACE)
62 * : M32R BPC reg. (Instruction ACE)
65 * bit 0 == 0 means no page found, 1 means protection fault
66 * bit 1 == 0 means read, 1 means write
67 * bit 2 == 0 means kernel, 1 means user-mode
68 * bit 3 == 0 means data, 1 means instruction
69 *======================================================================*/
70 #define ACE_PROTECTION 1
72 #define ACE_USERMODE 4
73 #define ACE_INSTRUCTION 8
75 asmlinkage
void do_page_fault(struct pt_regs
*regs
, unsigned long error_code
,
76 unsigned long address
)
78 struct task_struct
*tsk
;
80 struct vm_area_struct
* vma
;
81 unsigned long page
, addr
;
87 * If BPSW IE bit enable --> set PSW IE bit
89 if (regs
->psw
& M32R_PSW_BIE
)
94 info
.si_code
= SEGV_MAPERR
;
97 * We fault-in kernel-space virtual memory on-demand. The
98 * 'reference' page table is init_mm.pgd.
100 * NOTE! We MUST NOT take any locks for this case. We may
101 * be in an interrupt or a critical region, and should
102 * only copy the information from the master page table,
105 * This verifies that the fault happens in kernel space
106 * (error_code & ACE_USERMODE) == 0, and that the fault was not a
107 * protection error (error_code & ACE_PROTECTION) == 0.
109 if (address
>= TASK_SIZE
&& !(error_code
& ACE_USERMODE
))
115 * If we're in an interrupt or have no user context or are running in an
116 * atomic region then we must not take the fault..
118 if (in_atomic() || !mm
)
119 goto bad_area_nosemaphore
;
121 /* When running in the kernel we expect faults to occur only to
122 * addresses in user space. All other faults represent errors in the
123 * kernel and should generate an OOPS. Unfortunatly, in the case of an
124 * erroneous fault occurring in a code path which already holds mmap_sem
125 * we will deadlock attempting to validate the fault against the
126 * address space. Luckily the kernel only validly references user
127 * space from well defined areas of code, which are listed in the
130 * As the vast majority of faults will be valid we will only perform
131 * the source reference check when there is a possibilty of a deadlock.
132 * Attempt to lock the address space, if we cannot we then validate the
133 * source. If this is invalid we can skip the address space check,
134 * thus avoiding the deadlock.
136 if (!down_read_trylock(&mm
->mmap_sem
)) {
137 if ((error_code
& ACE_USERMODE
) == 0 &&
138 !search_exception_tables(regs
->psw
))
139 goto bad_area_nosemaphore
;
140 down_read(&mm
->mmap_sem
);
143 vma
= find_vma(mm
, address
);
146 if (vma
->vm_start
<= address
)
148 if (!(vma
->vm_flags
& VM_GROWSDOWN
))
151 if (error_code
& ACE_USERMODE
) {
153 * accessing the stack below "spu" is always a bug.
154 * The "+ 4" is there due to the push instruction
155 * doing pre-decrement on the stack and that
156 * doesn't show up until later..
158 if (address
+ 4 < regs
->spu
)
162 if (expand_stack(vma
, address
))
165 * Ok, we have a good vm_area for this memory access, so
169 info
.si_code
= SEGV_ACCERR
;
171 switch (error_code
& (ACE_WRITE
|ACE_PROTECTION
)) {
172 default: /* 3: write, present */
174 case ACE_WRITE
: /* write, not present */
175 if (!(vma
->vm_flags
& VM_WRITE
))
179 case ACE_PROTECTION
: /* read, present */
180 case 0: /* read, not present */
181 if (!(vma
->vm_flags
& (VM_READ
| VM_EXEC
)))
186 * For instruction access exception, check if the area is executable
188 if ((error_code
& ACE_INSTRUCTION
) && !(vma
->vm_flags
& VM_EXEC
))
192 * If for any reason at all we couldn't handle the fault,
193 * make sure we exit gracefully rather than endlessly redo
196 addr
= (address
& PAGE_MASK
);
197 set_thread_fault_code(error_code
);
198 fault
= handle_mm_fault(mm
, vma
, addr
, write
? FAULT_FLAG_WRITE
: 0);
199 if (unlikely(fault
& VM_FAULT_ERROR
)) {
200 if (fault
& VM_FAULT_OOM
)
202 else if (fault
& VM_FAULT_SIGBUS
)
206 if (fault
& VM_FAULT_MAJOR
)
210 set_thread_fault_code(0);
211 up_read(&mm
->mmap_sem
);
215 * Something tried to access memory that isn't in our memory map..
216 * Fix it, but check if it's kernel or user first..
219 up_read(&mm
->mmap_sem
);
221 bad_area_nosemaphore
:
222 /* User mode accesses just cause a SIGSEGV */
223 if (error_code
& ACE_USERMODE
) {
224 tsk
->thread
.address
= address
;
225 tsk
->thread
.error_code
= error_code
| (address
>= TASK_SIZE
);
226 tsk
->thread
.trap_no
= 14;
227 info
.si_signo
= SIGSEGV
;
229 /* info.si_code has been set above */
230 info
.si_addr
= (void __user
*)address
;
231 force_sig_info(SIGSEGV
, &info
, tsk
);
236 /* Are we prepared to handle this kernel fault? */
237 if (fixup_exception(regs
))
241 * Oops. The kernel tried to access some bad page. We'll have to
242 * terminate things with extreme prejudice.
247 if (address
< PAGE_SIZE
)
248 printk(KERN_ALERT
"Unable to handle kernel NULL pointer dereference");
250 printk(KERN_ALERT
"Unable to handle kernel paging request");
251 printk(" at virtual address %08lx\n",address
);
252 printk(KERN_ALERT
" printing bpc:\n");
253 printk("%08lx\n", regs
->bpc
);
254 page
= *(unsigned long *)MPTB
;
255 page
= ((unsigned long *) page
)[address
>> PGDIR_SHIFT
];
256 printk(KERN_ALERT
"*pde = %08lx\n", page
);
257 if (page
& _PAGE_PRESENT
) {
259 address
&= 0x003ff000;
260 page
= ((unsigned long *) __va(page
))[address
>> PAGE_SHIFT
];
261 printk(KERN_ALERT
"*pte = %08lx\n", page
);
263 die("Oops", regs
, error_code
);
268 * We ran out of memory, or some other thing happened to us that made
269 * us unable to handle the page fault gracefully.
272 up_read(&mm
->mmap_sem
);
273 if (!(error_code
& ACE_USERMODE
))
275 pagefault_out_of_memory();
279 up_read(&mm
->mmap_sem
);
281 /* Kernel mode? Handle exception or die */
282 if (!(error_code
& ACE_USERMODE
))
285 tsk
->thread
.address
= address
;
286 tsk
->thread
.error_code
= error_code
;
287 tsk
->thread
.trap_no
= 14;
288 info
.si_signo
= SIGBUS
;
290 info
.si_code
= BUS_ADRERR
;
291 info
.si_addr
= (void __user
*)address
;
292 force_sig_info(SIGBUS
, &info
, tsk
);
298 * Synchronize this task's top level page-table
299 * with the 'reference' page table.
301 * Do _not_ use "tsk" here. We might be inside
302 * an interrupt in the middle of a task switch..
304 int offset
= pgd_index(address
);
309 pgd
= (pgd_t
*)*(unsigned long *)MPTB
;
310 pgd
= offset
+ (pgd_t
*)pgd
;
311 pgd_k
= init_mm
.pgd
+ offset
;
313 if (!pgd_present(*pgd_k
))
317 * set_pgd(pgd, *pgd_k); here would be useless on PAE
318 * and redundant with the set_pmd() on non-PAE.
321 pmd
= pmd_offset(pgd
, address
);
322 pmd_k
= pmd_offset(pgd_k
, address
);
323 if (!pmd_present(*pmd_k
))
325 set_pmd(pmd
, *pmd_k
);
327 pte_k
= pte_offset_kernel(pmd_k
, address
);
328 if (!pte_present(*pte_k
))
331 addr
= (address
& PAGE_MASK
);
332 set_thread_fault_code(error_code
);
333 update_mmu_cache(NULL
, addr
, pte_k
);
334 set_thread_fault_code(0);
339 /*======================================================================*
341 *======================================================================*/
342 #define TLB_MASK (NR_TLB_ENTRIES - 1)
343 #define ITLB_END (unsigned long *)(ITLB_BASE + (NR_TLB_ENTRIES * 8))
344 #define DTLB_END (unsigned long *)(DTLB_BASE + (NR_TLB_ENTRIES * 8))
345 void update_mmu_cache(struct vm_area_struct
*vma
, unsigned long vaddr
,
348 volatile unsigned long *entry1
, *entry2
;
349 unsigned long pte_data
, flags
;
350 unsigned int *entry_dat
;
351 int inst
= get_thread_fault_code() & ACE_INSTRUCTION
;
354 /* Ptrace may call this routine. */
355 if (vma
&& current
->active_mm
!= vma
->vm_mm
)
358 local_irq_save(flags
);
360 vaddr
= (vaddr
& PAGE_MASK
) | get_asid();
362 pte_data
= pte_val(*ptep
);
364 #ifdef CONFIG_CHIP_OPSP
365 entry1
= (unsigned long *)ITLB_BASE
;
366 for (i
= 0; i
< NR_TLB_ENTRIES
; i
++) {
367 if (*entry1
++ == vaddr
) {
368 set_tlb_data(entry1
, pte_data
);
373 entry2
= (unsigned long *)DTLB_BASE
;
374 for (i
= 0; i
< NR_TLB_ENTRIES
; i
++) {
375 if (*entry2
++ == vaddr
) {
376 set_tlb_data(entry2
, pte_data
);
384 * entry1: ITLB entry address
385 * entry2: DTLB entry address
387 __asm__
__volatile__ (
388 "seth %0, #high(%4) \n\t"
389 "st %2, @(%5, %0) \n\t"
391 "st %1, @(%6, %0) \n\t"
392 "add3 r4, %0, %7 \n\t"
395 "ld %1, @(%6, %0) \n\t"
401 : "=&r" (entry1
), "=&r" (entry2
)
402 : "r" (vaddr
), "r" (pte_data
), "i" (MMU_REG_BASE
),
403 "i" (MSVA_offset
), "i" (MTOP_offset
), "i" (MIDXI_offset
)
408 if ((!inst
&& entry2
>= DTLB_END
) || (inst
&& entry1
>= ITLB_END
))
412 local_irq_restore(flags
);
416 /* Valid entry not found */
419 * Update ITLB or DTLB entry
420 * entry1: TLB entry address
421 * entry2: TLB base address
424 entry2
= (unsigned long *)DTLB_BASE
;
425 entry_dat
= &tlb_entry_d
;
427 entry2
= (unsigned long *)ITLB_BASE
;
428 entry_dat
= &tlb_entry_i
;
430 entry1
= entry2
+ (((*entry_dat
- 1) & TLB_MASK
) << 1);
432 for (i
= 0 ; i
< NR_TLB_ENTRIES
; i
++) {
433 if (!(entry1
[1] & 2)) /* Valid bit check */
436 if (entry1
!= entry2
)
439 entry1
+= TLB_MASK
<< 1;
442 if (i
>= NR_TLB_ENTRIES
) { /* Empty entry not found */
443 entry1
= entry2
+ (*entry_dat
<< 1);
444 *entry_dat
= (*entry_dat
+ 1) & TLB_MASK
;
446 *entry1
++ = vaddr
; /* Set TLB tag */
447 set_tlb_data(entry1
, pte_data
);
452 /*======================================================================*
453 * flush_tlb_page() : flushes one page
454 *======================================================================*/
455 void local_flush_tlb_page(struct vm_area_struct
*vma
, unsigned long page
)
457 if (vma
->vm_mm
&& mm_context(vma
->vm_mm
) != NO_CONTEXT
) {
460 local_irq_save(flags
);
462 page
|= (mm_context(vma
->vm_mm
) & MMU_CONTEXT_ASID_MASK
);
463 __flush_tlb_page(page
);
464 local_irq_restore(flags
);
468 /*======================================================================*
469 * flush_tlb_range() : flushes a range of pages
470 *======================================================================*/
471 void local_flush_tlb_range(struct vm_area_struct
*vma
, unsigned long start
,
474 struct mm_struct
*mm
;
477 if (mm_context(mm
) != NO_CONTEXT
) {
481 local_irq_save(flags
);
482 size
= (end
- start
+ (PAGE_SIZE
- 1)) >> PAGE_SHIFT
;
483 if (size
> (NR_TLB_ENTRIES
/ 4)) { /* Too many TLB to flush */
484 mm_context(mm
) = NO_CONTEXT
;
485 if (mm
== current
->mm
)
486 activate_context(mm
);
490 asid
= mm_context(mm
) & MMU_CONTEXT_ASID_MASK
;
492 end
+= (PAGE_SIZE
- 1);
497 while (start
< end
) {
498 __flush_tlb_page(start
);
502 local_irq_restore(flags
);
506 /*======================================================================*
507 * flush_tlb_mm() : flushes the specified mm context TLB's
508 *======================================================================*/
509 void local_flush_tlb_mm(struct mm_struct
*mm
)
511 /* Invalidate all TLB of this process. */
512 /* Instead of invalidating each TLB, we get new MMU context. */
513 if (mm_context(mm
) != NO_CONTEXT
) {
516 local_irq_save(flags
);
517 mm_context(mm
) = NO_CONTEXT
;
518 if (mm
== current
->mm
)
519 activate_context(mm
);
520 local_irq_restore(flags
);
524 /*======================================================================*
525 * flush_tlb_all() : flushes all processes TLBs
526 *======================================================================*/
527 void local_flush_tlb_all(void)
531 local_irq_save(flags
);
533 local_irq_restore(flags
);
536 /*======================================================================*
538 *======================================================================*/
539 void __init
init_mmu(void)
543 mmu_context_cache
= MMU_CONTEXT_FIRST_VERSION
;
544 set_asid(mmu_context_cache
& MMU_CONTEXT_ASID_MASK
);
545 *(volatile unsigned long *)MPTB
= (unsigned long)swapper_pg_dir
;