arch/arm/plat-s5p/cpu.c

   1 /* linux/arch/arm/plat-s5p/cpu.c
   2  *
   3  * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * S5P CPU Support
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #include <linux/init.h>
  14 #include <linux/module.h>
  15
  16 #include <asm/mach/arch.h>
  17 #include <asm/mach/map.h>
  18
  19 #include <mach/map.h>
  20 #include <mach/regs-clock.h>
  21
  22 #include <plat/cpu.h>
  23 #include <plat/s5p6440.h>
  24 #include <plat/s5p6442.h>
  25 #include <plat/s5p6450.h>
  26 #include <plat/s5pc100.h>
  27 #include <plat/s5pv210.h>
  28 #include <plat/exynos4.h>
  29
  30 /* table of supported CPUs */
  31
  32 static const char name_s5p6440[] = "S5P6440";
  33 static const char name_s5p6442[] = "S5P6442";
  34 static const char name_s5p6450[] = "S5P6450";
  35 static const char name_s5pc100[] = "S5PC100";
  36 static const char name_s5pv210[] = "S5PV210/S5PC110";
  37 static const char name_exynos4210[] = "EXYNOS4210";
  38
  39 static struct cpu_table cpu_ids[] __initdata = {
  40         {
  41                 .idcode         = 0x56440100,
  42                 .idmask         = 0xfffff000,
  43                 .map_io         = s5p6440_map_io,
  44                 .init_clocks    = s5p6440_init_clocks,
  45                 .init_uarts     = s5p6440_init_uarts,
  46                 .init           = s5p64x0_init,
  47                 .name           = name_s5p6440,
  48         }, {
  49                 .idcode         = 0x36442000,
  50                 .idmask         = 0xfffff000,
  51                 .map_io         = s5p6442_map_io,
  52                 .init_clocks    = s5p6442_init_clocks,
  53                 .init_uarts     = s5p6442_init_uarts,
  54                 .init           = s5p6442_init,
  55                 .name           = name_s5p6442,
  56         }, {
  57                 .idcode         = 0x36450000,
  58                 .idmask         = 0xfffff000,
  59                 .map_io         = s5p6450_map_io,
  60                 .init_clocks    = s5p6450_init_clocks,
  61                 .init_uarts     = s5p6450_init_uarts,
  62                 .init           = s5p64x0_init,
  63                 .name           = name_s5p6450,
  64         }, {
  65                 .idcode         = 0x43100000,
  66                 .idmask         = 0xfffff000,
  67                 .map_io         = s5pc100_map_io,
  68                 .init_clocks    = s5pc100_init_clocks,
  69                 .init_uarts     = s5pc100_init_uarts,
  70                 .init           = s5pc100_init,
  71                 .name           = name_s5pc100,
  72         }, {
  73                 .idcode         = 0x43110000,
  74                 .idmask         = 0xfffff000,
  75                 .map_io         = s5pv210_map_io,
  76                 .init_clocks    = s5pv210_init_clocks,
  77                 .init_uarts     = s5pv210_init_uarts,
  78                 .init           = s5pv210_init,
  79                 .name           = name_s5pv210,
  80         }, {
  81                 .idcode         = 0x43210000,
  82                 .idmask         = 0xfffe0000,
  83                 .map_io         = exynos4_map_io,
  84                 .init_clocks    = exynos4_init_clocks,
  85                 .init_uarts     = exynos4_init_uarts,
  86                 .init           = exynos4_init,
  87                 .name           = name_exynos4210,
  88         },
  89 };
  90
  91 /* minimal IO mapping */
  92
  93 static struct map_desc s5p_iodesc[] __initdata = {
  94         {
  95                 .virtual        = (unsigned long)S5P_VA_CHIPID,
  96                 .pfn            = __phys_to_pfn(S5P_PA_CHIPID),
  97                 .length         = SZ_4K,
  98                 .type           = MT_DEVICE,
  99         }, {
 100                 .virtual        = (unsigned long)S3C_VA_SYS,
 101                 .pfn            = __phys_to_pfn(S5P_PA_SYSCON),
 102                 .length         = SZ_64K,
 103                 .type           = MT_DEVICE,
 104         }, {
 105                 .virtual        = (unsigned long)S3C_VA_TIMER,
 106                 .pfn            = __phys_to_pfn(S5P_PA_TIMER),
 107                 .length         = SZ_16K,
 108                 .type           = MT_DEVICE,
 109         }, {
 110                 .virtual        = (unsigned long)S3C_VA_WATCHDOG,
 111                 .pfn            = __phys_to_pfn(S3C_PA_WDT),
 112                 .length         = SZ_4K,
 113                 .type           = MT_DEVICE,
 114         }, {
 115                 .virtual        = (unsigned long)S5P_VA_SROMC,
 116                 .pfn            = __phys_to_pfn(S5P_PA_SROMC),
 117                 .length         = SZ_4K,
 118                 .type           = MT_DEVICE,
 119         },
 120 };
 121
 122 /* read cpu identification code */
 123
 124 void __init s5p_init_io(struct map_desc *mach_desc,
 125                         int size, void __iomem *cpuid_addr)
 126 {
 127         unsigned long idcode;
 128
 129         /* initialize the io descriptors we need for initialization */
 130         iotable_init(s5p_iodesc, ARRAY_SIZE(s5p_iodesc));
 131         if (mach_desc)
 132                 iotable_init(mach_desc, size);
 133
 134         idcode = __raw_readl(cpuid_addr);
 135         s3c_init_cpu(idcode, cpu_ids, ARRAY_SIZE(cpu_ids));
 136 }