cpumask: Fix generate_sched_domains() for UP
[linux-2.6/next.git] / drivers / video / sh7760fb.c
blob9f6d6e61f0cc73a91f6ce93c959b61b090f38464
1 /*
2 * SH7760/SH7763 LCDC Framebuffer driver.
4 * (c) 2006-2008 MSC Vertriebsges.m.b.H.,
5 * Manuel Lauss <mano@roarinelk.homelinux.net>
6 * (c) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file COPYING in the main directory of this
10 * archive for more details.
12 * PLEASE HAVE A LOOK AT Documentation/fb/sh7760fb.txt!
14 * Thanks to Siegfried Schaefer <s.schaefer at schaefer-edv.de>
15 * for his original source and testing!
17 * sh7760_setcolreg get from drivers/video/sh_mobile_lcdcfb.c
20 #include <linux/completion.h>
21 #include <linux/delay.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/fb.h>
24 #include <linux/interrupt.h>
25 #include <linux/io.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/platform_device.h>
30 #include <asm/sh7760fb.h>
32 struct sh7760fb_par {
33 void __iomem *base;
34 int irq;
36 struct sh7760fb_platdata *pd; /* display information */
38 dma_addr_t fbdma; /* physical address */
40 int rot; /* rotation enabled? */
42 u32 pseudo_palette[16];
44 struct platform_device *dev;
45 struct resource *ioarea;
46 struct completion vsync; /* vsync irq event */
49 static irqreturn_t sh7760fb_irq(int irq, void *data)
51 struct completion *c = data;
53 complete(c);
55 return IRQ_HANDLED;
58 /* wait_for_lps - wait until power supply has reached a certain state. */
59 static int wait_for_lps(struct sh7760fb_par *par, int val)
61 int i = 100;
62 while (--i && ((ioread16(par->base + LDPMMR) & 3) != val))
63 msleep(1);
65 if (i <= 0)
66 return -ETIMEDOUT;
68 return 0;
71 /* en/disable the LCDC */
72 static int sh7760fb_blank(int blank, struct fb_info *info)
74 struct sh7760fb_par *par = info->par;
75 struct sh7760fb_platdata *pd = par->pd;
76 unsigned short cntr = ioread16(par->base + LDCNTR);
77 unsigned short intr = ioread16(par->base + LDINTR);
78 int lps;
80 if (blank == FB_BLANK_UNBLANK) {
81 intr |= VINT_START;
82 cntr = LDCNTR_DON2 | LDCNTR_DON;
83 lps = 3;
84 } else {
85 intr &= ~VINT_START;
86 cntr = LDCNTR_DON2;
87 lps = 0;
90 if (pd->blank)
91 pd->blank(blank);
93 iowrite16(intr, par->base + LDINTR);
94 iowrite16(cntr, par->base + LDCNTR);
96 return wait_for_lps(par, lps);
99 static int sh7760_setcolreg (u_int regno,
100 u_int red, u_int green, u_int blue,
101 u_int transp, struct fb_info *info)
103 u32 *palette = info->pseudo_palette;
105 if (regno >= 16)
106 return -EINVAL;
108 /* only FB_VISUAL_TRUECOLOR supported */
110 red >>= 16 - info->var.red.length;
111 green >>= 16 - info->var.green.length;
112 blue >>= 16 - info->var.blue.length;
113 transp >>= 16 - info->var.transp.length;
115 palette[regno] = (red << info->var.red.offset) |
116 (green << info->var.green.offset) |
117 (blue << info->var.blue.offset) |
118 (transp << info->var.transp.offset);
120 return 0;
123 static int sh7760fb_get_color_info(struct device *dev,
124 u16 lddfr, int *bpp, int *gray)
126 int lbpp, lgray;
128 lgray = lbpp = 0;
130 switch (lddfr & LDDFR_COLOR_MASK) {
131 case LDDFR_1BPP_MONO:
132 lgray = 1;
133 lbpp = 1;
134 break;
135 case LDDFR_2BPP_MONO:
136 lgray = 1;
137 lbpp = 2;
138 break;
139 case LDDFR_4BPP_MONO:
140 lgray = 1;
141 case LDDFR_4BPP:
142 lbpp = 4;
143 break;
144 case LDDFR_6BPP_MONO:
145 lgray = 1;
146 case LDDFR_8BPP:
147 lbpp = 8;
148 break;
149 case LDDFR_16BPP_RGB555:
150 case LDDFR_16BPP_RGB565:
151 lbpp = 16;
152 lgray = 0;
153 break;
154 default:
155 dev_dbg(dev, "unsupported LDDFR bit depth.\n");
156 return -EINVAL;
159 if (bpp)
160 *bpp = lbpp;
161 if (gray)
162 *gray = lgray;
164 return 0;
167 static int sh7760fb_check_var(struct fb_var_screeninfo *var,
168 struct fb_info *info)
170 struct fb_fix_screeninfo *fix = &info->fix;
171 struct sh7760fb_par *par = info->par;
172 int ret, bpp;
174 /* get color info from register value */
175 ret = sh7760fb_get_color_info(info->dev, par->pd->lddfr, &bpp, NULL);
176 if (ret)
177 return ret;
179 var->bits_per_pixel = bpp;
181 if ((var->grayscale) && (var->bits_per_pixel == 1))
182 fix->visual = FB_VISUAL_MONO10;
183 else if (var->bits_per_pixel >= 15)
184 fix->visual = FB_VISUAL_TRUECOLOR;
185 else
186 fix->visual = FB_VISUAL_PSEUDOCOLOR;
188 /* TODO: add some more validation here */
189 return 0;
193 * sh7760fb_set_par - set videomode.
195 * NOTE: The rotation, grayscale and DSTN codepaths are
196 * totally untested!
198 static int sh7760fb_set_par(struct fb_info *info)
200 struct sh7760fb_par *par = info->par;
201 struct fb_videomode *vm = par->pd->def_mode;
202 unsigned long sbase, dstn_off, ldsarl, stride;
203 unsigned short hsynp, hsynw, htcn, hdcn;
204 unsigned short vsynp, vsynw, vtln, vdln;
205 unsigned short lddfr, ldmtr;
206 int ret, bpp, gray;
208 par->rot = par->pd->rotate;
210 /* rotate only works with xres <= 320 */
211 if (par->rot && (vm->xres > 320)) {
212 dev_dbg(info->dev, "rotation disabled due to display size\n");
213 par->rot = 0;
216 /* calculate LCDC reg vals from display parameters */
217 hsynp = vm->right_margin + vm->xres;
218 hsynw = vm->hsync_len;
219 htcn = vm->left_margin + hsynp + hsynw;
220 hdcn = vm->xres;
221 vsynp = vm->lower_margin + vm->yres;
222 vsynw = vm->vsync_len;
223 vtln = vm->upper_margin + vsynp + vsynw;
224 vdln = vm->yres;
226 /* get color info from register value */
227 ret = sh7760fb_get_color_info(info->dev, par->pd->lddfr, &bpp, &gray);
228 if (ret)
229 return ret;
231 dev_dbg(info->dev, "%dx%d %dbpp %s (orientation %s)\n", hdcn,
232 vdln, bpp, gray ? "grayscale" : "color",
233 par->rot ? "rotated" : "normal");
235 #ifdef CONFIG_CPU_LITTLE_ENDIAN
236 lddfr = par->pd->lddfr | (1 << 8);
237 #else
238 lddfr = par->pd->lddfr & ~(1 << 8);
239 #endif
241 ldmtr = par->pd->ldmtr;
243 if (!(vm->sync & FB_SYNC_HOR_HIGH_ACT))
244 ldmtr |= LDMTR_CL1POL;
245 if (!(vm->sync & FB_SYNC_VERT_HIGH_ACT))
246 ldmtr |= LDMTR_FLMPOL;
248 /* shut down LCDC before changing display parameters */
249 sh7760fb_blank(FB_BLANK_POWERDOWN, info);
251 iowrite16(par->pd->ldickr, par->base + LDICKR); /* pixclock */
252 iowrite16(ldmtr, par->base + LDMTR); /* polarities */
253 iowrite16(lddfr, par->base + LDDFR); /* color/depth */
254 iowrite16((par->rot ? 1 << 13 : 0), par->base + LDSMR); /* rotate */
255 iowrite16(par->pd->ldpmmr, par->base + LDPMMR); /* Power Management */
256 iowrite16(par->pd->ldpspr, par->base + LDPSPR); /* Power Supply Ctrl */
258 /* display resolution */
259 iowrite16(((htcn >> 3) - 1) | (((hdcn >> 3) - 1) << 8),
260 par->base + LDHCNR);
261 iowrite16(vdln - 1, par->base + LDVDLNR);
262 iowrite16(vtln - 1, par->base + LDVTLNR);
263 /* h/v sync signals */
264 iowrite16((vsynp - 1) | ((vsynw - 1) << 12), par->base + LDVSYNR);
265 iowrite16(((hsynp >> 3) - 1) | (((hsynw >> 3) - 1) << 12),
266 par->base + LDHSYNR);
267 /* AC modulation sig */
268 iowrite16(par->pd->ldaclnr, par->base + LDACLNR);
270 stride = (par->rot) ? vtln : hdcn;
271 if (!gray)
272 stride *= (bpp + 7) >> 3;
273 else {
274 if (bpp == 1)
275 stride >>= 3;
276 else if (bpp == 2)
277 stride >>= 2;
278 else if (bpp == 4)
279 stride >>= 1;
280 /* 6 bpp == 8 bpp */
283 /* if rotated, stride must be power of 2 */
284 if (par->rot) {
285 unsigned long bit = 1 << 31;
286 while (bit) {
287 if (stride & bit)
288 break;
289 bit >>= 1;
291 if (stride & ~bit)
292 stride = bit << 1; /* not P-o-2, round up */
294 iowrite16(stride, par->base + LDLAOR);
296 /* set display mem start address */
297 sbase = (unsigned long)par->fbdma;
298 if (par->rot)
299 sbase += (hdcn - 1) * stride;
301 iowrite32(sbase, par->base + LDSARU);
304 * for DSTN need to set address for lower half.
305 * I (mlau) don't know which address to set it to,
306 * so I guessed at (stride * yres/2).
308 if (((ldmtr & 0x003f) >= LDMTR_DSTN_MONO_8) &&
309 ((ldmtr & 0x003f) <= LDMTR_DSTN_COLOR_16)) {
311 dev_dbg(info->dev, " ***** DSTN untested! *****\n");
313 dstn_off = stride;
314 if (par->rot)
315 dstn_off *= hdcn >> 1;
316 else
317 dstn_off *= vdln >> 1;
319 ldsarl = sbase + dstn_off;
320 } else
321 ldsarl = 0;
323 iowrite32(ldsarl, par->base + LDSARL); /* mem for lower half of DSTN */
325 info->fix.line_length = stride;
327 sh7760fb_check_var(&info->var, info);
329 sh7760fb_blank(FB_BLANK_UNBLANK, info); /* panel on! */
331 dev_dbg(info->dev, "hdcn : %6d htcn : %6d\n", hdcn, htcn);
332 dev_dbg(info->dev, "hsynw : %6d hsynp : %6d\n", hsynw, hsynp);
333 dev_dbg(info->dev, "vdln : %6d vtln : %6d\n", vdln, vtln);
334 dev_dbg(info->dev, "vsynw : %6d vsynp : %6d\n", vsynw, vsynp);
335 dev_dbg(info->dev, "clksrc: %6d clkdiv: %6d\n",
336 (par->pd->ldickr >> 12) & 3, par->pd->ldickr & 0x1f);
337 dev_dbg(info->dev, "ldpmmr: 0x%04x ldpspr: 0x%04x\n", par->pd->ldpmmr,
338 par->pd->ldpspr);
339 dev_dbg(info->dev, "ldmtr : 0x%04x lddfr : 0x%04x\n", ldmtr, lddfr);
340 dev_dbg(info->dev, "ldlaor: %ld\n", stride);
341 dev_dbg(info->dev, "ldsaru: 0x%08lx ldsarl: 0x%08lx\n", sbase, ldsarl);
343 return 0;
346 static struct fb_ops sh7760fb_ops = {
347 .owner = THIS_MODULE,
348 .fb_blank = sh7760fb_blank,
349 .fb_check_var = sh7760fb_check_var,
350 .fb_setcolreg = sh7760_setcolreg,
351 .fb_set_par = sh7760fb_set_par,
352 .fb_fillrect = cfb_fillrect,
353 .fb_copyarea = cfb_copyarea,
354 .fb_imageblit = cfb_imageblit,
357 static void sh7760fb_free_mem(struct fb_info *info)
359 struct sh7760fb_par *par = info->par;
361 if (!info->screen_base)
362 return;
364 dma_free_coherent(info->dev, info->screen_size,
365 info->screen_base, par->fbdma);
367 par->fbdma = 0;
368 info->screen_base = NULL;
369 info->screen_size = 0;
372 /* allocate the framebuffer memory. This memory must be in Area3,
373 * (dictated by the DMA engine) and contiguous, at a 512 byte boundary.
375 static int sh7760fb_alloc_mem(struct fb_info *info)
377 struct sh7760fb_par *par = info->par;
378 void *fbmem;
379 unsigned long vram;
380 int ret, bpp;
382 if (info->screen_base)
383 return 0;
385 /* get color info from register value */
386 ret = sh7760fb_get_color_info(info->dev, par->pd->lddfr, &bpp, NULL);
387 if (ret) {
388 printk(KERN_ERR "colinfo\n");
389 return ret;
392 /* min VRAM: xres_min = 16, yres_min = 1, bpp = 1: 2byte -> 1 page
393 max VRAM: xres_max = 1024, yres_max = 1024, bpp = 16: 2MB */
395 vram = info->var.xres * info->var.yres;
396 if (info->var.grayscale) {
397 if (bpp == 1)
398 vram >>= 3;
399 else if (bpp == 2)
400 vram >>= 2;
401 else if (bpp == 4)
402 vram >>= 1;
403 } else if (bpp > 8)
404 vram *= 2;
405 if ((vram < 1) || (vram > 1024 * 2048)) {
406 dev_dbg(info->dev, "too much VRAM required. Check settings\n");
407 return -ENODEV;
410 if (vram < PAGE_SIZE)
411 vram = PAGE_SIZE;
413 fbmem = dma_alloc_coherent(info->dev, vram, &par->fbdma, GFP_KERNEL);
415 if (!fbmem)
416 return -ENOMEM;
418 if ((par->fbdma & SH7760FB_DMA_MASK) != SH7760FB_DMA_MASK) {
419 sh7760fb_free_mem(info);
420 dev_err(info->dev, "kernel gave me memory at 0x%08lx, which is"
421 "unusable for the LCDC\n", (unsigned long)par->fbdma);
422 return -ENOMEM;
425 info->screen_base = fbmem;
426 info->screen_size = vram;
427 info->fix.smem_start = (unsigned long)info->screen_base;
428 info->fix.smem_len = info->screen_size;
430 return 0;
433 static int __devinit sh7760fb_probe(struct platform_device *pdev)
435 struct fb_info *info;
436 struct resource *res;
437 struct sh7760fb_par *par;
438 int ret;
440 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
441 if (unlikely(res == NULL)) {
442 dev_err(&pdev->dev, "invalid resource\n");
443 return -EINVAL;
446 info = framebuffer_alloc(sizeof(struct sh7760fb_par), &pdev->dev);
447 if (!info)
448 return -ENOMEM;
450 par = info->par;
451 par->dev = pdev;
453 par->pd = pdev->dev.platform_data;
454 if (!par->pd) {
455 dev_dbg(info->dev, "no display setup data!\n");
456 ret = -ENODEV;
457 goto out_fb;
460 par->ioarea = request_mem_region(res->start,
461 (res->end - res->start), pdev->name);
462 if (!par->ioarea) {
463 dev_err(&pdev->dev, "mmio area busy\n");
464 ret = -EBUSY;
465 goto out_fb;
468 par->base = ioremap_nocache(res->start, res->end - res->start + 1);
469 if (!par->base) {
470 dev_err(&pdev->dev, "cannot remap\n");
471 ret = -ENODEV;
472 goto out_res;
475 iowrite16(0, par->base + LDINTR); /* disable vsync irq */
476 par->irq = platform_get_irq(pdev, 0);
477 if (par->irq >= 0) {
478 ret = request_irq(par->irq, sh7760fb_irq, 0,
479 "sh7760-lcdc", &par->vsync);
480 if (ret) {
481 dev_err(&pdev->dev, "cannot grab IRQ\n");
482 par->irq = -ENXIO;
483 } else
484 disable_irq_nosync(par->irq);
487 fb_videomode_to_var(&info->var, par->pd->def_mode);
489 ret = sh7760fb_alloc_mem(info);
490 if (ret) {
491 dev_dbg(info->dev, "framebuffer memory allocation failed!\n");
492 goto out_unmap;
495 info->pseudo_palette = par->pseudo_palette;
497 /* fixup color register bitpositions. These are fixed by hardware */
498 info->var.red.offset = 11;
499 info->var.red.length = 5;
500 info->var.red.msb_right = 0;
502 info->var.green.offset = 5;
503 info->var.green.length = 6;
504 info->var.green.msb_right = 0;
506 info->var.blue.offset = 0;
507 info->var.blue.length = 5;
508 info->var.blue.msb_right = 0;
510 info->var.transp.offset = 0;
511 info->var.transp.length = 0;
512 info->var.transp.msb_right = 0;
514 strcpy(info->fix.id, "sh7760-lcdc");
516 /* set the DON2 bit now, before cmap allocation, as it will randomize
517 * palette memory.
519 iowrite16(LDCNTR_DON2, par->base + LDCNTR);
520 info->fbops = &sh7760fb_ops;
522 ret = fb_alloc_cmap(&info->cmap, 256, 0);
523 if (ret) {
524 dev_dbg(info->dev, "Unable to allocate cmap memory\n");
525 goto out_mem;
528 ret = register_framebuffer(info);
529 if (ret < 0) {
530 dev_dbg(info->dev, "cannot register fb!\n");
531 goto out_cmap;
533 platform_set_drvdata(pdev, info);
535 printk(KERN_INFO "%s: memory at phys 0x%08lx-0x%08lx, size %ld KiB\n",
536 pdev->name,
537 (unsigned long)par->fbdma,
538 (unsigned long)(par->fbdma + info->screen_size - 1),
539 info->screen_size >> 10);
541 return 0;
543 out_cmap:
544 sh7760fb_blank(FB_BLANK_POWERDOWN, info);
545 fb_dealloc_cmap(&info->cmap);
546 out_mem:
547 sh7760fb_free_mem(info);
548 out_unmap:
549 if (par->irq >= 0)
550 free_irq(par->irq, &par->vsync);
551 iounmap(par->base);
552 out_res:
553 release_resource(par->ioarea);
554 kfree(par->ioarea);
555 out_fb:
556 framebuffer_release(info);
557 return ret;
560 static int __devexit sh7760fb_remove(struct platform_device *dev)
562 struct fb_info *info = platform_get_drvdata(dev);
563 struct sh7760fb_par *par = info->par;
565 sh7760fb_blank(FB_BLANK_POWERDOWN, info);
566 unregister_framebuffer(info);
567 fb_dealloc_cmap(&info->cmap);
568 sh7760fb_free_mem(info);
569 if (par->irq >= 0)
570 free_irq(par->irq, par);
571 iounmap(par->base);
572 release_resource(par->ioarea);
573 kfree(par->ioarea);
574 framebuffer_release(info);
575 platform_set_drvdata(dev, NULL);
577 return 0;
580 static struct platform_driver sh7760_lcdc_driver = {
581 .driver = {
582 .name = "sh7760-lcdc",
583 .owner = THIS_MODULE,
585 .probe = sh7760fb_probe,
586 .remove = __devexit_p(sh7760fb_remove),
589 static int __init sh7760fb_init(void)
591 return platform_driver_register(&sh7760_lcdc_driver);
594 static void __exit sh7760fb_exit(void)
596 platform_driver_unregister(&sh7760_lcdc_driver);
599 module_init(sh7760fb_init);
600 module_exit(sh7760fb_exit);
602 MODULE_AUTHOR("Nobuhiro Iwamatsu, Manuel Lauss");
603 MODULE_DESCRIPTION("FBdev for SH7760/63 integrated LCD Controller");
604 MODULE_LICENSE("GPL");