2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/pm_qos_params.h>
42 #include <linux/clockchips.h>
43 #include <linux/cpuidle.h>
44 #include <linux/irqflags.h>
47 * Include the apic definitions for x86 to have the APIC timer related defines
48 * available also for UP (on SMP it gets magically included via linux/smp.h).
49 * asm/acpi.h is not an option, as it would require more include magic. Also
50 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
57 #include <asm/uaccess.h>
59 #include <acpi/acpi_bus.h>
60 #include <acpi/processor.h>
61 #include <asm/processor.h>
63 #define PREFIX "ACPI: "
65 #define ACPI_PROCESSOR_CLASS "processor"
66 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
67 ACPI_MODULE_NAME("processor_idle");
68 #define ACPI_PROCESSOR_FILE_POWER "power"
69 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
70 #define C2_OVERHEAD 1 /* 1us */
71 #define C3_OVERHEAD 1 /* 1us */
72 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
74 static unsigned int max_cstate __read_mostly
= ACPI_PROCESSOR_MAX_POWER
;
75 module_param(max_cstate
, uint
, 0000);
76 static unsigned int nocst __read_mostly
;
77 module_param(nocst
, uint
, 0000);
79 static unsigned int latency_factor __read_mostly
= 2;
80 module_param(latency_factor
, uint
, 0644);
82 static s64
us_to_pm_timer_ticks(s64 t
)
84 return div64_u64(t
* PM_TIMER_FREQUENCY
, 1000000);
87 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
88 * For now disable this. Probably a bug somewhere else.
90 * To skip this limit, boot/load with a large max_cstate limit.
92 static int set_max_cstate(const struct dmi_system_id
*id
)
94 if (max_cstate
> ACPI_PROCESSOR_MAX_POWER
)
97 printk(KERN_NOTICE PREFIX
"%s detected - limiting to C%ld max_cstate."
98 " Override with \"processor.max_cstate=%d\"\n", id
->ident
,
99 (long)id
->driver_data
, ACPI_PROCESSOR_MAX_POWER
+ 1);
101 max_cstate
= (long)id
->driver_data
;
106 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
107 callers to only run once -AK */
108 static struct dmi_system_id __cpuinitdata processor_power_dmi_table
[] = {
109 { set_max_cstate
, "Clevo 5600D", {
110 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
111 DMI_MATCH(DMI_BIOS_VERSION
,"SHE845M0.86C.0013.D.0302131307")},
118 * Callers should disable interrupts before the call and enable
119 * interrupts after return.
121 static void acpi_safe_halt(void)
123 current_thread_info()->status
&= ~TS_POLLING
;
125 * TS_POLLING-cleared state must be visible before we
129 if (!need_resched()) {
133 current_thread_info()->status
|= TS_POLLING
;
136 #ifdef ARCH_APICTIMER_STOPS_ON_C3
139 * Some BIOS implementations switch to C3 in the published C2 state.
140 * This seems to be a common problem on AMD boxen, but other vendors
141 * are affected too. We pick the most conservative approach: we assume
142 * that the local APIC stops in both C2 and C3.
144 static void lapic_timer_check_state(int state
, struct acpi_processor
*pr
,
145 struct acpi_processor_cx
*cx
)
147 struct acpi_processor_power
*pwr
= &pr
->power
;
148 u8 type
= local_apic_timer_c2_ok
? ACPI_STATE_C3
: ACPI_STATE_C2
;
150 if (cpu_has(&cpu_data(pr
->id
), X86_FEATURE_ARAT
))
153 if (boot_cpu_has(X86_FEATURE_AMDC1E
))
154 type
= ACPI_STATE_C1
;
157 * Check, if one of the previous states already marked the lapic
160 if (pwr
->timer_broadcast_on_state
< state
)
163 if (cx
->type
>= type
)
164 pr
->power
.timer_broadcast_on_state
= state
;
167 static void __lapic_timer_propagate_broadcast(void *arg
)
169 struct acpi_processor
*pr
= (struct acpi_processor
*) arg
;
170 unsigned long reason
;
172 reason
= pr
->power
.timer_broadcast_on_state
< INT_MAX
?
173 CLOCK_EVT_NOTIFY_BROADCAST_ON
: CLOCK_EVT_NOTIFY_BROADCAST_OFF
;
175 clockevents_notify(reason
, &pr
->id
);
178 static void lapic_timer_propagate_broadcast(struct acpi_processor
*pr
)
180 smp_call_function_single(pr
->id
, __lapic_timer_propagate_broadcast
,
184 /* Power(C) State timer broadcast control */
185 static void lapic_timer_state_broadcast(struct acpi_processor
*pr
,
186 struct acpi_processor_cx
*cx
,
189 int state
= cx
- pr
->power
.states
;
191 if (state
>= pr
->power
.timer_broadcast_on_state
) {
192 unsigned long reason
;
194 reason
= broadcast
? CLOCK_EVT_NOTIFY_BROADCAST_ENTER
:
195 CLOCK_EVT_NOTIFY_BROADCAST_EXIT
;
196 clockevents_notify(reason
, &pr
->id
);
202 static void lapic_timer_check_state(int state
, struct acpi_processor
*pr
,
203 struct acpi_processor_cx
*cstate
) { }
204 static void lapic_timer_propagate_broadcast(struct acpi_processor
*pr
) { }
205 static void lapic_timer_state_broadcast(struct acpi_processor
*pr
,
206 struct acpi_processor_cx
*cx
,
214 * Suspend / resume control
216 static int acpi_idle_suspend
;
217 static u32 saved_bm_rld
;
219 static void acpi_idle_bm_rld_save(void)
221 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, &saved_bm_rld
);
223 static void acpi_idle_bm_rld_restore(void)
227 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, &resumed_bm_rld
);
229 if (resumed_bm_rld
!= saved_bm_rld
)
230 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, saved_bm_rld
);
233 int acpi_processor_suspend(struct acpi_device
* device
, pm_message_t state
)
235 if (acpi_idle_suspend
== 1)
238 acpi_idle_bm_rld_save();
239 acpi_idle_suspend
= 1;
243 int acpi_processor_resume(struct acpi_device
* device
)
245 if (acpi_idle_suspend
== 0)
248 acpi_idle_bm_rld_restore();
249 acpi_idle_suspend
= 0;
253 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
254 static void tsc_check_state(int state
)
256 switch (boot_cpu_data
.x86_vendor
) {
258 case X86_VENDOR_INTEL
:
260 * AMD Fam10h TSC will tick in all
261 * C/P/S0/S1 states when this bit is set.
263 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC
))
268 /* TSC could halt in idle, so notify users */
269 if (state
> ACPI_STATE_C1
)
270 mark_tsc_unstable("TSC halts in idle");
274 static void tsc_check_state(int state
) { return; }
277 static int acpi_processor_get_power_info_fadt(struct acpi_processor
*pr
)
286 /* if info is obtained from pblk/fadt, type equals state */
287 pr
->power
.states
[ACPI_STATE_C2
].type
= ACPI_STATE_C2
;
288 pr
->power
.states
[ACPI_STATE_C3
].type
= ACPI_STATE_C3
;
290 #ifndef CONFIG_HOTPLUG_CPU
292 * Check for P_LVL2_UP flag before entering C2 and above on
295 if ((num_online_cpus() > 1) &&
296 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
300 /* determine C2 and C3 address from pblk */
301 pr
->power
.states
[ACPI_STATE_C2
].address
= pr
->pblk
+ 4;
302 pr
->power
.states
[ACPI_STATE_C3
].address
= pr
->pblk
+ 5;
304 /* determine latencies from FADT */
305 pr
->power
.states
[ACPI_STATE_C2
].latency
= acpi_gbl_FADT
.C2latency
;
306 pr
->power
.states
[ACPI_STATE_C3
].latency
= acpi_gbl_FADT
.C3latency
;
308 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
309 "lvl2[0x%08x] lvl3[0x%08x]\n",
310 pr
->power
.states
[ACPI_STATE_C2
].address
,
311 pr
->power
.states
[ACPI_STATE_C3
].address
));
316 static int acpi_processor_get_power_info_default(struct acpi_processor
*pr
)
318 if (!pr
->power
.states
[ACPI_STATE_C1
].valid
) {
319 /* set the first C-State to C1 */
320 /* all processors need to support C1 */
321 pr
->power
.states
[ACPI_STATE_C1
].type
= ACPI_STATE_C1
;
322 pr
->power
.states
[ACPI_STATE_C1
].valid
= 1;
323 pr
->power
.states
[ACPI_STATE_C1
].entry_method
= ACPI_CSTATE_HALT
;
325 /* the C0 state only exists as a filler in our array */
326 pr
->power
.states
[ACPI_STATE_C0
].valid
= 1;
330 static int acpi_processor_get_power_info_cst(struct acpi_processor
*pr
)
332 acpi_status status
= 0;
336 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
337 union acpi_object
*cst
;
345 status
= acpi_evaluate_object(pr
->handle
, "_CST", NULL
, &buffer
);
346 if (ACPI_FAILURE(status
)) {
347 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "No _CST, giving up\n"));
351 cst
= buffer
.pointer
;
353 /* There must be at least 2 elements */
354 if (!cst
|| (cst
->type
!= ACPI_TYPE_PACKAGE
) || cst
->package
.count
< 2) {
355 printk(KERN_ERR PREFIX
"not enough elements in _CST\n");
360 count
= cst
->package
.elements
[0].integer
.value
;
362 /* Validate number of power states. */
363 if (count
< 1 || count
!= cst
->package
.count
- 1) {
364 printk(KERN_ERR PREFIX
"count given by _CST is not valid\n");
369 /* Tell driver that at least _CST is supported. */
370 pr
->flags
.has_cst
= 1;
372 for (i
= 1; i
<= count
; i
++) {
373 union acpi_object
*element
;
374 union acpi_object
*obj
;
375 struct acpi_power_register
*reg
;
376 struct acpi_processor_cx cx
;
378 memset(&cx
, 0, sizeof(cx
));
380 element
= &(cst
->package
.elements
[i
]);
381 if (element
->type
!= ACPI_TYPE_PACKAGE
)
384 if (element
->package
.count
!= 4)
387 obj
= &(element
->package
.elements
[0]);
389 if (obj
->type
!= ACPI_TYPE_BUFFER
)
392 reg
= (struct acpi_power_register
*)obj
->buffer
.pointer
;
394 if (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
&&
395 (reg
->space_id
!= ACPI_ADR_SPACE_FIXED_HARDWARE
))
398 /* There should be an easy way to extract an integer... */
399 obj
= &(element
->package
.elements
[1]);
400 if (obj
->type
!= ACPI_TYPE_INTEGER
)
403 cx
.type
= obj
->integer
.value
;
405 * Some buggy BIOSes won't list C1 in _CST -
406 * Let acpi_processor_get_power_info_default() handle them later
408 if (i
== 1 && cx
.type
!= ACPI_STATE_C1
)
411 cx
.address
= reg
->address
;
412 cx
.index
= current_count
+ 1;
414 cx
.entry_method
= ACPI_CSTATE_SYSTEMIO
;
415 if (reg
->space_id
== ACPI_ADR_SPACE_FIXED_HARDWARE
) {
416 if (acpi_processor_ffh_cstate_probe
417 (pr
->id
, &cx
, reg
) == 0) {
418 cx
.entry_method
= ACPI_CSTATE_FFH
;
419 } else if (cx
.type
== ACPI_STATE_C1
) {
421 * C1 is a special case where FIXED_HARDWARE
422 * can be handled in non-MWAIT way as well.
423 * In that case, save this _CST entry info.
424 * Otherwise, ignore this info and continue.
426 cx
.entry_method
= ACPI_CSTATE_HALT
;
427 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
431 if (cx
.type
== ACPI_STATE_C1
&&
432 (idle_halt
|| idle_nomwait
)) {
434 * In most cases the C1 space_id obtained from
435 * _CST object is FIXED_HARDWARE access mode.
436 * But when the option of idle=halt is added,
437 * the entry_method type should be changed from
438 * CSTATE_FFH to CSTATE_HALT.
439 * When the option of idle=nomwait is added,
440 * the C1 entry_method type should be
443 cx
.entry_method
= ACPI_CSTATE_HALT
;
444 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
447 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI IOPORT 0x%x",
451 if (cx
.type
== ACPI_STATE_C1
) {
455 obj
= &(element
->package
.elements
[2]);
456 if (obj
->type
!= ACPI_TYPE_INTEGER
)
459 cx
.latency
= obj
->integer
.value
;
461 obj
= &(element
->package
.elements
[3]);
462 if (obj
->type
!= ACPI_TYPE_INTEGER
)
465 cx
.power
= obj
->integer
.value
;
468 memcpy(&(pr
->power
.states
[current_count
]), &cx
, sizeof(cx
));
471 * We support total ACPI_PROCESSOR_MAX_POWER - 1
472 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
474 if (current_count
>= (ACPI_PROCESSOR_MAX_POWER
- 1)) {
476 "Limiting number of power states to max (%d)\n",
477 ACPI_PROCESSOR_MAX_POWER
);
479 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
484 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "Found %d power states\n",
487 /* Validate number of power states discovered */
488 if (current_count
< 2)
492 kfree(buffer
.pointer
);
497 static void acpi_processor_power_verify_c2(struct acpi_processor_cx
*cx
)
504 * C2 latency must be less than or equal to 100
507 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C2_LATENCY
) {
508 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
509 "latency too large [%d]\n", cx
->latency
));
514 * Otherwise we've met all of our C2 requirements.
515 * Normalize the C2 latency to expidite policy
519 cx
->latency_ticks
= cx
->latency
;
524 static void acpi_processor_power_verify_c3(struct acpi_processor
*pr
,
525 struct acpi_processor_cx
*cx
)
527 static int bm_check_flag
= -1;
528 static int bm_control_flag
= -1;
535 * C3 latency must be less than or equal to 1000
538 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C3_LATENCY
) {
539 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
540 "latency too large [%d]\n", cx
->latency
));
545 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
546 * DMA transfers are used by any ISA device to avoid livelock.
547 * Note that we could disable Type-F DMA (as recommended by
548 * the erratum), but this is known to disrupt certain ISA
549 * devices thus we take the conservative approach.
551 else if (errata
.piix4
.fdma
) {
552 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
553 "C3 not supported on PIIX4 with Type-F DMA\n"));
557 /* All the logic here assumes flags.bm_check is same across all CPUs */
558 if (bm_check_flag
== -1) {
559 /* Determine whether bm_check is needed based on CPU */
560 acpi_processor_power_init_bm_check(&(pr
->flags
), pr
->id
);
561 bm_check_flag
= pr
->flags
.bm_check
;
562 bm_control_flag
= pr
->flags
.bm_control
;
564 pr
->flags
.bm_check
= bm_check_flag
;
565 pr
->flags
.bm_control
= bm_control_flag
;
568 if (pr
->flags
.bm_check
) {
569 if (!pr
->flags
.bm_control
) {
570 if (pr
->flags
.has_cst
!= 1) {
571 /* bus mastering control is necessary */
572 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
573 "C3 support requires BM control\n"));
576 /* Here we enter C3 without bus mastering */
577 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
578 "C3 support without BM control\n"));
583 * WBINVD should be set in fadt, for C3 state to be
584 * supported on when bm_check is not required.
586 if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_WBINVD
)) {
587 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
588 "Cache invalidation should work properly"
589 " for C3 to be enabled on SMP systems\n"));
595 * Otherwise we've met all of our C3 requirements.
596 * Normalize the C3 latency to expidite policy. Enable
597 * checking of bus mastering status (bm_check) so we can
598 * use this in our C3 policy
602 cx
->latency_ticks
= cx
->latency
;
604 * On older chipsets, BM_RLD needs to be set
605 * in order for Bus Master activity to wake the
606 * system from C3. Newer chipsets handle DMA
607 * during C3 automatically and BM_RLD is a NOP.
608 * In either case, the proper way to
609 * handle BM_RLD is to set it and leave it set.
611 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, 1);
616 static int acpi_processor_power_verify(struct acpi_processor
*pr
)
619 unsigned int working
= 0;
621 pr
->power
.timer_broadcast_on_state
= INT_MAX
;
623 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
&& i
<= max_cstate
; i
++) {
624 struct acpi_processor_cx
*cx
= &pr
->power
.states
[i
];
632 acpi_processor_power_verify_c2(cx
);
636 acpi_processor_power_verify_c3(pr
, cx
);
642 lapic_timer_check_state(i
, pr
, cx
);
643 tsc_check_state(cx
->type
);
647 lapic_timer_propagate_broadcast(pr
);
652 static int acpi_processor_get_power_info(struct acpi_processor
*pr
)
658 /* NOTE: the idle thread may not be running while calling
661 /* Zero initialize all the C-states info. */
662 memset(pr
->power
.states
, 0, sizeof(pr
->power
.states
));
664 result
= acpi_processor_get_power_info_cst(pr
);
665 if (result
== -ENODEV
)
666 result
= acpi_processor_get_power_info_fadt(pr
);
671 acpi_processor_get_power_info_default(pr
);
673 pr
->power
.count
= acpi_processor_power_verify(pr
);
676 * if one state of type C2 or C3 is available, mark this
677 * CPU as being "idle manageable"
679 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
680 if (pr
->power
.states
[i
].valid
) {
682 if (pr
->power
.states
[i
].type
>= ACPI_STATE_C2
)
690 #ifdef CONFIG_ACPI_PROCFS
691 static int acpi_processor_power_seq_show(struct seq_file
*seq
, void *offset
)
693 struct acpi_processor
*pr
= seq
->private;
700 seq_printf(seq
, "active state: C%zd\n"
702 "maximum allowed latency: %d usec\n",
703 pr
->power
.state
? pr
->power
.state
- pr
->power
.states
: 0,
704 max_cstate
, pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY
));
706 seq_puts(seq
, "states:\n");
708 for (i
= 1; i
<= pr
->power
.count
; i
++) {
709 seq_printf(seq
, " %cC%d: ",
710 (&pr
->power
.states
[i
] ==
711 pr
->power
.state
? '*' : ' '), i
);
713 if (!pr
->power
.states
[i
].valid
) {
714 seq_puts(seq
, "<not supported>\n");
718 switch (pr
->power
.states
[i
].type
) {
720 seq_printf(seq
, "type[C1] ");
723 seq_printf(seq
, "type[C2] ");
726 seq_printf(seq
, "type[C3] ");
729 seq_printf(seq
, "type[--] ");
733 if (pr
->power
.states
[i
].promotion
.state
)
734 seq_printf(seq
, "promotion[C%zd] ",
735 (pr
->power
.states
[i
].promotion
.state
-
738 seq_puts(seq
, "promotion[--] ");
740 if (pr
->power
.states
[i
].demotion
.state
)
741 seq_printf(seq
, "demotion[C%zd] ",
742 (pr
->power
.states
[i
].demotion
.state
-
745 seq_puts(seq
, "demotion[--] ");
747 seq_printf(seq
, "latency[%03d] usage[%08d] duration[%020llu]\n",
748 pr
->power
.states
[i
].latency
,
749 pr
->power
.states
[i
].usage
,
750 (unsigned long long)pr
->power
.states
[i
].time
);
757 static int acpi_processor_power_open_fs(struct inode
*inode
, struct file
*file
)
759 return single_open(file
, acpi_processor_power_seq_show
,
763 static const struct file_operations acpi_processor_power_fops
= {
764 .owner
= THIS_MODULE
,
765 .open
= acpi_processor_power_open_fs
,
768 .release
= single_release
,
773 * acpi_idle_bm_check - checks if bus master activity was detected
775 static int acpi_idle_bm_check(void)
779 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS
, &bm_status
);
781 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS
, 1);
783 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
784 * the true state of bus mastering activity; forcing us to
785 * manually check the BMIDEA bit of each IDE channel.
787 else if (errata
.piix4
.bmisx
) {
788 if ((inb_p(errata
.piix4
.bmisx
+ 0x02) & 0x01)
789 || (inb_p(errata
.piix4
.bmisx
+ 0x0A) & 0x01))
796 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
799 * Caller disables interrupt before call and enables interrupt after return.
801 static inline void acpi_idle_do_entry(struct acpi_processor_cx
*cx
)
803 /* Don't trace irqs off for idle */
804 stop_critical_timings();
805 if (cx
->entry_method
== ACPI_CSTATE_FFH
) {
806 /* Call into architectural FFH based C-state */
807 acpi_processor_ffh_cstate_enter(cx
);
808 } else if (cx
->entry_method
== ACPI_CSTATE_HALT
) {
812 /* IO port based C-state */
814 /* Dummy wait op - must do something useless after P_LVL2 read
815 because chipsets cannot guarantee that STPCLK# signal
816 gets asserted in time to freeze execution properly. */
817 unused
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
819 start_critical_timings();
823 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
824 * @dev: the target CPU
825 * @state: the state data
827 * This is equivalent to the HALT instruction.
829 static int acpi_idle_enter_c1(struct cpuidle_device
*dev
,
830 struct cpuidle_state
*state
)
834 struct acpi_processor
*pr
;
835 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
837 pr
= __get_cpu_var(processors
);
844 /* Do not access any ACPI IO ports in suspend path */
845 if (acpi_idle_suspend
) {
851 lapic_timer_state_broadcast(pr
, cx
, 1);
852 kt1
= ktime_get_real();
853 acpi_idle_do_entry(cx
);
854 kt2
= ktime_get_real();
855 idle_time
= ktime_to_us(ktime_sub(kt2
, kt1
));
859 lapic_timer_state_broadcast(pr
, cx
, 0);
865 * acpi_idle_enter_simple - enters an ACPI state without BM handling
866 * @dev: the target CPU
867 * @state: the state data
869 static int acpi_idle_enter_simple(struct cpuidle_device
*dev
,
870 struct cpuidle_state
*state
)
872 struct acpi_processor
*pr
;
873 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
878 pr
= __get_cpu_var(processors
);
883 if (acpi_idle_suspend
)
884 return(acpi_idle_enter_c1(dev
, state
));
887 current_thread_info()->status
&= ~TS_POLLING
;
889 * TS_POLLING-cleared state must be visible before we test
894 if (unlikely(need_resched())) {
895 current_thread_info()->status
|= TS_POLLING
;
901 * Must be done before busmaster disable as we might need to
904 lapic_timer_state_broadcast(pr
, cx
, 1);
906 if (cx
->type
== ACPI_STATE_C3
)
907 ACPI_FLUSH_CPU_CACHE();
909 kt1
= ktime_get_real();
910 /* Tell the scheduler that we are going deep-idle: */
911 sched_clock_idle_sleep_event();
912 acpi_idle_do_entry(cx
);
913 kt2
= ktime_get_real();
914 idle_time
= ktime_to_us(ktime_sub(kt2
, kt1
));
916 sleep_ticks
= us_to_pm_timer_ticks(idle_time
);
918 /* Tell the scheduler how much we idled: */
919 sched_clock_idle_wakeup_event(sleep_ticks
*PM_TIMER_TICK_NS
);
922 current_thread_info()->status
|= TS_POLLING
;
926 lapic_timer_state_broadcast(pr
, cx
, 0);
927 cx
->time
+= sleep_ticks
;
931 static int c3_cpu_count
;
932 static DEFINE_SPINLOCK(c3_lock
);
935 * acpi_idle_enter_bm - enters C3 with proper BM handling
936 * @dev: the target CPU
937 * @state: the state data
939 * If BM is detected, the deepest non-C3 idle state is entered instead.
941 static int acpi_idle_enter_bm(struct cpuidle_device
*dev
,
942 struct cpuidle_state
*state
)
944 struct acpi_processor
*pr
;
945 struct acpi_processor_cx
*cx
= cpuidle_get_statedata(state
);
951 pr
= __get_cpu_var(processors
);
956 if (acpi_idle_suspend
)
957 return(acpi_idle_enter_c1(dev
, state
));
959 if (acpi_idle_bm_check()) {
960 if (dev
->safe_state
) {
961 dev
->last_state
= dev
->safe_state
;
962 return dev
->safe_state
->enter(dev
, dev
->safe_state
);
972 current_thread_info()->status
&= ~TS_POLLING
;
974 * TS_POLLING-cleared state must be visible before we test
979 if (unlikely(need_resched())) {
980 current_thread_info()->status
|= TS_POLLING
;
985 acpi_unlazy_tlb(smp_processor_id());
987 /* Tell the scheduler that we are going deep-idle: */
988 sched_clock_idle_sleep_event();
990 * Must be done before busmaster disable as we might need to
993 lapic_timer_state_broadcast(pr
, cx
, 1);
995 kt1
= ktime_get_real();
998 * bm_check implies we need ARB_DIS
999 * !bm_check implies we need cache flush
1000 * bm_control implies whether we can do ARB_DIS
1002 * That leaves a case where bm_check is set and bm_control is
1003 * not set. In that case we cannot do much, we enter C3
1004 * without doing anything.
1006 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
1007 spin_lock(&c3_lock
);
1009 /* Disable bus master arbitration when all CPUs are in C3 */
1010 if (c3_cpu_count
== num_online_cpus())
1011 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE
, 1);
1012 spin_unlock(&c3_lock
);
1013 } else if (!pr
->flags
.bm_check
) {
1014 ACPI_FLUSH_CPU_CACHE();
1017 acpi_idle_do_entry(cx
);
1019 /* Re-enable bus master arbitration */
1020 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
1021 spin_lock(&c3_lock
);
1022 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE
, 0);
1024 spin_unlock(&c3_lock
);
1026 kt2
= ktime_get_real();
1027 idle_time
= ktime_to_us(ktime_sub(kt2
, kt1
));
1029 sleep_ticks
= us_to_pm_timer_ticks(idle_time
);
1030 /* Tell the scheduler how much we idled: */
1031 sched_clock_idle_wakeup_event(sleep_ticks
*PM_TIMER_TICK_NS
);
1034 current_thread_info()->status
|= TS_POLLING
;
1038 lapic_timer_state_broadcast(pr
, cx
, 0);
1039 cx
->time
+= sleep_ticks
;
1043 struct cpuidle_driver acpi_idle_driver
= {
1044 .name
= "acpi_idle",
1045 .owner
= THIS_MODULE
,
1049 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
1050 * @pr: the ACPI processor
1052 static int acpi_processor_setup_cpuidle(struct acpi_processor
*pr
)
1054 int i
, count
= CPUIDLE_DRIVER_STATE_START
;
1055 struct acpi_processor_cx
*cx
;
1056 struct cpuidle_state
*state
;
1057 struct cpuidle_device
*dev
= &pr
->power
.dev
;
1059 if (!pr
->flags
.power_setup_done
)
1062 if (pr
->flags
.power
== 0) {
1067 for (i
= 0; i
< CPUIDLE_STATE_MAX
; i
++) {
1068 dev
->states
[i
].name
[0] = '\0';
1069 dev
->states
[i
].desc
[0] = '\0';
1072 if (max_cstate
== 0)
1075 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
&& i
<= max_cstate
; i
++) {
1076 cx
= &pr
->power
.states
[i
];
1077 state
= &dev
->states
[count
];
1082 #ifdef CONFIG_HOTPLUG_CPU
1083 if ((cx
->type
!= ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
1084 !pr
->flags
.has_cst
&&
1085 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
1088 cpuidle_set_statedata(state
, cx
);
1090 snprintf(state
->name
, CPUIDLE_NAME_LEN
, "C%d", i
);
1091 strncpy(state
->desc
, cx
->desc
, CPUIDLE_DESC_LEN
);
1092 state
->exit_latency
= cx
->latency
;
1093 state
->target_residency
= cx
->latency
* latency_factor
;
1094 state
->power_usage
= cx
->power
;
1099 state
->flags
|= CPUIDLE_FLAG_SHALLOW
;
1100 if (cx
->entry_method
== ACPI_CSTATE_FFH
)
1101 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1103 state
->enter
= acpi_idle_enter_c1
;
1104 dev
->safe_state
= state
;
1108 state
->flags
|= CPUIDLE_FLAG_BALANCED
;
1109 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1110 state
->enter
= acpi_idle_enter_simple
;
1111 dev
->safe_state
= state
;
1115 state
->flags
|= CPUIDLE_FLAG_DEEP
;
1116 state
->flags
|= CPUIDLE_FLAG_TIME_VALID
;
1117 state
->flags
|= CPUIDLE_FLAG_CHECK_BM
;
1118 state
->enter
= pr
->flags
.bm_check
?
1119 acpi_idle_enter_bm
:
1120 acpi_idle_enter_simple
;
1125 if (count
== CPUIDLE_STATE_MAX
)
1129 dev
->state_count
= count
;
1137 int acpi_processor_cst_has_changed(struct acpi_processor
*pr
)
1141 if (boot_option_idle_override
)
1151 if (!pr
->flags
.power_setup_done
)
1154 cpuidle_pause_and_lock();
1155 cpuidle_disable_device(&pr
->power
.dev
);
1156 acpi_processor_get_power_info(pr
);
1157 if (pr
->flags
.power
) {
1158 acpi_processor_setup_cpuidle(pr
);
1159 ret
= cpuidle_enable_device(&pr
->power
.dev
);
1161 cpuidle_resume_and_unlock();
1166 int __cpuinit
acpi_processor_power_init(struct acpi_processor
*pr
,
1167 struct acpi_device
*device
)
1169 acpi_status status
= 0;
1170 static int first_run
;
1171 #ifdef CONFIG_ACPI_PROCFS
1172 struct proc_dir_entry
*entry
= NULL
;
1175 if (boot_option_idle_override
)
1181 * When the boot option of "idle=halt" is added, halt
1182 * is used for CPU IDLE.
1183 * In such case C2/C3 is meaningless. So the max_cstate
1188 dmi_check_system(processor_power_dmi_table
);
1189 max_cstate
= acpi_processor_cstate_check(max_cstate
);
1190 if (max_cstate
< ACPI_C_STATES_MAX
)
1192 "ACPI: processor limited to max C-state %d\n",
1200 if (acpi_gbl_FADT
.cst_control
&& !nocst
) {
1202 acpi_os_write_port(acpi_gbl_FADT
.smi_command
, acpi_gbl_FADT
.cst_control
, 8);
1203 if (ACPI_FAILURE(status
)) {
1204 ACPI_EXCEPTION((AE_INFO
, status
,
1205 "Notifying BIOS of _CST ability failed"));
1209 acpi_processor_get_power_info(pr
);
1210 pr
->flags
.power_setup_done
= 1;
1213 * Install the idle handler if processor power management is supported.
1214 * Note that we use previously set idle handler will be used on
1215 * platforms that only support C1.
1217 if (pr
->flags
.power
) {
1218 acpi_processor_setup_cpuidle(pr
);
1219 if (cpuidle_register_device(&pr
->power
.dev
))
1222 #ifdef CONFIG_ACPI_PROCFS
1224 entry
= proc_create_data(ACPI_PROCESSOR_FILE_POWER
,
1225 S_IRUGO
, acpi_device_dir(device
),
1226 &acpi_processor_power_fops
,
1227 acpi_driver_data(device
));
1234 int acpi_processor_power_exit(struct acpi_processor
*pr
,
1235 struct acpi_device
*device
)
1237 if (boot_option_idle_override
)
1240 cpuidle_unregister_device(&pr
->power
.dev
);
1241 pr
->flags
.power_setup_done
= 0;
1243 #ifdef CONFIG_ACPI_PROCFS
1244 if (acpi_device_dir(device
))
1245 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1246 acpi_device_dir(device
));