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[SCSI] hpsa: eliminate lock_kernel in compat_ioctl
[linux-2.6/next.git] / drivers / media / video / em28xx / em28xx-core.c
blobb311d4514bdf0e78b270d45d014aeec55c071aca
1 /*
2 em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
3
4 Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
5 Markus Rechberger <mrechberger@gmail.com>
6 Mauro Carvalho Chehab <mchehab@infradead.org>
7 Sascha Sommer <saschasommer@freenet.de>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 */
23
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/module.h>
27 #include <linux/usb.h>
28 #include <linux/vmalloc.h>
29 #include <media/v4l2-common.h>
30
31 #include "em28xx.h"
32
33 /* #define ENABLE_DEBUG_ISOC_FRAMES */
34
35 static unsigned int core_debug;
36 module_param(core_debug, int, 0644);
37 MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
38
39 #define em28xx_coredbg(fmt, arg...) do {\
40 if (core_debug) \
41 printk(KERN_INFO "%s %s :"fmt, \
42 dev->name, __func__ , ##arg); } while (0)
43
44 static unsigned int reg_debug;
45 module_param(reg_debug, int, 0644);
46 MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
47
48 #define em28xx_regdbg(fmt, arg...) do {\
49 if (reg_debug) \
50 printk(KERN_INFO "%s %s :"fmt, \
51 dev->name, __func__ , ##arg); } while (0)
52
53 static int alt;
54 module_param(alt, int, 0644);
55 MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
56
57 static unsigned int disable_vbi;
58 module_param(disable_vbi, int, 0644);
59 MODULE_PARM_DESC(disable_vbi, "disable vbi support");
60
61 /* FIXME */
62 #define em28xx_isocdbg(fmt, arg...) do {\
63 if (core_debug) \
64 printk(KERN_INFO "%s %s :"fmt, \
65 dev->name, __func__ , ##arg); } while (0)
66
67 /*
68 * em28xx_read_reg_req()
69 * reads data from the usb device specifying bRequest
70 */
71 int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
72 char *buf, int len)
73 {
74 int ret;
75 int pipe = usb_rcvctrlpipe(dev->udev, 0);
76
77 if (dev->state & DEV_DISCONNECTED)
78 return -ENODEV;
79
80 if (len > URB_MAX_CTRL_SIZE)
81 return -EINVAL;
82
83 if (reg_debug) {
84 printk(KERN_DEBUG "(pipe 0x%08x): "
85 "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
86 pipe,
87 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
88 req, 0, 0,
89 reg & 0xff, reg >> 8,
90 len & 0xff, len >> 8);
91 }
92
93 mutex_lock(&dev->ctrl_urb_lock);
94 ret = usb_control_msg(dev->udev, pipe, req,
95 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
96 0x0000, reg, dev->urb_buf, len, HZ);
97 if (ret < 0) {
98 if (reg_debug)
99 printk(" failed!\n");
100 mutex_unlock(&dev->ctrl_urb_lock);
101 return ret;
102 }
103
104 if (len)
105 memcpy(buf, dev->urb_buf, len);
106
107 mutex_unlock(&dev->ctrl_urb_lock);
108
109 if (reg_debug) {
110 int byte;
111
112 printk("<<<");
113 for (byte = 0; byte < len; byte++)
114 printk(" %02x", (unsigned char)buf[byte]);
115 printk("\n");
116 }
117
118 return ret;
119 }
120
121 /*
122 * em28xx_read_reg_req()
123 * reads data from the usb device specifying bRequest
124 */
125 int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
126 {
127 int ret;
128 u8 val;
129
130 ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
131 if (ret < 0)
132 return ret;
133
134 return val;
135 }
136
137 int em28xx_read_reg(struct em28xx *dev, u16 reg)
138 {
139 return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
140 }
141
142 /*
143 * em28xx_write_regs_req()
144 * sends data to the usb device, specifying bRequest
145 */
146 int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
147 int len)
148 {
149 int ret;
150 int pipe = usb_sndctrlpipe(dev->udev, 0);
151
152 if (dev->state & DEV_DISCONNECTED)
153 return -ENODEV;
154
155 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
156 return -EINVAL;
157
158 if (reg_debug) {
159 int byte;
160
161 printk(KERN_DEBUG "(pipe 0x%08x): "
162 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
163 pipe,
164 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
165 req, 0, 0,
166 reg & 0xff, reg >> 8,
167 len & 0xff, len >> 8);
168
169 for (byte = 0; byte < len; byte++)
170 printk(" %02x", (unsigned char)buf[byte]);
171 printk("\n");
172 }
173
174 mutex_lock(&dev->ctrl_urb_lock);
175 memcpy(dev->urb_buf, buf, len);
176 ret = usb_control_msg(dev->udev, pipe, req,
177 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
178 0x0000, reg, dev->urb_buf, len, HZ);
179 mutex_unlock(&dev->ctrl_urb_lock);
180
181 if (dev->wait_after_write)
182 msleep(dev->wait_after_write);
183
184 return ret;
185 }
186
187 int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
188 {
189 int rc;
190
191 rc = em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
192
193 /* Stores GPO/GPIO values at the cache, if changed
194 Only write values should be stored, since input on a GPIO
195 register will return the input bits.
196 Not sure what happens on reading GPO register.
197 */
198 if (rc >= 0) {
199 if (reg == dev->reg_gpo_num)
200 dev->reg_gpo = buf[0];
201 else if (reg == dev->reg_gpio_num)
202 dev->reg_gpio = buf[0];
203 }
204
205 return rc;
206 }
207
208 /* Write a single register */
209 int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
210 {
211 return em28xx_write_regs(dev, reg, &val, 1);
212 }
213
214 /*
215 * em28xx_write_reg_bits()
216 * sets only some bits (specified by bitmask) of a register, by first reading
217 * the actual value
218 */
219 int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
220 u8 bitmask)
221 {
222 int oldval;
223 u8 newval;
224
225 /* Uses cache for gpo/gpio registers */
226 if (reg == dev->reg_gpo_num)
227 oldval = dev->reg_gpo;
228 else if (reg == dev->reg_gpio_num)
229 oldval = dev->reg_gpio;
230 else
231 oldval = em28xx_read_reg(dev, reg);
232
233 if (oldval < 0)
234 return oldval;
235
236 newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
237
238 return em28xx_write_regs(dev, reg, &newval, 1);
239 }
240
241 /*
242 * em28xx_is_ac97_ready()
243 * Checks if ac97 is ready
244 */
245 static int em28xx_is_ac97_ready(struct em28xx *dev)
246 {
247 int ret, i;
248
249 /* Wait up to 50 ms for AC97 command to complete */
250 for (i = 0; i < 10; i++, msleep(5)) {
251 ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
252 if (ret < 0)
253 return ret;
254
255 if (!(ret & 0x01))
256 return 0;
257 }
258
259 em28xx_warn("AC97 command still being executed: not handled properly!\n");
260 return -EBUSY;
261 }
262
263 /*
264 * em28xx_read_ac97()
265 * write a 16 bit value to the specified AC97 address (LSB first!)
266 */
267 int em28xx_read_ac97(struct em28xx *dev, u8 reg)
268 {
269 int ret;
270 u8 addr = (reg & 0x7f) | 0x80;
271 u16 val;
272
273 ret = em28xx_is_ac97_ready(dev);
274 if (ret < 0)
275 return ret;
276
277 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
278 if (ret < 0)
279 return ret;
280
281 ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
282 (u8 *)&val, sizeof(val));
283
284 if (ret < 0)
285 return ret;
286 return le16_to_cpu(val);
287 }
288
289 /*
290 * em28xx_write_ac97()
291 * write a 16 bit value to the specified AC97 address (LSB first!)
292 */
293 int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
294 {
295 int ret;
296 u8 addr = reg & 0x7f;
297 __le16 value;
298
299 value = cpu_to_le16(val);
300
301 ret = em28xx_is_ac97_ready(dev);
302 if (ret < 0)
303 return ret;
304
305 ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *) &value, 2);
306 if (ret < 0)
307 return ret;
308
309 ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
310 if (ret < 0)
311 return ret;
312
313 return 0;
314 }
315
316 struct em28xx_vol_table {
317 enum em28xx_amux mux;
318 u8 reg;
319 };
320
321 static struct em28xx_vol_table inputs[] = {
322 { EM28XX_AMUX_VIDEO, AC97_VIDEO_VOL },
323 { EM28XX_AMUX_LINE_IN, AC97_LINEIN_VOL },
324 { EM28XX_AMUX_PHONE, AC97_PHONE_VOL },
325 { EM28XX_AMUX_MIC, AC97_MIC_VOL },
326 { EM28XX_AMUX_CD, AC97_CD_VOL },
327 { EM28XX_AMUX_AUX, AC97_AUX_VOL },
328 { EM28XX_AMUX_PCM_OUT, AC97_PCM_OUT_VOL },
329 };
330
331 static int set_ac97_input(struct em28xx *dev)
332 {
333 int ret, i;
334 enum em28xx_amux amux = dev->ctl_ainput;
335
336 /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
337 em28xx should point to LINE IN, while AC97 should use VIDEO
338 */
339 if (amux == EM28XX_AMUX_VIDEO2)
340 amux = EM28XX_AMUX_VIDEO;
341
342 /* Mute all entres but the one that were selected */
343 for (i = 0; i < ARRAY_SIZE(inputs); i++) {
344 if (amux == inputs[i].mux)
345 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
346 else
347 ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
348
349 if (ret < 0)
350 em28xx_warn("couldn't setup AC97 register %d\n",
351 inputs[i].reg);
352 }
353 return 0;
354 }
355
356 static int em28xx_set_audio_source(struct em28xx *dev)
357 {
358 int ret;
359 u8 input;
360
361 if (dev->board.is_em2800) {
362 if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
363 input = EM2800_AUDIO_SRC_TUNER;
364 else
365 input = EM2800_AUDIO_SRC_LINE;
366
367 ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
368 if (ret < 0)
369 return ret;
370 }
371
372 if (dev->board.has_msp34xx)
373 input = EM28XX_AUDIO_SRC_TUNER;
374 else {
375 switch (dev->ctl_ainput) {
376 case EM28XX_AMUX_VIDEO:
377 input = EM28XX_AUDIO_SRC_TUNER;
378 break;
379 default:
380 input = EM28XX_AUDIO_SRC_LINE;
381 break;
382 }
383 }
384
385 if (dev->board.mute_gpio && dev->mute)
386 em28xx_gpio_set(dev, dev->board.mute_gpio);
387 else
388 em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
389
390 ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
391 if (ret < 0)
392 return ret;
393 msleep(5);
394
395 switch (dev->audio_mode.ac97) {
396 case EM28XX_NO_AC97:
397 break;
398 default:
399 ret = set_ac97_input(dev);
400 }
401
402 return ret;
403 }
404
405 static const struct em28xx_vol_table outputs[] = {
406 { EM28XX_AOUT_MASTER, AC97_MASTER_VOL },
407 { EM28XX_AOUT_LINE, AC97_LINE_LEVEL_VOL },
408 { EM28XX_AOUT_MONO, AC97_MASTER_MONO_VOL },
409 { EM28XX_AOUT_LFE, AC97_LFE_MASTER_VOL },
410 { EM28XX_AOUT_SURR, AC97_SURR_MASTER_VOL },
411 };
412
413 int em28xx_audio_analog_set(struct em28xx *dev)
414 {
415 int ret, i;
416 u8 xclk;
417
418 if (!dev->audio_mode.has_audio)
419 return 0;
420
421 /* It is assumed that all devices use master volume for output.
422 It would be possible to use also line output.
423 */
424 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
425 /* Mute all outputs */
426 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
427 ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
428 if (ret < 0)
429 em28xx_warn("couldn't setup AC97 register %d\n",
430 outputs[i].reg);
431 }
432 }
433
434 xclk = dev->board.xclk & 0x7f;
435 if (!dev->mute)
436 xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
437
438 ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
439 if (ret < 0)
440 return ret;
441 msleep(10);
442
443 /* Selects the proper audio input */
444 ret = em28xx_set_audio_source(dev);
445
446 /* Sets volume */
447 if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
448 int vol;
449
450 em28xx_write_ac97(dev, AC97_POWER_DOWN_CTRL, 0x4200);
451 em28xx_write_ac97(dev, AC97_EXT_AUD_CTRL, 0x0031);
452 em28xx_write_ac97(dev, AC97_PCM_IN_SRATE, 0xbb80);
453
454 /* LSB: left channel - both channels with the same level */
455 vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
456
457 /* Mute device, if needed */
458 if (dev->mute)
459 vol |= 0x8000;
460
461 /* Sets volume */
462 for (i = 0; i < ARRAY_SIZE(outputs); i++) {
463 if (dev->ctl_aoutput & outputs[i].mux)
464 ret = em28xx_write_ac97(dev, outputs[i].reg,
465 vol);
466 if (ret < 0)
467 em28xx_warn("couldn't setup AC97 register %d\n",
468 outputs[i].reg);
469 }
470
471 if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
472 int sel = ac97_return_record_select(dev->ctl_aoutput);
473
474 /* Use the same input for both left and right
475 channels */
476 sel |= (sel << 8);
477
478 em28xx_write_ac97(dev, AC97_RECORD_SELECT, sel);
479 }
480 }
481
482 return ret;
483 }
484 EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
485
486 int em28xx_audio_setup(struct em28xx *dev)
487 {
488 int vid1, vid2, feat, cfg;
489 u32 vid;
490
491 if (dev->chip_id == CHIP_ID_EM2870 || dev->chip_id == CHIP_ID_EM2874) {
492 /* Digital only device - don't load any alsa module */
493 dev->audio_mode.has_audio = 0;
494 dev->has_audio_class = 0;
495 dev->has_alsa_audio = 0;
496 return 0;
497 }
498
499 /* If device doesn't support Usb Audio Class, use vendor class */
500 if (!dev->has_audio_class)
501 dev->has_alsa_audio = 1;
502
503 dev->audio_mode.has_audio = 1;
504
505 /* See how this device is configured */
506 cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
507 em28xx_info("Config register raw data: 0x%02x\n", cfg);
508 if (cfg < 0) {
509 /* Register read error? */
510 cfg = EM28XX_CHIPCFG_AC97; /* Be conservative */
511 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
512 /* The device doesn't have vendor audio at all */
513 dev->has_alsa_audio = 0;
514 dev->audio_mode.has_audio = 0;
515 return 0;
516 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
517 EM28XX_CHIPCFG_I2S_3_SAMPRATES) {
518 em28xx_info("I2S Audio (3 sample rates)\n");
519 dev->audio_mode.i2s_3rates = 1;
520 } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
521 EM28XX_CHIPCFG_I2S_5_SAMPRATES) {
522 em28xx_info("I2S Audio (5 sample rates)\n");
523 dev->audio_mode.i2s_5rates = 1;
524 }
525
526 if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
527 /* Skip the code that does AC97 vendor detection */
528 dev->audio_mode.ac97 = EM28XX_NO_AC97;
529 goto init_audio;
530 }
531
532 dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
533
534 vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
535 if (vid1 < 0) {
536 /*
537 * Device likely doesn't support AC97
538 * Note: (some) em2800 devices without eeprom reports 0x91 on
539 * CHIPCFG register, even not having an AC97 chip
540 */
541 em28xx_warn("AC97 chip type couldn't be determined\n");
542 dev->audio_mode.ac97 = EM28XX_NO_AC97;
543 dev->has_alsa_audio = 0;
544 dev->audio_mode.has_audio = 0;
545 goto init_audio;
546 }
547
548 vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
549 if (vid2 < 0)
550 goto init_audio;
551
552 vid = vid1 << 16 | vid2;
553
554 dev->audio_mode.ac97_vendor_id = vid;
555 em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
556
557 feat = em28xx_read_ac97(dev, AC97_RESET);
558 if (feat < 0)
559 goto init_audio;
560
561 dev->audio_mode.ac97_feat = feat;
562 em28xx_warn("AC97 features = 0x%04x\n", feat);
563
564 /* Try to identify what audio processor we have */
565 if ((vid == 0xffffffff) && (feat == 0x6a90))
566 dev->audio_mode.ac97 = EM28XX_AC97_EM202;
567 else if ((vid >> 8) == 0x838476)
568 dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
569
570 init_audio:
571 /* Reports detected AC97 processor */
572 switch (dev->audio_mode.ac97) {
573 case EM28XX_NO_AC97:
574 em28xx_info("No AC97 audio processor\n");
575 break;
576 case EM28XX_AC97_EM202:
577 em28xx_info("Empia 202 AC97 audio processor detected\n");
578 break;
579 case EM28XX_AC97_SIGMATEL:
580 em28xx_info("Sigmatel audio processor detected(stac 97%02x)\n",
581 dev->audio_mode.ac97_vendor_id & 0xff);
582 break;
583 case EM28XX_AC97_OTHER:
584 em28xx_warn("Unknown AC97 audio processor detected!\n");
585 break;
586 default:
587 break;
588 }
589
590 return em28xx_audio_analog_set(dev);
591 }
592 EXPORT_SYMBOL_GPL(em28xx_audio_setup);
593
594 int em28xx_colorlevels_set_default(struct em28xx *dev)
595 {
596 em28xx_write_reg(dev, EM28XX_R20_YGAIN, 0x10); /* contrast */
597 em28xx_write_reg(dev, EM28XX_R21_YOFFSET, 0x00); /* brightness */
598 em28xx_write_reg(dev, EM28XX_R22_UVGAIN, 0x10); /* saturation */
599 em28xx_write_reg(dev, EM28XX_R23_UOFFSET, 0x00);
600 em28xx_write_reg(dev, EM28XX_R24_VOFFSET, 0x00);
601 em28xx_write_reg(dev, EM28XX_R25_SHARPNESS, 0x00);
602
603 em28xx_write_reg(dev, EM28XX_R14_GAMMA, 0x20);
604 em28xx_write_reg(dev, EM28XX_R15_RGAIN, 0x20);
605 em28xx_write_reg(dev, EM28XX_R16_GGAIN, 0x20);
606 em28xx_write_reg(dev, EM28XX_R17_BGAIN, 0x20);
607 em28xx_write_reg(dev, EM28XX_R18_ROFFSET, 0x00);
608 em28xx_write_reg(dev, EM28XX_R19_GOFFSET, 0x00);
609 return em28xx_write_reg(dev, EM28XX_R1A_BOFFSET, 0x00);
610 }
611
612 int em28xx_capture_start(struct em28xx *dev, int start)
613 {
614 int rc;
615
616 if (dev->chip_id == CHIP_ID_EM2874) {
617 /* The Transport Stream Enable Register moved in em2874 */
618 if (!start) {
619 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
620 0x00,
621 EM2874_TS1_CAPTURE_ENABLE);
622 return rc;
623 }
624
625 /* Enable Transport Stream */
626 rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
627 EM2874_TS1_CAPTURE_ENABLE,
628 EM2874_TS1_CAPTURE_ENABLE);
629 return rc;
630 }
631
632
633 /* FIXME: which is the best order? */
634 /* video registers are sampled by VREF */
635 rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
636 start ? 0x10 : 0x00, 0x10);
637 if (rc < 0)
638 return rc;
639
640 if (!start) {
641 /* disable video capture */
642 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
643 return rc;
644 }
645
646 if (dev->board.is_webcam)
647 rc = em28xx_write_reg(dev, 0x13, 0x0c);
648
649 /* enable video capture */
650 rc = em28xx_write_reg(dev, 0x48, 0x00);
651
652 if (dev->mode == EM28XX_ANALOG_MODE)
653 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
654 else
655 rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
656
657 msleep(6);
658
659 return rc;
660 }
661
662 int em28xx_vbi_supported(struct em28xx *dev)
663 {
664 /* Modprobe option to manually disable */
665 if (disable_vbi == 1)
666 return 0;
667
668 if (dev->chip_id == CHIP_ID_EM2860 ||
669 dev->chip_id == CHIP_ID_EM2883)
670 return 1;
671
672 /* Version of em28xx that does not support VBI */
673 return 0;
674 }
675
676 int em28xx_set_outfmt(struct em28xx *dev)
677 {
678 int ret;
679 u8 vinctrl;
680
681 ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
682 dev->format->reg | 0x20, 0xff);
683 if (ret < 0)
684 return ret;
685
686 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, dev->vinmode);
687 if (ret < 0)
688 return ret;
689
690 vinctrl = dev->vinctl;
691 if (em28xx_vbi_supported(dev) == 1) {
692 vinctrl |= EM28XX_VINCTRL_VBI_RAW;
693 em28xx_write_reg(dev, EM28XX_R34_VBI_START_H, 0x00);
694 em28xx_write_reg(dev, EM28XX_R35_VBI_START_V, 0x09);
695 em28xx_write_reg(dev, EM28XX_R36_VBI_WIDTH, 0xb4);
696 em28xx_write_reg(dev, EM28XX_R37_VBI_HEIGHT, 0x0c);
697 }
698
699 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctrl);
700 }
701
702 static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
703 u8 ymin, u8 ymax)
704 {
705 em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
706 xmin, ymin, xmax, ymax);
707
708 em28xx_write_regs(dev, EM28XX_R28_XMIN, &xmin, 1);
709 em28xx_write_regs(dev, EM28XX_R29_XMAX, &xmax, 1);
710 em28xx_write_regs(dev, EM28XX_R2A_YMIN, &ymin, 1);
711 return em28xx_write_regs(dev, EM28XX_R2B_YMAX, &ymax, 1);
712 }
713
714 static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
715 u16 width, u16 height)
716 {
717 u8 cwidth = width;
718 u8 cheight = height;
719 u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
720
721 em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
722 (width | (overflow & 2) << 7),
723 (height | (overflow & 1) << 8));
724
725 em28xx_write_regs(dev, EM28XX_R1C_HSTART, &hstart, 1);
726 em28xx_write_regs(dev, EM28XX_R1D_VSTART, &vstart, 1);
727 em28xx_write_regs(dev, EM28XX_R1E_CWIDTH, &cwidth, 1);
728 em28xx_write_regs(dev, EM28XX_R1F_CHEIGHT, &cheight, 1);
729 return em28xx_write_regs(dev, EM28XX_R1B_OFLOW, &overflow, 1);
730 }
731
732 static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
733 {
734 u8 mode;
735 /* the em2800 scaler only supports scaling down to 50% */
736
737 if (dev->board.is_em2800) {
738 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
739 } else {
740 u8 buf[2];
741
742 buf[0] = h;
743 buf[1] = h >> 8;
744 em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2);
745
746 buf[0] = v;
747 buf[1] = v >> 8;
748 em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2);
749 /* it seems that both H and V scalers must be active
750 to work correctly */
751 mode = (h || v) ? 0x30 : 0x00;
752 }
753 return em28xx_write_reg_bits(dev, EM28XX_R26_COMPR, mode, 0x30);
754 }
755
756 /* FIXME: this only function read values from dev */
757 int em28xx_resolution_set(struct em28xx *dev)
758 {
759 int width, height;
760 width = norm_maxw(dev);
761 height = norm_maxh(dev);
762
763 if (!dev->progressive)
764 height >>= norm_maxh(dev);
765
766 em28xx_set_outfmt(dev);
767
768
769 em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
770
771 /* If we don't set the start position to 4 in VBI mode, we end up
772 with line 21 being YUYV encoded instead of being in 8-bit
773 greyscale */
774 if (em28xx_vbi_supported(dev) == 1)
775 em28xx_capture_area_set(dev, 0, 4, width >> 2, height >> 2);
776 else
777 em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
778
779 return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
780 }
781
782 int em28xx_set_alternate(struct em28xx *dev)
783 {
784 int errCode, prev_alt = dev->alt;
785 int i;
786 unsigned int min_pkt_size = dev->width * 2 + 4;
787
788 /*
789 * alt = 0 is used only for control messages, so, only values
790 * greater than 0 can be used for streaming.
791 */
792 if (alt && alt < dev->num_alt) {
793 em28xx_coredbg("alternate forced to %d\n", dev->alt);
794 dev->alt = alt;
795 goto set_alt;
796 }
797
798 /* When image size is bigger than a certain value,
799 the frame size should be increased, otherwise, only
800 green screen will be received.
801 */
802 if (dev->width * 2 * dev->height > 720 * 240 * 2)
803 min_pkt_size *= 2;
804
805 for (i = 0; i < dev->num_alt; i++) {
806 /* stop when the selected alt setting offers enough bandwidth */
807 if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
808 dev->alt = i;
809 break;
810 /* otherwise make sure that we end up with the maximum bandwidth
811 because the min_pkt_size equation might be wrong...
812 */
813 } else if (dev->alt_max_pkt_size[i] >
814 dev->alt_max_pkt_size[dev->alt])
815 dev->alt = i;
816 }
817
818 set_alt:
819 if (dev->alt != prev_alt) {
820 em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
821 min_pkt_size, dev->alt);
822 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
823 em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
824 dev->alt, dev->max_pkt_size);
825 errCode = usb_set_interface(dev->udev, 0, dev->alt);
826 if (errCode < 0) {
827 em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
828 dev->alt, errCode);
829 return errCode;
830 }
831 }
832 return 0;
833 }
834
835 int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
836 {
837 int rc = 0;
838
839 if (!gpio)
840 return rc;
841
842 if (dev->mode != EM28XX_SUSPEND) {
843 em28xx_write_reg(dev, 0x48, 0x00);
844 if (dev->mode == EM28XX_ANALOG_MODE)
845 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
846 else
847 em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
848 msleep(6);
849 }
850
851 /* Send GPIO reset sequences specified at board entry */
852 while (gpio->sleep >= 0) {
853 if (gpio->reg >= 0) {
854 rc = em28xx_write_reg_bits(dev,
855 gpio->reg,
856 gpio->val,
857 gpio->mask);
858 if (rc < 0)
859 return rc;
860 }
861 if (gpio->sleep > 0)
862 msleep(gpio->sleep);
863
864 gpio++;
865 }
866 return rc;
867 }
868
869 int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
870 {
871 if (dev->mode == set_mode)
872 return 0;
873
874 if (set_mode == EM28XX_SUSPEND) {
875 dev->mode = set_mode;
876
877 /* FIXME: add suspend support for ac97 */
878
879 return em28xx_gpio_set(dev, dev->board.suspend_gpio);
880 }
881
882 dev->mode = set_mode;
883
884 if (dev->mode == EM28XX_DIGITAL_MODE)
885 return em28xx_gpio_set(dev, dev->board.dvb_gpio);
886 else
887 return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
888 }
889 EXPORT_SYMBOL_GPL(em28xx_set_mode);
890
891 /* ------------------------------------------------------------------
892 URB control
893 ------------------------------------------------------------------*/
894
895 /*
896 * IRQ callback, called by URB callback
897 */
898 static void em28xx_irq_callback(struct urb *urb)
899 {
900 struct em28xx *dev = urb->context;
901 int rc, i;
902
903 switch (urb->status) {
904 case 0: /* success */
905 case -ETIMEDOUT: /* NAK */
906 break;
907 case -ECONNRESET: /* kill */
908 case -ENOENT:
909 case -ESHUTDOWN:
910 return;
911 default: /* error */
912 em28xx_isocdbg("urb completition error %d.\n", urb->status);
913 break;
914 }
915
916 /* Copy data from URB */
917 spin_lock(&dev->slock);
918 rc = dev->isoc_ctl.isoc_copy(dev, urb);
919 spin_unlock(&dev->slock);
920
921 /* Reset urb buffers */
922 for (i = 0; i < urb->number_of_packets; i++) {
923 urb->iso_frame_desc[i].status = 0;
924 urb->iso_frame_desc[i].actual_length = 0;
925 }
926 urb->status = 0;
927
928 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
929 if (urb->status) {
930 em28xx_isocdbg("urb resubmit failed (error=%i)\n",
931 urb->status);
932 }
933 }
934
935 /*
936 * Stop and Deallocate URBs
937 */
938 void em28xx_uninit_isoc(struct em28xx *dev)
939 {
940 struct urb *urb;
941 int i;
942
943 em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
944
945 dev->isoc_ctl.nfields = -1;
946 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
947 urb = dev->isoc_ctl.urb[i];
948 if (urb) {
949 if (!irqs_disabled())
950 usb_kill_urb(urb);
951 else
952 usb_unlink_urb(urb);
953
954 if (dev->isoc_ctl.transfer_buffer[i]) {
955 usb_buffer_free(dev->udev,
956 urb->transfer_buffer_length,
957 dev->isoc_ctl.transfer_buffer[i],
958 urb->transfer_dma);
959 }
960 usb_free_urb(urb);
961 dev->isoc_ctl.urb[i] = NULL;
962 }
963 dev->isoc_ctl.transfer_buffer[i] = NULL;
964 }
965
966 kfree(dev->isoc_ctl.urb);
967 kfree(dev->isoc_ctl.transfer_buffer);
968
969 dev->isoc_ctl.urb = NULL;
970 dev->isoc_ctl.transfer_buffer = NULL;
971 dev->isoc_ctl.num_bufs = 0;
972
973 em28xx_capture_start(dev, 0);
974 }
975 EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
976
977 /*
978 * Allocate URBs and start IRQ
979 */
980 int em28xx_init_isoc(struct em28xx *dev, int max_packets,
981 int num_bufs, int max_pkt_size,
982 int (*isoc_copy) (struct em28xx *dev, struct urb *urb))
983 {
984 struct em28xx_dmaqueue *dma_q = &dev->vidq;
985 struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
986 int i;
987 int sb_size, pipe;
988 struct urb *urb;
989 int j, k;
990 int rc;
991
992 em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
993
994 /* De-allocates all pending stuff */
995 em28xx_uninit_isoc(dev);
996
997 dev->isoc_ctl.isoc_copy = isoc_copy;
998 dev->isoc_ctl.num_bufs = num_bufs;
999
1000 dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
1001 if (!dev->isoc_ctl.urb) {
1002 em28xx_errdev("cannot alloc memory for usb buffers\n");
1003 return -ENOMEM;
1004 }
1005
1006 dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
1007 GFP_KERNEL);
1008 if (!dev->isoc_ctl.transfer_buffer) {
1009 em28xx_errdev("cannot allocate memory for usb transfer\n");
1010 kfree(dev->isoc_ctl.urb);
1011 return -ENOMEM;
1012 }
1013
1014 dev->isoc_ctl.max_pkt_size = max_pkt_size;
1015 dev->isoc_ctl.vid_buf = NULL;
1016 dev->isoc_ctl.vbi_buf = NULL;
1017
1018 sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
1019
1020 /* allocate urbs and transfer buffers */
1021 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
1022 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
1023 if (!urb) {
1024 em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
1025 em28xx_uninit_isoc(dev);
1026 return -ENOMEM;
1027 }
1028 dev->isoc_ctl.urb[i] = urb;
1029
1030 dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
1031 sb_size, GFP_KERNEL, &urb->transfer_dma);
1032 if (!dev->isoc_ctl.transfer_buffer[i]) {
1033 em28xx_err("unable to allocate %i bytes for transfer"
1034 " buffer %i%s\n",
1035 sb_size, i,
1036 in_interrupt() ? " while in int" : "");
1037 em28xx_uninit_isoc(dev);
1038 return -ENOMEM;
1039 }
1040 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
1041
1042 /* FIXME: this is a hack - should be
1043 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
1044 should also be using 'desc.bInterval'
1045 */
1046 pipe = usb_rcvisocpipe(dev->udev,
1047 dev->mode == EM28XX_ANALOG_MODE ? 0x82 : 0x84);
1048
1049 usb_fill_int_urb(urb, dev->udev, pipe,
1050 dev->isoc_ctl.transfer_buffer[i], sb_size,
1051 em28xx_irq_callback, dev, 1);
1052
1053 urb->number_of_packets = max_packets;
1054 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
1055
1056 k = 0;
1057 for (j = 0; j < max_packets; j++) {
1058 urb->iso_frame_desc[j].offset = k;
1059 urb->iso_frame_desc[j].length =
1060 dev->isoc_ctl.max_pkt_size;
1061 k += dev->isoc_ctl.max_pkt_size;
1062 }
1063 }
1064
1065 init_waitqueue_head(&dma_q->wq);
1066 init_waitqueue_head(&vbi_dma_q->wq);
1067
1068 em28xx_capture_start(dev, 1);
1069
1070 /* submit urbs and enables IRQ */
1071 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
1072 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
1073 if (rc) {
1074 em28xx_err("submit of urb %i failed (error=%i)\n", i,
1075 rc);
1076 em28xx_uninit_isoc(dev);
1077 return rc;
1078 }
1079 }
1080
1081 return 0;
1082 }
1083 EXPORT_SYMBOL_GPL(em28xx_init_isoc);
1084
1085 /* Determine the packet size for the DVB stream for the given device
1086 (underlying value programmed into the eeprom) */
1087 int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev)
1088 {
1089 unsigned int chip_cfg2;
1090 unsigned int packet_size = 564;
1091
1092 if (dev->chip_id == CHIP_ID_EM2874) {
1093 /* FIXME - for now assume 564 like it was before, but the
1094 em2874 code should be added to return the proper value... */
1095 packet_size = 564;
1096 } else {
1097 /* TS max packet size stored in bits 1-0 of R01 */
1098 chip_cfg2 = em28xx_read_reg(dev, EM28XX_R01_CHIPCFG2);
1099 switch (chip_cfg2 & EM28XX_CHIPCFG2_TS_PACKETSIZE_MASK) {
1100 case EM28XX_CHIPCFG2_TS_PACKETSIZE_188:
1101 packet_size = 188;
1102 break;
1103 case EM28XX_CHIPCFG2_TS_PACKETSIZE_376:
1104 packet_size = 376;
1105 break;
1106 case EM28XX_CHIPCFG2_TS_PACKETSIZE_564:
1107 packet_size = 564;
1108 break;
1109 case EM28XX_CHIPCFG2_TS_PACKETSIZE_752:
1110 packet_size = 752;
1111 break;
1112 }
1113 }
1114
1115 em28xx_coredbg("dvb max packet size=%d\n", packet_size);
1116 return packet_size;
1117 }
1118 EXPORT_SYMBOL_GPL(em28xx_isoc_dvb_max_packetsize);
1119
1120 /*
1121 * em28xx_wake_i2c()
1122 * configure i2c attached devices
1123 */
1124 void em28xx_wake_i2c(struct em28xx *dev)
1125 {
1126 v4l2_device_call_all(&dev->v4l2_dev, 0, core, reset, 0);
1127 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_routing,
1128 INPUT(dev->ctl_input)->vmux, 0, 0);
1129 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0);
1130 }
1131
1132 /*
1133 * Device control list
1134 */
1135
1136 static LIST_HEAD(em28xx_devlist);
1137 static DEFINE_MUTEX(em28xx_devlist_mutex);
1138
1139 /*
1140 * em28xx_realease_resources()
1141 * unregisters the v4l2,i2c and usb devices
1142 * called when the device gets disconected or at module unload
1143 */
1144 void em28xx_remove_from_devlist(struct em28xx *dev)
1145 {
1146 mutex_lock(&em28xx_devlist_mutex);
1147 list_del(&dev->devlist);
1148 mutex_unlock(&em28xx_devlist_mutex);
1149 };
1150
1151 void em28xx_add_into_devlist(struct em28xx *dev)
1152 {
1153 mutex_lock(&em28xx_devlist_mutex);
1154 list_add_tail(&dev->devlist, &em28xx_devlist);
1155 mutex_unlock(&em28xx_devlist_mutex);
1156 };
1157
1158 /*
1159 * Extension interface
1160 */
1161
1162 static LIST_HEAD(em28xx_extension_devlist);
1163 static DEFINE_MUTEX(em28xx_extension_devlist_lock);
1164
1165 int em28xx_register_extension(struct em28xx_ops *ops)
1166 {
1167 struct em28xx *dev = NULL;
1168
1169 mutex_lock(&em28xx_devlist_mutex);
1170 mutex_lock(&em28xx_extension_devlist_lock);
1171 list_add_tail(&ops->next, &em28xx_extension_devlist);
1172 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1173 if (dev)
1174 ops->init(dev);
1175 }
1176 printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name);
1177 mutex_unlock(&em28xx_extension_devlist_lock);
1178 mutex_unlock(&em28xx_devlist_mutex);
1179 return 0;
1180 }
1181 EXPORT_SYMBOL(em28xx_register_extension);
1182
1183 void em28xx_unregister_extension(struct em28xx_ops *ops)
1184 {
1185 struct em28xx *dev = NULL;
1186
1187 mutex_lock(&em28xx_devlist_mutex);
1188 list_for_each_entry(dev, &em28xx_devlist, devlist) {
1189 if (dev)
1190 ops->fini(dev);
1191 }
1192
1193 mutex_lock(&em28xx_extension_devlist_lock);
1194 printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
1195 list_del(&ops->next);
1196 mutex_unlock(&em28xx_extension_devlist_lock);
1197 mutex_unlock(&em28xx_devlist_mutex);
1198 }
1199 EXPORT_SYMBOL(em28xx_unregister_extension);
1200
1201 void em28xx_init_extension(struct em28xx *dev)
1202 {
1203 struct em28xx_ops *ops = NULL;
1204
1205 mutex_lock(&em28xx_extension_devlist_lock);
1206 if (!list_empty(&em28xx_extension_devlist)) {
1207 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1208 if (ops->init)
1209 ops->init(dev);
1210 }
1211 }
1212 mutex_unlock(&em28xx_extension_devlist_lock);
1213 }
1214
1215 void em28xx_close_extension(struct em28xx *dev)
1216 {
1217 struct em28xx_ops *ops = NULL;
1218
1219 mutex_lock(&em28xx_extension_devlist_lock);
1220 if (!list_empty(&em28xx_extension_devlist)) {
1221 list_for_each_entry(ops, &em28xx_extension_devlist, next) {
1222 if (ops->fini)
1223 ops->fini(dev);
1224 }
1225 }
1226 mutex_unlock(&em28xx_extension_devlist_lock);
1227 }
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