2 * Universal Interface for Intel High Definition Audio Codec
4 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the Free
8 * Software Foundation; either version 2 of the License, or (at your option)
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc., 59
18 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 #ifndef __SOUND_HDA_CODEC_H
22 #define __SOUND_HDA_CODEC_H
24 #include <sound/info.h>
25 #include <sound/control.h>
26 #include <sound/pcm.h>
27 #include <sound/hwdep.h>
29 #if defined(CONFIG_PM) || defined(CONFIG_SND_HDA_POWER_SAVE)
30 #define SND_HDA_NEEDS_RESUME /* resume control code is required */
36 #define AC_NODE_ROOT 0x00
39 * function group types
42 AC_GRP_AUDIO_FUNCTION
= 0x01,
43 AC_GRP_MODEM_FUNCTION
= 0x02,
50 AC_WID_AUD_OUT
, /* Audio Out */
51 AC_WID_AUD_IN
, /* Audio In */
52 AC_WID_AUD_MIX
, /* Audio Mixer */
53 AC_WID_AUD_SEL
, /* Audio Selector */
54 AC_WID_PIN
, /* Pin Complex */
55 AC_WID_POWER
, /* Power */
56 AC_WID_VOL_KNB
, /* Volume Knob */
57 AC_WID_BEEP
, /* Beep Generator */
58 AC_WID_VENDOR
= 0x0f /* Vendor specific */
64 #define AC_VERB_GET_STREAM_FORMAT 0x0a00
65 #define AC_VERB_GET_AMP_GAIN_MUTE 0x0b00
66 #define AC_VERB_GET_PROC_COEF 0x0c00
67 #define AC_VERB_GET_COEF_INDEX 0x0d00
68 #define AC_VERB_PARAMETERS 0x0f00
69 #define AC_VERB_GET_CONNECT_SEL 0x0f01
70 #define AC_VERB_GET_CONNECT_LIST 0x0f02
71 #define AC_VERB_GET_PROC_STATE 0x0f03
72 #define AC_VERB_GET_SDI_SELECT 0x0f04
73 #define AC_VERB_GET_POWER_STATE 0x0f05
74 #define AC_VERB_GET_CONV 0x0f06
75 #define AC_VERB_GET_PIN_WIDGET_CONTROL 0x0f07
76 #define AC_VERB_GET_UNSOLICITED_RESPONSE 0x0f08
77 #define AC_VERB_GET_PIN_SENSE 0x0f09
78 #define AC_VERB_GET_BEEP_CONTROL 0x0f0a
79 #define AC_VERB_GET_EAPD_BTLENABLE 0x0f0c
80 #define AC_VERB_GET_DIGI_CONVERT_1 0x0f0d
81 #define AC_VERB_GET_DIGI_CONVERT_2 0x0f0e /* unused */
82 #define AC_VERB_GET_VOLUME_KNOB_CONTROL 0x0f0f
84 #define AC_VERB_GET_GPIO_DATA 0x0f15
85 #define AC_VERB_GET_GPIO_MASK 0x0f16
86 #define AC_VERB_GET_GPIO_DIRECTION 0x0f17
87 #define AC_VERB_GET_GPIO_WAKE_MASK 0x0f18
88 #define AC_VERB_GET_GPIO_UNSOLICITED_RSP_MASK 0x0f19
89 #define AC_VERB_GET_GPIO_STICKY_MASK 0x0f1a
90 #define AC_VERB_GET_CONFIG_DEFAULT 0x0f1c
92 #define AC_VERB_GET_SUBSYSTEM_ID 0x0f20
93 #define AC_VERB_GET_CVT_CHAN_COUNT 0x0f2d
94 #define AC_VERB_GET_HDMI_DIP_SIZE 0x0f2e
95 #define AC_VERB_GET_HDMI_ELDD 0x0f2f
96 #define AC_VERB_GET_HDMI_DIP_INDEX 0x0f30
97 #define AC_VERB_GET_HDMI_DIP_DATA 0x0f31
98 #define AC_VERB_GET_HDMI_DIP_XMIT 0x0f32
99 #define AC_VERB_GET_HDMI_CP_CTRL 0x0f33
100 #define AC_VERB_GET_HDMI_CHAN_SLOT 0x0f34
105 #define AC_VERB_SET_STREAM_FORMAT 0x200
106 #define AC_VERB_SET_AMP_GAIN_MUTE 0x300
107 #define AC_VERB_SET_PROC_COEF 0x400
108 #define AC_VERB_SET_COEF_INDEX 0x500
109 #define AC_VERB_SET_CONNECT_SEL 0x701
110 #define AC_VERB_SET_PROC_STATE 0x703
111 #define AC_VERB_SET_SDI_SELECT 0x704
112 #define AC_VERB_SET_POWER_STATE 0x705
113 #define AC_VERB_SET_CHANNEL_STREAMID 0x706
114 #define AC_VERB_SET_PIN_WIDGET_CONTROL 0x707
115 #define AC_VERB_SET_UNSOLICITED_ENABLE 0x708
116 #define AC_VERB_SET_PIN_SENSE 0x709
117 #define AC_VERB_SET_BEEP_CONTROL 0x70a
118 #define AC_VERB_SET_EAPD_BTLENABLE 0x70c
119 #define AC_VERB_SET_DIGI_CONVERT_1 0x70d
120 #define AC_VERB_SET_DIGI_CONVERT_2 0x70e
121 #define AC_VERB_SET_VOLUME_KNOB_CONTROL 0x70f
122 #define AC_VERB_SET_GPIO_DATA 0x715
123 #define AC_VERB_SET_GPIO_MASK 0x716
124 #define AC_VERB_SET_GPIO_DIRECTION 0x717
125 #define AC_VERB_SET_GPIO_WAKE_MASK 0x718
126 #define AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK 0x719
127 #define AC_VERB_SET_GPIO_STICKY_MASK 0x71a
128 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_0 0x71c
129 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_1 0x71d
130 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_2 0x71e
131 #define AC_VERB_SET_CONFIG_DEFAULT_BYTES_3 0x71f
132 #define AC_VERB_SET_EAPD 0x788
133 #define AC_VERB_SET_CODEC_RESET 0x7ff
134 #define AC_VERB_SET_CVT_CHAN_COUNT 0x72d
135 #define AC_VERB_SET_HDMI_DIP_INDEX 0x730
136 #define AC_VERB_SET_HDMI_DIP_DATA 0x731
137 #define AC_VERB_SET_HDMI_DIP_XMIT 0x732
138 #define AC_VERB_SET_HDMI_CP_CTRL 0x733
139 #define AC_VERB_SET_HDMI_CHAN_SLOT 0x734
144 #define AC_PAR_VENDOR_ID 0x00
145 #define AC_PAR_SUBSYSTEM_ID 0x01
146 #define AC_PAR_REV_ID 0x02
147 #define AC_PAR_NODE_COUNT 0x04
148 #define AC_PAR_FUNCTION_TYPE 0x05
149 #define AC_PAR_AUDIO_FG_CAP 0x08
150 #define AC_PAR_AUDIO_WIDGET_CAP 0x09
151 #define AC_PAR_PCM 0x0a
152 #define AC_PAR_STREAM 0x0b
153 #define AC_PAR_PIN_CAP 0x0c
154 #define AC_PAR_AMP_IN_CAP 0x0d
155 #define AC_PAR_CONNLIST_LEN 0x0e
156 #define AC_PAR_POWER_STATE 0x0f
157 #define AC_PAR_PROC_CAP 0x10
158 #define AC_PAR_GPIO_CAP 0x11
159 #define AC_PAR_AMP_OUT_CAP 0x12
160 #define AC_PAR_VOL_KNB_CAP 0x13
161 #define AC_PAR_HDMI_LPCM_CAP 0x20
164 * AC_VERB_PARAMETERS results (32bit)
167 /* Function Group Type */
168 #define AC_FGT_TYPE (0xff<<0)
169 #define AC_FGT_TYPE_SHIFT 0
170 #define AC_FGT_UNSOL_CAP (1<<8)
172 /* Audio Function Group Capabilities */
173 #define AC_AFG_OUT_DELAY (0xf<<0)
174 #define AC_AFG_IN_DELAY (0xf<<8)
175 #define AC_AFG_BEEP_GEN (1<<16)
177 /* Audio Widget Capabilities */
178 #define AC_WCAP_STEREO (1<<0) /* stereo I/O */
179 #define AC_WCAP_IN_AMP (1<<1) /* AMP-in present */
180 #define AC_WCAP_OUT_AMP (1<<2) /* AMP-out present */
181 #define AC_WCAP_AMP_OVRD (1<<3) /* AMP-parameter override */
182 #define AC_WCAP_FORMAT_OVRD (1<<4) /* format override */
183 #define AC_WCAP_STRIPE (1<<5) /* stripe */
184 #define AC_WCAP_PROC_WID (1<<6) /* Proc Widget */
185 #define AC_WCAP_UNSOL_CAP (1<<7) /* Unsol capable */
186 #define AC_WCAP_CONN_LIST (1<<8) /* connection list */
187 #define AC_WCAP_DIGITAL (1<<9) /* digital I/O */
188 #define AC_WCAP_POWER (1<<10) /* power control */
189 #define AC_WCAP_LR_SWAP (1<<11) /* L/R swap */
190 #define AC_WCAP_CP_CAPS (1<<12) /* content protection */
191 #define AC_WCAP_CHAN_CNT_EXT (7<<13) /* channel count ext */
192 #define AC_WCAP_DELAY (0xf<<16)
193 #define AC_WCAP_DELAY_SHIFT 16
194 #define AC_WCAP_TYPE (0xf<<20)
195 #define AC_WCAP_TYPE_SHIFT 20
197 /* supported PCM rates and bits */
198 #define AC_SUPPCM_RATES (0xfff << 0)
199 #define AC_SUPPCM_BITS_8 (1<<16)
200 #define AC_SUPPCM_BITS_16 (1<<17)
201 #define AC_SUPPCM_BITS_20 (1<<18)
202 #define AC_SUPPCM_BITS_24 (1<<19)
203 #define AC_SUPPCM_BITS_32 (1<<20)
205 /* supported PCM stream format */
206 #define AC_SUPFMT_PCM (1<<0)
207 #define AC_SUPFMT_FLOAT32 (1<<1)
208 #define AC_SUPFMT_AC3 (1<<2)
211 #define AC_GPIO_IO_COUNT (0xff<<0)
212 #define AC_GPIO_O_COUNT (0xff<<8)
213 #define AC_GPIO_O_COUNT_SHIFT 8
214 #define AC_GPIO_I_COUNT (0xff<<16)
215 #define AC_GPIO_I_COUNT_SHIFT 16
216 #define AC_GPIO_UNSOLICITED (1<<30)
217 #define AC_GPIO_WAKE (1<<31)
219 /* Converter stream, channel */
220 #define AC_CONV_CHANNEL (0xf<<0)
221 #define AC_CONV_STREAM (0xf<<4)
222 #define AC_CONV_STREAM_SHIFT 4
224 /* Input converter SDI select */
225 #define AC_SDI_SELECT (0xf<<0)
227 /* Unsolicited response control */
228 #define AC_UNSOL_TAG (0x3f<<0)
229 #define AC_UNSOL_ENABLED (1<<7)
230 #define AC_USRSP_EN AC_UNSOL_ENABLED
232 /* Unsolicited responses */
233 #define AC_UNSOL_RES_TAG (0x3f<<26)
234 #define AC_UNSOL_RES_TAG_SHIFT 26
235 #define AC_UNSOL_RES_SUBTAG (0x1f<<21)
236 #define AC_UNSOL_RES_SUBTAG_SHIFT 21
237 #define AC_UNSOL_RES_ELDV (1<<1) /* ELD Data valid (for HDMI) */
238 #define AC_UNSOL_RES_PD (1<<0) /* pinsense detect */
239 #define AC_UNSOL_RES_CP_STATE (1<<1) /* content protection */
240 #define AC_UNSOL_RES_CP_READY (1<<0) /* content protection */
242 /* Pin widget capabilies */
243 #define AC_PINCAP_IMP_SENSE (1<<0) /* impedance sense capable */
244 #define AC_PINCAP_TRIG_REQ (1<<1) /* trigger required */
245 #define AC_PINCAP_PRES_DETECT (1<<2) /* presence detect capable */
246 #define AC_PINCAP_HP_DRV (1<<3) /* headphone drive capable */
247 #define AC_PINCAP_OUT (1<<4) /* output capable */
248 #define AC_PINCAP_IN (1<<5) /* input capable */
249 #define AC_PINCAP_BALANCE (1<<6) /* balanced I/O capable */
250 /* Note: This LR_SWAP pincap is defined in the Realtek ALC883 specification,
251 * but is marked reserved in the Intel HDA specification.
253 #define AC_PINCAP_LR_SWAP (1<<7) /* L/R swap */
254 /* Note: The same bit as LR_SWAP is newly defined as HDMI capability
255 * in HD-audio specification
257 #define AC_PINCAP_HDMI (1<<7) /* HDMI pin */
258 #define AC_PINCAP_DP (1<<24) /* DisplayPort pin, can
259 * coexist with AC_PINCAP_HDMI
261 #define AC_PINCAP_VREF (0x37<<8)
262 #define AC_PINCAP_VREF_SHIFT 8
263 #define AC_PINCAP_EAPD (1<<16) /* EAPD capable */
264 #define AC_PINCAP_HBR (1<<27) /* High Bit Rate */
265 /* Vref status (used in pin cap) */
266 #define AC_PINCAP_VREF_HIZ (1<<0) /* Hi-Z */
267 #define AC_PINCAP_VREF_50 (1<<1) /* 50% */
268 #define AC_PINCAP_VREF_GRD (1<<2) /* ground */
269 #define AC_PINCAP_VREF_80 (1<<4) /* 80% */
270 #define AC_PINCAP_VREF_100 (1<<5) /* 100% */
272 /* Amplifier capabilities */
273 #define AC_AMPCAP_OFFSET (0x7f<<0) /* 0dB offset */
274 #define AC_AMPCAP_OFFSET_SHIFT 0
275 #define AC_AMPCAP_NUM_STEPS (0x7f<<8) /* number of steps */
276 #define AC_AMPCAP_NUM_STEPS_SHIFT 8
277 #define AC_AMPCAP_STEP_SIZE (0x7f<<16) /* step size 0-32dB
280 #define AC_AMPCAP_STEP_SIZE_SHIFT 16
281 #define AC_AMPCAP_MUTE (1<<31) /* mute capable */
282 #define AC_AMPCAP_MUTE_SHIFT 31
284 /* Connection list */
285 #define AC_CLIST_LENGTH (0x7f<<0)
286 #define AC_CLIST_LONG (1<<7)
288 /* Supported power status */
289 #define AC_PWRST_D0SUP (1<<0)
290 #define AC_PWRST_D1SUP (1<<1)
291 #define AC_PWRST_D2SUP (1<<2)
292 #define AC_PWRST_D3SUP (1<<3)
293 #define AC_PWRST_D3COLDSUP (1<<4)
294 #define AC_PWRST_S3D3COLDSUP (1<<29)
295 #define AC_PWRST_CLKSTOP (1<<30)
296 #define AC_PWRST_EPSS (1U<<31)
298 /* Power state values */
299 #define AC_PWRST_SETTING (0xf<<0)
300 #define AC_PWRST_ACTUAL (0xf<<4)
301 #define AC_PWRST_ACTUAL_SHIFT 4
302 #define AC_PWRST_D0 0x00
303 #define AC_PWRST_D1 0x01
304 #define AC_PWRST_D2 0x02
305 #define AC_PWRST_D3 0x03
307 /* Processing capabilies */
308 #define AC_PCAP_BENIGN (1<<0)
309 #define AC_PCAP_NUM_COEF (0xff<<8)
310 #define AC_PCAP_NUM_COEF_SHIFT 8
312 /* Volume knobs capabilities */
313 #define AC_KNBCAP_NUM_STEPS (0x7f<<0)
314 #define AC_KNBCAP_DELTA (1<<7)
316 /* HDMI LPCM capabilities */
317 #define AC_LPCMCAP_48K_CP_CHNS (0x0f<<0) /* max channels w/ CP-on */
318 #define AC_LPCMCAP_48K_NO_CHNS (0x0f<<4) /* max channels w/o CP-on */
319 #define AC_LPCMCAP_48K_20BIT (1<<8) /* 20b bitrate supported */
320 #define AC_LPCMCAP_48K_24BIT (1<<9) /* 24b bitrate supported */
321 #define AC_LPCMCAP_96K_CP_CHNS (0x0f<<10) /* max channels w/ CP-on */
322 #define AC_LPCMCAP_96K_NO_CHNS (0x0f<<14) /* max channels w/o CP-on */
323 #define AC_LPCMCAP_96K_20BIT (1<<18) /* 20b bitrate supported */
324 #define AC_LPCMCAP_96K_24BIT (1<<19) /* 24b bitrate supported */
325 #define AC_LPCMCAP_192K_CP_CHNS (0x0f<<20) /* max channels w/ CP-on */
326 #define AC_LPCMCAP_192K_NO_CHNS (0x0f<<24) /* max channels w/o CP-on */
327 #define AC_LPCMCAP_192K_20BIT (1<<28) /* 20b bitrate supported */
328 #define AC_LPCMCAP_192K_24BIT (1<<29) /* 24b bitrate supported */
329 #define AC_LPCMCAP_44K (1<<30) /* 44.1kHz support */
330 #define AC_LPCMCAP_44K_MS (1<<31) /* 44.1kHz-multiplies support */
337 #define AC_AMP_MUTE (1<<7)
338 #define AC_AMP_GAIN (0x7f)
339 #define AC_AMP_GET_INDEX (0xf<<0)
341 #define AC_AMP_GET_LEFT (1<<13)
342 #define AC_AMP_GET_RIGHT (0<<13)
343 #define AC_AMP_GET_OUTPUT (1<<15)
344 #define AC_AMP_GET_INPUT (0<<15)
346 #define AC_AMP_SET_INDEX (0xf<<8)
347 #define AC_AMP_SET_INDEX_SHIFT 8
348 #define AC_AMP_SET_RIGHT (1<<12)
349 #define AC_AMP_SET_LEFT (1<<13)
350 #define AC_AMP_SET_INPUT (1<<14)
351 #define AC_AMP_SET_OUTPUT (1<<15)
354 #define AC_DIG1_ENABLE (1<<0)
355 #define AC_DIG1_V (1<<1)
356 #define AC_DIG1_VCFG (1<<2)
357 #define AC_DIG1_EMPHASIS (1<<3)
358 #define AC_DIG1_COPYRIGHT (1<<4)
359 #define AC_DIG1_NONAUDIO (1<<5)
360 #define AC_DIG1_PROFESSIONAL (1<<6)
361 #define AC_DIG1_LEVEL (1<<7)
364 #define AC_DIG2_CC (0x7f<<0)
366 /* Pin widget control - 8bit */
367 #define AC_PINCTL_VREFEN (0x7<<0)
368 #define AC_PINCTL_VREF_HIZ 0 /* Hi-Z */
369 #define AC_PINCTL_VREF_50 1 /* 50% */
370 #define AC_PINCTL_VREF_GRD 2 /* ground */
371 #define AC_PINCTL_VREF_80 4 /* 80% */
372 #define AC_PINCTL_VREF_100 5 /* 100% */
373 #define AC_PINCTL_IN_EN (1<<5)
374 #define AC_PINCTL_OUT_EN (1<<6)
375 #define AC_PINCTL_HP_EN (1<<7)
377 /* Pin sense - 32bit */
378 #define AC_PINSENSE_IMPEDANCE_MASK (0x7fffffff)
379 #define AC_PINSENSE_PRESENCE (1<<31)
380 #define AC_PINSENSE_ELDV (1<<30) /* ELD valid (HDMI) */
382 /* EAPD/BTL enable - 32bit */
383 #define AC_EAPDBTL_BALANCED (1<<0)
384 #define AC_EAPDBTL_EAPD (1<<1)
385 #define AC_EAPDBTL_LR_SWAP (1<<2)
388 #define AC_ELDD_ELD_VALID (1<<31)
389 #define AC_ELDD_ELD_DATA 0xff
392 #define AC_DIPSIZE_ELD_BUF (1<<3) /* ELD buf size of packet size */
393 #define AC_DIPSIZE_PACK_IDX (0x07<<0) /* packet index */
396 #define AC_DIPIDX_PACK_IDX (0x07<<5) /* packet idnex */
397 #define AC_DIPIDX_BYTE_IDX (0x1f<<0) /* byte index */
399 /* HDMI DIP xmit (transmit) control */
400 #define AC_DIPXMIT_MASK (0x3<<6)
401 #define AC_DIPXMIT_DISABLE (0x0<<6) /* disable xmit */
402 #define AC_DIPXMIT_ONCE (0x2<<6) /* xmit once then disable */
403 #define AC_DIPXMIT_BEST (0x3<<6) /* best effort */
405 /* HDMI content protection (CP) control */
406 #define AC_CPCTRL_CES (1<<9) /* current encryption state */
407 #define AC_CPCTRL_READY (1<<8) /* ready bit */
408 #define AC_CPCTRL_SUBTAG (0x1f<<3) /* subtag for unsol-resp */
409 #define AC_CPCTRL_STATE (3<<0) /* current CP request state */
411 /* Converter channel <-> HDMI slot mapping */
412 #define AC_CVTMAP_HDMI_SLOT (0xf<<0) /* HDMI slot number */
413 #define AC_CVTMAP_CHAN (0xf<<4) /* converter channel number */
415 /* configuration default - 32bit */
416 #define AC_DEFCFG_SEQUENCE (0xf<<0)
417 #define AC_DEFCFG_DEF_ASSOC (0xf<<4)
418 #define AC_DEFCFG_ASSOC_SHIFT 4
419 #define AC_DEFCFG_MISC (0xf<<8)
420 #define AC_DEFCFG_MISC_SHIFT 8
421 #define AC_DEFCFG_MISC_NO_PRESENCE (1<<0)
422 #define AC_DEFCFG_COLOR (0xf<<12)
423 #define AC_DEFCFG_COLOR_SHIFT 12
424 #define AC_DEFCFG_CONN_TYPE (0xf<<16)
425 #define AC_DEFCFG_CONN_TYPE_SHIFT 16
426 #define AC_DEFCFG_DEVICE (0xf<<20)
427 #define AC_DEFCFG_DEVICE_SHIFT 20
428 #define AC_DEFCFG_LOCATION (0x3f<<24)
429 #define AC_DEFCFG_LOCATION_SHIFT 24
430 #define AC_DEFCFG_PORT_CONN (0x3<<30)
431 #define AC_DEFCFG_PORT_CONN_SHIFT 30
433 /* device device types (0x0-0xf) */
440 AC_JACK_DIG_OTHER_OUT
,
441 AC_JACK_MODEM_LINE_SIDE
,
442 AC_JACK_MODEM_HAND_SIDE
,
448 AC_JACK_DIG_OTHER_IN
,
452 /* jack connection types (0x0-0xf) */
454 AC_JACK_CONN_UNKNOWN
,
459 AC_JACK_CONN_OPTICAL
,
460 AC_JACK_CONN_OTHER_DIGITAL
,
461 AC_JACK_CONN_OTHER_ANALOG
,
466 AC_JACK_CONN_OTHER
= 0xf,
469 /* jack colors (0x0-0xf) */
471 AC_JACK_COLOR_UNKNOWN
,
477 AC_JACK_COLOR_ORANGE
,
478 AC_JACK_COLOR_YELLOW
,
479 AC_JACK_COLOR_PURPLE
,
481 AC_JACK_COLOR_WHITE
= 0xe,
485 /* Jack location (0x0-0x3f) */
498 AC_JACK_LOC_EXTERNAL
= 0x00,
499 AC_JACK_LOC_INTERNAL
= 0x10,
500 AC_JACK_LOC_SEPARATE
= 0x20,
501 AC_JACK_LOC_OTHER
= 0x30,
504 /* external on primary chasis */
505 AC_JACK_LOC_REAR_PANEL
= 0x07,
506 AC_JACK_LOC_DRIVE_BAY
,
508 AC_JACK_LOC_RISER
= 0x17,
512 AC_JACK_LOC_MOBILE_IN
= 0x37,
513 AC_JACK_LOC_MOBILE_OUT
,
516 /* Port connectivity (0-3) */
518 AC_JACK_PORT_COMPLEX
,
524 /* max. connections to a widget */
525 #define HDA_MAX_CONNECTIONS 32
527 /* max. codec address */
528 #define HDA_MAX_CODEC_ADDRESS 0x0f
530 /* max number of PCM devics per card */
531 #define HDA_MAX_PCMS 10
538 unsigned int alloced
;
539 unsigned int elem_size
;
540 unsigned int alloc_align
;
544 void *snd_array_new(struct snd_array
*array
);
545 void snd_array_free(struct snd_array
*array
);
546 static inline void snd_array_init(struct snd_array
*array
, unsigned int size
,
549 array
->elem_size
= size
;
550 array
->alloc_align
= align
;
553 static inline void *snd_array_elem(struct snd_array
*array
, unsigned int idx
)
555 return array
->list
+ idx
* array
->elem_size
;
558 static inline unsigned int snd_array_index(struct snd_array
*array
, void *ptr
)
560 return (unsigned long)(ptr
- array
->list
) / array
->elem_size
;
571 struct hda_pcm_stream
;
572 struct hda_bus_unsolicited
;
575 typedef u16 hda_nid_t
;
579 /* send a single command */
580 int (*command
)(struct hda_bus
*bus
, unsigned int cmd
);
581 /* get a response from the last command */
582 unsigned int (*get_response
)(struct hda_bus
*bus
, unsigned int addr
);
583 /* free the private data */
584 void (*private_free
)(struct hda_bus
*);
585 /* attach a PCM stream */
586 int (*attach_pcm
)(struct hda_bus
*bus
, struct hda_codec
*codec
,
587 struct hda_pcm
*pcm
);
588 /* reset bus for retry verb */
589 void (*bus_reset
)(struct hda_bus
*bus
);
590 #ifdef CONFIG_SND_HDA_POWER_SAVE
591 /* notify power-up/down from codec to controller */
592 void (*pm_notify
)(struct hda_bus
*bus
);
596 /* template to pass to the bus constructor */
597 struct hda_bus_template
{
600 const char *modelname
;
602 struct hda_bus_ops ops
;
608 * each controller needs to creata a hda_bus to assign the accessor.
609 * A hda_bus contains several codecs in the list codec_list.
612 struct snd_card
*card
;
614 /* copied from template */
617 const char *modelname
;
619 struct hda_bus_ops ops
;
621 /* codec linked list */
622 struct list_head codec_list
;
623 /* link caddr -> codec */
624 struct hda_codec
*caddr_tbl
[HDA_MAX_CODEC_ADDRESS
+ 1];
626 struct mutex cmd_mutex
;
628 /* unsolicited event queue */
629 struct hda_bus_unsolicited
*unsol
;
631 struct workqueue_struct
*workq
; /* common workqueue for codecs */
634 DECLARE_BITMAP(pcm_dev_bits
, SNDRV_PCM_DEVICES
);
637 unsigned int needs_damn_long_delay
:1;
638 unsigned int allow_bus_reset
:1; /* allow bus reset at fatal error */
639 unsigned int sync_write
:1; /* sync after verb write */
640 /* status for codec/controller */
641 unsigned int shutdown
:1; /* being unloaded */
642 unsigned int rirb_error
:1; /* error in codec communication */
643 unsigned int response_reset
:1; /* controller was reset */
644 unsigned int in_reset
:1; /* during reset operation */
645 unsigned int power_keep_link_on
:1; /* don't power off HDA link */
651 * Known codecs have the patch to build and set up the controls/PCMs
652 * better than the generic parser.
654 struct hda_codec_preset
{
658 unsigned int subs_mask
;
662 int (*patch
)(struct hda_codec
*codec
);
665 struct hda_codec_preset_list
{
666 const struct hda_codec_preset
*preset
;
667 struct module
*owner
;
668 struct list_head list
;
672 int snd_hda_add_codec_preset(struct hda_codec_preset_list
*preset
);
673 int snd_hda_delete_codec_preset(struct hda_codec_preset_list
*preset
);
675 /* ops set by the preset patch */
676 struct hda_codec_ops
{
677 int (*build_controls
)(struct hda_codec
*codec
);
678 int (*build_pcms
)(struct hda_codec
*codec
);
679 int (*init
)(struct hda_codec
*codec
);
680 void (*free
)(struct hda_codec
*codec
);
681 void (*unsol_event
)(struct hda_codec
*codec
, unsigned int res
);
682 #ifdef SND_HDA_NEEDS_RESUME
683 int (*suspend
)(struct hda_codec
*codec
, pm_message_t state
);
684 int (*resume
)(struct hda_codec
*codec
);
686 #ifdef CONFIG_SND_HDA_POWER_SAVE
687 int (*check_power_status
)(struct hda_codec
*codec
, hda_nid_t nid
);
689 void (*reboot_notify
)(struct hda_codec
*codec
);
692 /* record for amp information cache */
693 struct hda_cache_head
{
694 u32 key
; /* hash key */
695 u16 val
; /* assigned value */
696 u16 next
; /* next link; -1 = terminal */
699 struct hda_amp_info
{
700 struct hda_cache_head head
;
701 u32 amp_caps
; /* amp capabilities */
702 u16 vol
[2]; /* current volume & mute */
705 struct hda_cache_rec
{
706 u16 hash
[64]; /* hash table for index */
707 struct snd_array buf
; /* record entries */
712 int (*open
)(struct hda_pcm_stream
*info
, struct hda_codec
*codec
,
713 struct snd_pcm_substream
*substream
);
714 int (*close
)(struct hda_pcm_stream
*info
, struct hda_codec
*codec
,
715 struct snd_pcm_substream
*substream
);
716 int (*prepare
)(struct hda_pcm_stream
*info
, struct hda_codec
*codec
,
717 unsigned int stream_tag
, unsigned int format
,
718 struct snd_pcm_substream
*substream
);
719 int (*cleanup
)(struct hda_pcm_stream
*info
, struct hda_codec
*codec
,
720 struct snd_pcm_substream
*substream
);
723 /* PCM information for each substream */
724 struct hda_pcm_stream
{
725 unsigned int substreams
; /* number of substreams, 0 = not exist*/
726 unsigned int channels_min
; /* min. number of channels */
727 unsigned int channels_max
; /* max. number of channels */
728 hda_nid_t nid
; /* default NID to query rates/formats/bps, or set up */
729 u32 rates
; /* supported rates */
730 u64 formats
; /* supported formats (SNDRV_PCM_FMTBIT_) */
731 unsigned int maxbps
; /* supported max. bit per sample */
732 struct hda_pcm_ops ops
;
744 /* for PCM creation */
747 struct hda_pcm_stream stream
[2];
748 unsigned int pcm_type
; /* HDA_PCM_TYPE_XXX */
749 int device
; /* device number to assign */
750 struct snd_pcm
*pcm
; /* assigned PCM instance */
753 /* codec information */
756 unsigned int addr
; /* codec addr*/
757 struct list_head list
; /* list point */
759 hda_nid_t afg
; /* AFG node id */
760 hda_nid_t mfg
; /* MFG node id */
768 /* detected preset */
769 const struct hda_codec_preset
*preset
;
770 struct module
*owner
;
771 const char *vendor_name
; /* codec vendor name */
772 const char *chip_name
; /* codec chip name */
773 const char *modelname
; /* model name for preset */
776 struct hda_codec_ops patch_ops
;
778 /* PCM to create, set by patch_ops.build_pcms callback */
779 unsigned int num_pcms
;
780 struct hda_pcm
*pcm_info
;
782 /* codec specific info */
786 struct hda_beep
*beep
;
787 unsigned int beep_mode
;
789 /* widget capabilities cache */
790 unsigned int num_nodes
;
794 struct snd_array mixers
; /* list of assigned mixer elements */
795 struct snd_array nids
; /* list of mapped mixer elements */
797 struct hda_cache_rec amp_cache
; /* cache for amp access */
798 struct hda_cache_rec cmd_cache
; /* cache for other commands */
800 struct mutex spdif_mutex
;
801 struct mutex control_mutex
;
802 unsigned int spdif_status
; /* IEC958 status bits */
803 unsigned short spdif_ctls
; /* SPDIF control bits */
804 unsigned int spdif_in_enable
; /* SPDIF input enable? */
805 hda_nid_t
*slave_dig_outs
; /* optional digital out slave widgets */
806 struct snd_array init_pins
; /* initial (BIOS) pin configurations */
807 struct snd_array driver_pins
; /* pin configs set by codec parser */
809 #ifdef CONFIG_SND_HDA_HWDEP
810 struct snd_hwdep
*hwdep
; /* assigned hwdep device */
811 struct snd_array init_verbs
; /* additional init verbs */
812 struct snd_array hints
; /* additional hints */
813 struct snd_array user_pins
; /* default pin configs to override */
817 unsigned int spdif_status_reset
:1; /* needs to toggle SPDIF for each
819 * (e.g. Realtek codecs)
821 unsigned int pin_amp_workaround
:1; /* pin out-amp takes index
822 * (e.g. Conexant codecs)
824 unsigned int no_trigger_sense
:1; /* don't trigger at pin-sensing */
825 #ifdef CONFIG_SND_HDA_POWER_SAVE
826 unsigned int power_on
:1; /* current (global) power-state */
827 unsigned int power_transition
:1; /* power-state in transition */
828 int power_count
; /* current (global) power refcount */
829 struct delayed_work power_work
; /* delayed task for powerdown */
830 unsigned long power_on_acct
;
831 unsigned long power_off_acct
;
832 unsigned long power_jiffies
;
835 /* codec-specific additional proc output */
836 void (*proc_widget_hook
)(struct snd_info_buffer
*buffer
,
837 struct hda_codec
*codec
, hda_nid_t nid
);
842 HDA_INPUT
, HDA_OUTPUT
849 int snd_hda_bus_new(struct snd_card
*card
, const struct hda_bus_template
*temp
,
850 struct hda_bus
**busp
);
851 int snd_hda_codec_new(struct hda_bus
*bus
, unsigned int codec_addr
,
852 struct hda_codec
**codecp
);
853 int snd_hda_codec_configure(struct hda_codec
*codec
);
856 * low level functions
858 unsigned int snd_hda_codec_read(struct hda_codec
*codec
, hda_nid_t nid
,
860 unsigned int verb
, unsigned int parm
);
861 int snd_hda_codec_write(struct hda_codec
*codec
, hda_nid_t nid
, int direct
,
862 unsigned int verb
, unsigned int parm
);
863 #define snd_hda_param_read(codec, nid, param) \
864 snd_hda_codec_read(codec, nid, 0, AC_VERB_PARAMETERS, param)
865 int snd_hda_get_sub_nodes(struct hda_codec
*codec
, hda_nid_t nid
,
866 hda_nid_t
*start_id
);
867 int snd_hda_get_connections(struct hda_codec
*codec
, hda_nid_t nid
,
868 hda_nid_t
*conn_list
, int max_conns
);
876 void snd_hda_sequence_write(struct hda_codec
*codec
,
877 const struct hda_verb
*seq
);
879 /* unsolicited event */
880 int snd_hda_queue_unsol_event(struct hda_bus
*bus
, u32 res
, u32 res_ex
);
883 #ifdef SND_HDA_NEEDS_RESUME
884 int snd_hda_codec_write_cache(struct hda_codec
*codec
, hda_nid_t nid
,
885 int direct
, unsigned int verb
, unsigned int parm
);
886 void snd_hda_sequence_write_cache(struct hda_codec
*codec
,
887 const struct hda_verb
*seq
);
888 int snd_hda_codec_update_cache(struct hda_codec
*codec
, hda_nid_t nid
,
889 int direct
, unsigned int verb
, unsigned int parm
);
890 void snd_hda_codec_resume_cache(struct hda_codec
*codec
);
892 #define snd_hda_codec_write_cache snd_hda_codec_write
893 #define snd_hda_codec_update_cache snd_hda_codec_write
894 #define snd_hda_sequence_write_cache snd_hda_sequence_write
897 /* the struct for codec->pin_configs */
903 unsigned int snd_hda_codec_get_pincfg(struct hda_codec
*codec
, hda_nid_t nid
);
904 int snd_hda_codec_set_pincfg(struct hda_codec
*codec
, hda_nid_t nid
,
906 int snd_hda_add_pincfg(struct hda_codec
*codec
, struct snd_array
*list
,
907 hda_nid_t nid
, unsigned int cfg
); /* for hwdep */
908 void snd_hda_shutup_pins(struct hda_codec
*codec
);
913 int snd_hda_build_controls(struct hda_bus
*bus
);
914 int snd_hda_codec_build_controls(struct hda_codec
*codec
);
919 int snd_hda_build_pcms(struct hda_bus
*bus
);
920 int snd_hda_codec_build_pcms(struct hda_codec
*codec
);
921 void snd_hda_codec_setup_stream(struct hda_codec
*codec
, hda_nid_t nid
,
923 int channel_id
, int format
);
924 void snd_hda_codec_cleanup_stream(struct hda_codec
*codec
, hda_nid_t nid
);
925 unsigned int snd_hda_calc_stream_format(unsigned int rate
,
926 unsigned int channels
,
928 unsigned int maxbps
);
929 int snd_hda_is_supported_format(struct hda_codec
*codec
, hda_nid_t nid
,
930 unsigned int format
);
935 void snd_hda_get_codec_name(struct hda_codec
*codec
, char *name
, int namelen
);
936 void snd_hda_bus_reboot_notify(struct hda_bus
*bus
);
942 int snd_hda_suspend(struct hda_bus
*bus
);
943 int snd_hda_resume(struct hda_bus
*bus
);
947 * get widget information
949 const char *snd_hda_get_jack_connectivity(u32 cfg
);
950 const char *snd_hda_get_jack_type(u32 cfg
);
951 const char *snd_hda_get_jack_location(u32 cfg
);
956 #ifdef CONFIG_SND_HDA_POWER_SAVE
957 void snd_hda_power_up(struct hda_codec
*codec
);
958 void snd_hda_power_down(struct hda_codec
*codec
);
959 #define snd_hda_codec_needs_resume(codec) codec->power_count
960 void snd_hda_update_power_acct(struct hda_codec
*codec
);
962 static inline void snd_hda_power_up(struct hda_codec
*codec
) {}
963 static inline void snd_hda_power_down(struct hda_codec
*codec
) {}
964 #define snd_hda_codec_needs_resume(codec) 1
967 #ifdef CONFIG_SND_HDA_PATCH_LOADER
971 int snd_hda_load_patch(struct hda_bus
*bus
, const char *patch
);
975 * Codec modularization
978 /* Export symbols only for communication with codec drivers;
979 * When built in kernel, all HD-audio drivers are supposed to be statically
980 * linked to the kernel. Thus, the symbols don't have to (or shouldn't) be
981 * exported unless it's built as a module.
984 #define EXPORT_SYMBOL_HDA(sym) EXPORT_SYMBOL_GPL(sym)
986 #define EXPORT_SYMBOL_HDA(sym)
989 #endif /* __SOUND_HDA_CODEC_H */