writeback: split writeback_inodes_wb
[linux-2.6/next.git] / sound / soc / txx9 / txx9aclc-ac97.c
blob0ec20b68e8cbbe6089c7c8b453fdf9d4d5a41507
1 /*
2 * TXx9 ACLC AC97 driver
4 * Copyright (C) 2009 Atsushi Nemoto
6 * Based on RBTX49xx patch from CELF patch archive.
7 * (C) Copyright TOSHIBA CORPORATION 2004-2006
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/init.h>
15 #include <linux/module.h>
16 #include <linux/delay.h>
17 #include <linux/interrupt.h>
18 #include <linux/io.h>
19 #include <linux/gfp.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/soc.h>
23 #include "txx9aclc.h"
25 #define AC97_DIR \
26 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
28 #define AC97_RATES \
29 SNDRV_PCM_RATE_8000_48000
31 #ifdef __BIG_ENDIAN
32 #define AC97_FMTS SNDRV_PCM_FMTBIT_S16_BE
33 #else
34 #define AC97_FMTS SNDRV_PCM_FMTBIT_S16_LE
35 #endif
37 static DECLARE_WAIT_QUEUE_HEAD(ac97_waitq);
39 /* REVISIT: How to find txx9aclc_soc_device from snd_ac97? */
40 static struct txx9aclc_soc_device *txx9aclc_soc_dev;
42 static int txx9aclc_regready(struct txx9aclc_soc_device *dev)
44 struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
46 return __raw_readl(drvdata->base + ACINTSTS) & ACINT_REGACCRDY;
49 /* AC97 controller reads codec register */
50 static unsigned short txx9aclc_ac97_read(struct snd_ac97 *ac97,
51 unsigned short reg)
53 struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
54 struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
55 void __iomem *base = drvdata->base;
56 u32 dat;
58 if (!(__raw_readl(base + ACINTSTS) & ACINT_CODECRDY(ac97->num)))
59 return 0xffff;
60 reg |= ac97->num << 7;
61 dat = (reg << ACREGACC_REG_SHIFT) | ACREGACC_READ;
62 __raw_writel(dat, base + ACREGACC);
63 __raw_writel(ACINT_REGACCRDY, base + ACINTEN);
64 if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(dev), HZ)) {
65 __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
66 dev_err(dev->soc_dev.dev, "ac97 read timeout (reg %#x)\n", reg);
67 dat = 0xffff;
68 goto done;
70 dat = __raw_readl(base + ACREGACC);
71 if (((dat >> ACREGACC_REG_SHIFT) & 0xff) != reg) {
72 dev_err(dev->soc_dev.dev, "reg mismatch %x with %x\n",
73 dat, reg);
74 dat = 0xffff;
75 goto done;
77 dat = (dat >> ACREGACC_DAT_SHIFT) & 0xffff;
78 done:
79 __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
80 return dat;
83 /* AC97 controller writes to codec register */
84 static void txx9aclc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
85 unsigned short val)
87 struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
88 struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
89 void __iomem *base = drvdata->base;
91 __raw_writel(((reg | (ac97->num << 7)) << ACREGACC_REG_SHIFT) |
92 (val << ACREGACC_DAT_SHIFT),
93 base + ACREGACC);
94 __raw_writel(ACINT_REGACCRDY, base + ACINTEN);
95 if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(dev), HZ)) {
96 dev_err(dev->soc_dev.dev,
97 "ac97 write timeout (reg %#x)\n", reg);
99 __raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
102 static void txx9aclc_ac97_cold_reset(struct snd_ac97 *ac97)
104 struct txx9aclc_soc_device *dev = txx9aclc_soc_dev;
105 struct txx9aclc_plat_drvdata *drvdata = txx9aclc_get_plat_drvdata(dev);
106 void __iomem *base = drvdata->base;
107 u32 ready = ACINT_CODECRDY(ac97->num) | ACINT_REGACCRDY;
109 __raw_writel(ACCTL_ENLINK, base + ACCTLDIS);
110 mmiowb();
111 udelay(1);
112 __raw_writel(ACCTL_ENLINK, base + ACCTLEN);
113 /* wait for primary codec ready status */
114 __raw_writel(ready, base + ACINTEN);
115 if (!wait_event_timeout(ac97_waitq,
116 (__raw_readl(base + ACINTSTS) & ready) == ready,
117 HZ)) {
118 dev_err(&ac97->dev, "primary codec is not ready "
119 "(status %#x)\n",
120 __raw_readl(base + ACINTSTS));
122 __raw_writel(ACINT_REGACCRDY, base + ACINTSTS);
123 __raw_writel(ready, base + ACINTDIS);
126 /* AC97 controller operations */
127 struct snd_ac97_bus_ops soc_ac97_ops = {
128 .read = txx9aclc_ac97_read,
129 .write = txx9aclc_ac97_write,
130 .reset = txx9aclc_ac97_cold_reset,
132 EXPORT_SYMBOL_GPL(soc_ac97_ops);
134 static irqreturn_t txx9aclc_ac97_irq(int irq, void *dev_id)
136 struct txx9aclc_plat_drvdata *drvdata = dev_id;
137 void __iomem *base = drvdata->base;
139 __raw_writel(__raw_readl(base + ACINTMSTS), base + ACINTDIS);
140 wake_up(&ac97_waitq);
141 return IRQ_HANDLED;
144 static int txx9aclc_ac97_probe(struct platform_device *pdev,
145 struct snd_soc_dai *dai)
147 struct snd_soc_device *socdev = platform_get_drvdata(pdev);
148 struct txx9aclc_soc_device *dev =
149 container_of(socdev, struct txx9aclc_soc_device, soc_dev);
151 dev->aclc_pdev = to_platform_device(dai->dev);
152 txx9aclc_soc_dev = dev;
153 return 0;
156 static void txx9aclc_ac97_remove(struct platform_device *pdev,
157 struct snd_soc_dai *dai)
159 struct platform_device *aclc_pdev = to_platform_device(dai->dev);
160 struct txx9aclc_plat_drvdata *drvdata = platform_get_drvdata(aclc_pdev);
162 /* disable AC-link */
163 __raw_writel(ACCTL_ENLINK, drvdata->base + ACCTLDIS);
164 txx9aclc_soc_dev = NULL;
167 struct snd_soc_dai txx9aclc_ac97_dai = {
168 .name = "txx9aclc_ac97",
169 .ac97_control = 1,
170 .probe = txx9aclc_ac97_probe,
171 .remove = txx9aclc_ac97_remove,
172 .playback = {
173 .rates = AC97_RATES,
174 .formats = AC97_FMTS,
175 .channels_min = 2,
176 .channels_max = 2,
178 .capture = {
179 .rates = AC97_RATES,
180 .formats = AC97_FMTS,
181 .channels_min = 2,
182 .channels_max = 2,
185 EXPORT_SYMBOL_GPL(txx9aclc_ac97_dai);
187 static int __devinit txx9aclc_ac97_dev_probe(struct platform_device *pdev)
189 struct txx9aclc_plat_drvdata *drvdata;
190 struct resource *r;
191 int err;
192 int irq;
194 irq = platform_get_irq(pdev, 0);
195 if (irq < 0)
196 return irq;
197 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
198 if (!r)
199 return -EBUSY;
201 if (!devm_request_mem_region(&pdev->dev, r->start, resource_size(r),
202 dev_name(&pdev->dev)))
203 return -EBUSY;
205 drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
206 if (!drvdata)
207 return -ENOMEM;
208 platform_set_drvdata(pdev, drvdata);
209 drvdata->physbase = r->start;
210 if (sizeof(drvdata->physbase) > sizeof(r->start) &&
211 r->start >= TXX9_DIRECTMAP_BASE &&
212 r->start < TXX9_DIRECTMAP_BASE + 0x400000)
213 drvdata->physbase |= 0xf00000000ull;
214 drvdata->base = devm_ioremap(&pdev->dev, r->start, resource_size(r));
215 if (!drvdata->base)
216 return -EBUSY;
217 err = devm_request_irq(&pdev->dev, irq, txx9aclc_ac97_irq,
218 IRQF_DISABLED, dev_name(&pdev->dev), drvdata);
219 if (err < 0)
220 return err;
222 txx9aclc_ac97_dai.dev = &pdev->dev;
223 return snd_soc_register_dai(&txx9aclc_ac97_dai);
226 static int __devexit txx9aclc_ac97_dev_remove(struct platform_device *pdev)
228 snd_soc_unregister_dai(&txx9aclc_ac97_dai);
229 return 0;
232 static struct platform_driver txx9aclc_ac97_driver = {
233 .probe = txx9aclc_ac97_dev_probe,
234 .remove = __devexit_p(txx9aclc_ac97_dev_remove),
235 .driver = {
236 .name = "txx9aclc-ac97",
237 .owner = THIS_MODULE,
241 static int __init txx9aclc_ac97_init(void)
243 return platform_driver_register(&txx9aclc_ac97_driver);
246 static void __exit txx9aclc_ac97_exit(void)
248 platform_driver_unregister(&txx9aclc_ac97_driver);
251 module_init(txx9aclc_ac97_init);
252 module_exit(txx9aclc_ac97_exit);
254 MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
255 MODULE_DESCRIPTION("TXx9 ACLC AC97 driver");
256 MODULE_LICENSE("GPL");
257 MODULE_ALIAS("platform:txx9aclc-ac97");