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Add linux-next specific files for 20110426
[linux-2.6/next.git] / arch / x86 / kvm / x86.c
bloba831d5d8ca14ec3c1f443fab3df22b5c684dd135
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10 *
11 * Authors:
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
16 *
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
19 *
20 */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
48
49 #define CREATE_TRACE_POINTS
50 #include "trace.h"
51
52 #include <asm/debugreg.h>
53 #include <asm/msr.h>
54 #include <asm/desc.h>
55 #include <asm/mtrr.h>
56 #include <asm/mce.h>
57 #include <asm/i387.h>
58 #include <asm/xcr.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
61
62 #define MAX_IO_MSRS 256
63 #define KVM_MAX_MCE_BANKS 32
64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
65
66 #define emul_to_vcpu(ctxt) \
67 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
68
69 /* EFER defaults:
70 * - enable syscall per default because its emulated by KVM
71 * - enable LME and LMA per default on 64 bit KVM
72 */
73 #ifdef CONFIG_X86_64
74 static
75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
76 #else
77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
78 #endif
79
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
82
83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
85 struct kvm_cpuid_entry2 __user *entries);
86
87 struct kvm_x86_ops *kvm_x86_ops;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
89
90 int ignore_msrs = 0;
91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
92
93 bool kvm_has_tsc_control;
94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
95 u32 kvm_max_guest_tsc_khz;
96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
97
98 #define KVM_NR_SHARED_MSRS 16
99
100 struct kvm_shared_msrs_global {
101 int nr;
102 u32 msrs[KVM_NR_SHARED_MSRS];
103 };
104
105 struct kvm_shared_msrs {
106 struct user_return_notifier urn;
107 bool registered;
108 struct kvm_shared_msr_values {
109 u64 host;
110 u64 curr;
111 } values[KVM_NR_SHARED_MSRS];
112 };
113
114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
116
117 struct kvm_stats_debugfs_item debugfs_entries[] = {
118 { "pf_fixed", VCPU_STAT(pf_fixed) },
119 { "pf_guest", VCPU_STAT(pf_guest) },
120 { "tlb_flush", VCPU_STAT(tlb_flush) },
121 { "invlpg", VCPU_STAT(invlpg) },
122 { "exits", VCPU_STAT(exits) },
123 { "io_exits", VCPU_STAT(io_exits) },
124 { "mmio_exits", VCPU_STAT(mmio_exits) },
125 { "signal_exits", VCPU_STAT(signal_exits) },
126 { "irq_window", VCPU_STAT(irq_window_exits) },
127 { "nmi_window", VCPU_STAT(nmi_window_exits) },
128 { "halt_exits", VCPU_STAT(halt_exits) },
129 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
130 { "hypercalls", VCPU_STAT(hypercalls) },
131 { "request_irq", VCPU_STAT(request_irq_exits) },
132 { "irq_exits", VCPU_STAT(irq_exits) },
133 { "host_state_reload", VCPU_STAT(host_state_reload) },
134 { "efer_reload", VCPU_STAT(efer_reload) },
135 { "fpu_reload", VCPU_STAT(fpu_reload) },
136 { "insn_emulation", VCPU_STAT(insn_emulation) },
137 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
138 { "irq_injections", VCPU_STAT(irq_injections) },
139 { "nmi_injections", VCPU_STAT(nmi_injections) },
140 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
141 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
142 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
143 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
144 { "mmu_flooded", VM_STAT(mmu_flooded) },
145 { "mmu_recycled", VM_STAT(mmu_recycled) },
146 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
147 { "mmu_unsync", VM_STAT(mmu_unsync) },
148 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
149 { "largepages", VM_STAT(lpages) },
150 { NULL }
151 };
152
153 u64 __read_mostly host_xcr0;
154
155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
156
157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
158 {
159 int i;
160 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
161 vcpu->arch.apf.gfns[i] = ~0;
162 }
163
164 static void kvm_on_user_return(struct user_return_notifier *urn)
165 {
166 unsigned slot;
167 struct kvm_shared_msrs *locals
168 = container_of(urn, struct kvm_shared_msrs, urn);
169 struct kvm_shared_msr_values *values;
170
171 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
172 values = &locals->values[slot];
173 if (values->host != values->curr) {
174 wrmsrl(shared_msrs_global.msrs[slot], values->host);
175 values->curr = values->host;
176 }
177 }
178 locals->registered = false;
179 user_return_notifier_unregister(urn);
180 }
181
182 static void shared_msr_update(unsigned slot, u32 msr)
183 {
184 struct kvm_shared_msrs *smsr;
185 u64 value;
186
187 smsr = &__get_cpu_var(shared_msrs);
188 /* only read, and nobody should modify it at this time,
189 * so don't need lock */
190 if (slot >= shared_msrs_global.nr) {
191 printk(KERN_ERR "kvm: invalid MSR slot!");
192 return;
193 }
194 rdmsrl_safe(msr, &value);
195 smsr->values[slot].host = value;
196 smsr->values[slot].curr = value;
197 }
198
199 void kvm_define_shared_msr(unsigned slot, u32 msr)
200 {
201 if (slot >= shared_msrs_global.nr)
202 shared_msrs_global.nr = slot + 1;
203 shared_msrs_global.msrs[slot] = msr;
204 /* we need ensured the shared_msr_global have been updated */
205 smp_wmb();
206 }
207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
208
209 static void kvm_shared_msr_cpu_online(void)
210 {
211 unsigned i;
212
213 for (i = 0; i < shared_msrs_global.nr; ++i)
214 shared_msr_update(i, shared_msrs_global.msrs[i]);
215 }
216
217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
218 {
219 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
220
221 if (((value ^ smsr->values[slot].curr) & mask) == 0)
222 return;
223 smsr->values[slot].curr = value;
224 wrmsrl(shared_msrs_global.msrs[slot], value);
225 if (!smsr->registered) {
226 smsr->urn.on_user_return = kvm_on_user_return;
227 user_return_notifier_register(&smsr->urn);
228 smsr->registered = true;
229 }
230 }
231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
232
233 static void drop_user_return_notifiers(void *ignore)
234 {
235 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
236
237 if (smsr->registered)
238 kvm_on_user_return(&smsr->urn);
239 }
240
241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
242 {
243 if (irqchip_in_kernel(vcpu->kvm))
244 return vcpu->arch.apic_base;
245 else
246 return vcpu->arch.apic_base;
247 }
248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
249
250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
251 {
252 /* TODO: reserve bits check */
253 if (irqchip_in_kernel(vcpu->kvm))
254 kvm_lapic_set_base(vcpu, data);
255 else
256 vcpu->arch.apic_base = data;
257 }
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
259
260 #define EXCPT_BENIGN 0
261 #define EXCPT_CONTRIBUTORY 1
262 #define EXCPT_PF 2
263
264 static int exception_class(int vector)
265 {
266 switch (vector) {
267 case PF_VECTOR:
268 return EXCPT_PF;
269 case DE_VECTOR:
270 case TS_VECTOR:
271 case NP_VECTOR:
272 case SS_VECTOR:
273 case GP_VECTOR:
274 return EXCPT_CONTRIBUTORY;
275 default:
276 break;
277 }
278 return EXCPT_BENIGN;
279 }
280
281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
282 unsigned nr, bool has_error, u32 error_code,
283 bool reinject)
284 {
285 u32 prev_nr;
286 int class1, class2;
287
288 kvm_make_request(KVM_REQ_EVENT, vcpu);
289
290 if (!vcpu->arch.exception.pending) {
291 queue:
292 vcpu->arch.exception.pending = true;
293 vcpu->arch.exception.has_error_code = has_error;
294 vcpu->arch.exception.nr = nr;
295 vcpu->arch.exception.error_code = error_code;
296 vcpu->arch.exception.reinject = reinject;
297 return;
298 }
299
300 /* to check exception */
301 prev_nr = vcpu->arch.exception.nr;
302 if (prev_nr == DF_VECTOR) {
303 /* triple fault -> shutdown */
304 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
305 return;
306 }
307 class1 = exception_class(prev_nr);
308 class2 = exception_class(nr);
309 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
310 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
311 /* generate double fault per SDM Table 5-5 */
312 vcpu->arch.exception.pending = true;
313 vcpu->arch.exception.has_error_code = true;
314 vcpu->arch.exception.nr = DF_VECTOR;
315 vcpu->arch.exception.error_code = 0;
316 } else
317 /* replace previous exception with a new one in a hope
318 that instruction re-execution will regenerate lost
319 exception */
320 goto queue;
321 }
322
323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
324 {
325 kvm_multiple_exception(vcpu, nr, false, 0, false);
326 }
327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
328
329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
330 {
331 kvm_multiple_exception(vcpu, nr, false, 0, true);
332 }
333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
334
335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
336 {
337 if (err)
338 kvm_inject_gp(vcpu, 0);
339 else
340 kvm_x86_ops->skip_emulated_instruction(vcpu);
341 }
342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
343
344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
345 {
346 ++vcpu->stat.pf_guest;
347 vcpu->arch.cr2 = fault->address;
348 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
349 }
350
351 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
352 {
353 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
354 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
355 else
356 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
357 }
358
359 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
360 {
361 kvm_make_request(KVM_REQ_EVENT, vcpu);
362 vcpu->arch.nmi_pending = 1;
363 }
364 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
365
366 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
367 {
368 kvm_multiple_exception(vcpu, nr, true, error_code, false);
369 }
370 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
371
372 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
373 {
374 kvm_multiple_exception(vcpu, nr, true, error_code, true);
375 }
376 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
377
378 /*
379 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
380 * a #GP and return false.
381 */
382 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
383 {
384 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
385 return true;
386 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
387 return false;
388 }
389 EXPORT_SYMBOL_GPL(kvm_require_cpl);
390
391 /*
392 * This function will be used to read from the physical memory of the currently
393 * running guest. The difference to kvm_read_guest_page is that this function
394 * can read from guest physical or from the guest's guest physical memory.
395 */
396 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
397 gfn_t ngfn, void *data, int offset, int len,
398 u32 access)
399 {
400 gfn_t real_gfn;
401 gpa_t ngpa;
402
403 ngpa = gfn_to_gpa(ngfn);
404 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
405 if (real_gfn == UNMAPPED_GVA)
406 return -EFAULT;
407
408 real_gfn = gpa_to_gfn(real_gfn);
409
410 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
411 }
412 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
413
414 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
415 void *data, int offset, int len, u32 access)
416 {
417 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
418 data, offset, len, access);
419 }
420
421 /*
422 * Load the pae pdptrs. Return true is they are all valid.
423 */
424 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
425 {
426 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
427 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
428 int i;
429 int ret;
430 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
431
432 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
433 offset * sizeof(u64), sizeof(pdpte),
434 PFERR_USER_MASK|PFERR_WRITE_MASK);
435 if (ret < 0) {
436 ret = 0;
437 goto out;
438 }
439 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
440 if (is_present_gpte(pdpte[i]) &&
441 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
442 ret = 0;
443 goto out;
444 }
445 }
446 ret = 1;
447
448 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
449 __set_bit(VCPU_EXREG_PDPTR,
450 (unsigned long *)&vcpu->arch.regs_avail);
451 __set_bit(VCPU_EXREG_PDPTR,
452 (unsigned long *)&vcpu->arch.regs_dirty);
453 out:
454
455 return ret;
456 }
457 EXPORT_SYMBOL_GPL(load_pdptrs);
458
459 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
460 {
461 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
462 bool changed = true;
463 int offset;
464 gfn_t gfn;
465 int r;
466
467 if (is_long_mode(vcpu) || !is_pae(vcpu))
468 return false;
469
470 if (!test_bit(VCPU_EXREG_PDPTR,
471 (unsigned long *)&vcpu->arch.regs_avail))
472 return true;
473
474 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
475 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
476 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
477 PFERR_USER_MASK | PFERR_WRITE_MASK);
478 if (r < 0)
479 goto out;
480 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
481 out:
482
483 return changed;
484 }
485
486 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
487 {
488 unsigned long old_cr0 = kvm_read_cr0(vcpu);
489 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
490 X86_CR0_CD | X86_CR0_NW;
491
492 cr0 |= X86_CR0_ET;
493
494 #ifdef CONFIG_X86_64
495 if (cr0 & 0xffffffff00000000UL)
496 return 1;
497 #endif
498
499 cr0 &= ~CR0_RESERVED_BITS;
500
501 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
502 return 1;
503
504 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
505 return 1;
506
507 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
508 #ifdef CONFIG_X86_64
509 if ((vcpu->arch.efer & EFER_LME)) {
510 int cs_db, cs_l;
511
512 if (!is_pae(vcpu))
513 return 1;
514 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
515 if (cs_l)
516 return 1;
517 } else
518 #endif
519 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
520 kvm_read_cr3(vcpu)))
521 return 1;
522 }
523
524 kvm_x86_ops->set_cr0(vcpu, cr0);
525
526 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
527 kvm_clear_async_pf_completion_queue(vcpu);
528 kvm_async_pf_hash_reset(vcpu);
529 }
530
531 if ((cr0 ^ old_cr0) & update_bits)
532 kvm_mmu_reset_context(vcpu);
533 return 0;
534 }
535 EXPORT_SYMBOL_GPL(kvm_set_cr0);
536
537 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
538 {
539 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
540 }
541 EXPORT_SYMBOL_GPL(kvm_lmsw);
542
543 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
544 {
545 u64 xcr0;
546
547 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
548 if (index != XCR_XFEATURE_ENABLED_MASK)
549 return 1;
550 xcr0 = xcr;
551 if (kvm_x86_ops->get_cpl(vcpu) != 0)
552 return 1;
553 if (!(xcr0 & XSTATE_FP))
554 return 1;
555 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
556 return 1;
557 if (xcr0 & ~host_xcr0)
558 return 1;
559 vcpu->arch.xcr0 = xcr0;
560 vcpu->guest_xcr0_loaded = 0;
561 return 0;
562 }
563
564 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
565 {
566 if (__kvm_set_xcr(vcpu, index, xcr)) {
567 kvm_inject_gp(vcpu, 0);
568 return 1;
569 }
570 return 0;
571 }
572 EXPORT_SYMBOL_GPL(kvm_set_xcr);
573
574 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
575 {
576 struct kvm_cpuid_entry2 *best;
577
578 best = kvm_find_cpuid_entry(vcpu, 1, 0);
579 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
580 }
581
582 static void update_cpuid(struct kvm_vcpu *vcpu)
583 {
584 struct kvm_cpuid_entry2 *best;
585
586 best = kvm_find_cpuid_entry(vcpu, 1, 0);
587 if (!best)
588 return;
589
590 /* Update OSXSAVE bit */
591 if (cpu_has_xsave && best->function == 0x1) {
592 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
593 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
594 best->ecx |= bit(X86_FEATURE_OSXSAVE);
595 }
596 }
597
598 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
599 {
600 unsigned long old_cr4 = kvm_read_cr4(vcpu);
601 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
602
603 if (cr4 & CR4_RESERVED_BITS)
604 return 1;
605
606 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
607 return 1;
608
609 if (is_long_mode(vcpu)) {
610 if (!(cr4 & X86_CR4_PAE))
611 return 1;
612 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
613 && ((cr4 ^ old_cr4) & pdptr_bits)
614 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
615 kvm_read_cr3(vcpu)))
616 return 1;
617
618 if (cr4 & X86_CR4_VMXE)
619 return 1;
620
621 kvm_x86_ops->set_cr4(vcpu, cr4);
622
623 if ((cr4 ^ old_cr4) & pdptr_bits)
624 kvm_mmu_reset_context(vcpu);
625
626 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
627 update_cpuid(vcpu);
628
629 return 0;
630 }
631 EXPORT_SYMBOL_GPL(kvm_set_cr4);
632
633 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
634 {
635 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
636 kvm_mmu_sync_roots(vcpu);
637 kvm_mmu_flush_tlb(vcpu);
638 return 0;
639 }
640
641 if (is_long_mode(vcpu)) {
642 if (cr3 & CR3_L_MODE_RESERVED_BITS)
643 return 1;
644 } else {
645 if (is_pae(vcpu)) {
646 if (cr3 & CR3_PAE_RESERVED_BITS)
647 return 1;
648 if (is_paging(vcpu) &&
649 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
650 return 1;
651 }
652 /*
653 * We don't check reserved bits in nonpae mode, because
654 * this isn't enforced, and VMware depends on this.
655 */
656 }
657
658 /*
659 * Does the new cr3 value map to physical memory? (Note, we
660 * catch an invalid cr3 even in real-mode, because it would
661 * cause trouble later on when we turn on paging anyway.)
662 *
663 * A real CPU would silently accept an invalid cr3 and would
664 * attempt to use it - with largely undefined (and often hard
665 * to debug) behavior on the guest side.
666 */
667 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
668 return 1;
669 vcpu->arch.cr3 = cr3;
670 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
671 vcpu->arch.mmu.new_cr3(vcpu);
672 return 0;
673 }
674 EXPORT_SYMBOL_GPL(kvm_set_cr3);
675
676 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
677 {
678 if (cr8 & CR8_RESERVED_BITS)
679 return 1;
680 if (irqchip_in_kernel(vcpu->kvm))
681 kvm_lapic_set_tpr(vcpu, cr8);
682 else
683 vcpu->arch.cr8 = cr8;
684 return 0;
685 }
686 EXPORT_SYMBOL_GPL(kvm_set_cr8);
687
688 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
689 {
690 if (irqchip_in_kernel(vcpu->kvm))
691 return kvm_lapic_get_cr8(vcpu);
692 else
693 return vcpu->arch.cr8;
694 }
695 EXPORT_SYMBOL_GPL(kvm_get_cr8);
696
697 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
698 {
699 switch (dr) {
700 case 0 ... 3:
701 vcpu->arch.db[dr] = val;
702 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
703 vcpu->arch.eff_db[dr] = val;
704 break;
705 case 4:
706 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
707 return 1; /* #UD */
708 /* fall through */
709 case 6:
710 if (val & 0xffffffff00000000ULL)
711 return -1; /* #GP */
712 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
713 break;
714 case 5:
715 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
716 return 1; /* #UD */
717 /* fall through */
718 default: /* 7 */
719 if (val & 0xffffffff00000000ULL)
720 return -1; /* #GP */
721 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
722 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
723 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
724 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
725 }
726 break;
727 }
728
729 return 0;
730 }
731
732 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
733 {
734 int res;
735
736 res = __kvm_set_dr(vcpu, dr, val);
737 if (res > 0)
738 kvm_queue_exception(vcpu, UD_VECTOR);
739 else if (res < 0)
740 kvm_inject_gp(vcpu, 0);
741
742 return res;
743 }
744 EXPORT_SYMBOL_GPL(kvm_set_dr);
745
746 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
747 {
748 switch (dr) {
749 case 0 ... 3:
750 *val = vcpu->arch.db[dr];
751 break;
752 case 4:
753 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
754 return 1;
755 /* fall through */
756 case 6:
757 *val = vcpu->arch.dr6;
758 break;
759 case 5:
760 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
761 return 1;
762 /* fall through */
763 default: /* 7 */
764 *val = vcpu->arch.dr7;
765 break;
766 }
767
768 return 0;
769 }
770
771 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
772 {
773 if (_kvm_get_dr(vcpu, dr, val)) {
774 kvm_queue_exception(vcpu, UD_VECTOR);
775 return 1;
776 }
777 return 0;
778 }
779 EXPORT_SYMBOL_GPL(kvm_get_dr);
780
781 /*
782 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
783 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
784 *
785 * This list is modified at module load time to reflect the
786 * capabilities of the host cpu. This capabilities test skips MSRs that are
787 * kvm-specific. Those are put in the beginning of the list.
788 */
789
790 #define KVM_SAVE_MSRS_BEGIN 8
791 static u32 msrs_to_save[] = {
792 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
793 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
794 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
795 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
796 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
797 MSR_STAR,
798 #ifdef CONFIG_X86_64
799 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
800 #endif
801 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
802 };
803
804 static unsigned num_msrs_to_save;
805
806 static u32 emulated_msrs[] = {
807 MSR_IA32_MISC_ENABLE,
808 MSR_IA32_MCG_STATUS,
809 MSR_IA32_MCG_CTL,
810 };
811
812 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
813 {
814 u64 old_efer = vcpu->arch.efer;
815
816 if (efer & efer_reserved_bits)
817 return 1;
818
819 if (is_paging(vcpu)
820 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
821 return 1;
822
823 if (efer & EFER_FFXSR) {
824 struct kvm_cpuid_entry2 *feat;
825
826 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
827 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
828 return 1;
829 }
830
831 if (efer & EFER_SVME) {
832 struct kvm_cpuid_entry2 *feat;
833
834 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
835 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
836 return 1;
837 }
838
839 efer &= ~EFER_LMA;
840 efer |= vcpu->arch.efer & EFER_LMA;
841
842 kvm_x86_ops->set_efer(vcpu, efer);
843
844 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
845
846 /* Update reserved bits */
847 if ((efer ^ old_efer) & EFER_NX)
848 kvm_mmu_reset_context(vcpu);
849
850 return 0;
851 }
852
853 void kvm_enable_efer_bits(u64 mask)
854 {
855 efer_reserved_bits &= ~mask;
856 }
857 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
858
859
860 /*
861 * Writes msr value into into the appropriate "register".
862 * Returns 0 on success, non-0 otherwise.
863 * Assumes vcpu_load() was already called.
864 */
865 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
866 {
867 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
868 }
869
870 /*
871 * Adapt set_msr() to msr_io()'s calling convention
872 */
873 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
874 {
875 return kvm_set_msr(vcpu, index, *data);
876 }
877
878 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
879 {
880 int version;
881 int r;
882 struct pvclock_wall_clock wc;
883 struct timespec boot;
884
885 if (!wall_clock)
886 return;
887
888 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
889 if (r)
890 return;
891
892 if (version & 1)
893 ++version; /* first time write, random junk */
894
895 ++version;
896
897 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
898
899 /*
900 * The guest calculates current wall clock time by adding
901 * system time (updated by kvm_guest_time_update below) to the
902 * wall clock specified here. guest system time equals host
903 * system time for us, thus we must fill in host boot time here.
904 */
905 getboottime(&boot);
906
907 wc.sec = boot.tv_sec;
908 wc.nsec = boot.tv_nsec;
909 wc.version = version;
910
911 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
912
913 version++;
914 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
915 }
916
917 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
918 {
919 uint32_t quotient, remainder;
920
921 /* Don't try to replace with do_div(), this one calculates
922 * "(dividend << 32) / divisor" */
923 __asm__ ( "divl %4"
924 : "=a" (quotient), "=d" (remainder)
925 : "0" (0), "1" (dividend), "r" (divisor) );
926 return quotient;
927 }
928
929 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
930 s8 *pshift, u32 *pmultiplier)
931 {
932 uint64_t scaled64;
933 int32_t shift = 0;
934 uint64_t tps64;
935 uint32_t tps32;
936
937 tps64 = base_khz * 1000LL;
938 scaled64 = scaled_khz * 1000LL;
939 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
940 tps64 >>= 1;
941 shift--;
942 }
943
944 tps32 = (uint32_t)tps64;
945 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
946 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
947 scaled64 >>= 1;
948 else
949 tps32 <<= 1;
950 shift++;
951 }
952
953 *pshift = shift;
954 *pmultiplier = div_frac(scaled64, tps32);
955
956 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
957 __func__, base_khz, scaled_khz, shift, *pmultiplier);
958 }
959
960 static inline u64 get_kernel_ns(void)
961 {
962 struct timespec ts;
963
964 WARN_ON(preemptible());
965 ktime_get_ts(&ts);
966 monotonic_to_bootbased(&ts);
967 return timespec_to_ns(&ts);
968 }
969
970 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
971 unsigned long max_tsc_khz;
972
973 static inline int kvm_tsc_changes_freq(void)
974 {
975 int cpu = get_cpu();
976 int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
977 cpufreq_quick_get(cpu) != 0;
978 put_cpu();
979 return ret;
980 }
981
982 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
983 {
984 if (vcpu->arch.virtual_tsc_khz)
985 return vcpu->arch.virtual_tsc_khz;
986 else
987 return __this_cpu_read(cpu_tsc_khz);
988 }
989
990 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
991 {
992 u64 ret;
993
994 WARN_ON(preemptible());
995 if (kvm_tsc_changes_freq())
996 printk_once(KERN_WARNING
997 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
998 ret = nsec * vcpu_tsc_khz(vcpu);
999 do_div(ret, USEC_PER_SEC);
1000 return ret;
1001 }
1002
1003 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1004 {
1005 /* Compute a scale to convert nanoseconds in TSC cycles */
1006 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1007 &vcpu->arch.tsc_catchup_shift,
1008 &vcpu->arch.tsc_catchup_mult);
1009 }
1010
1011 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1012 {
1013 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1014 vcpu->arch.tsc_catchup_mult,
1015 vcpu->arch.tsc_catchup_shift);
1016 tsc += vcpu->arch.last_tsc_write;
1017 return tsc;
1018 }
1019
1020 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1021 {
1022 struct kvm *kvm = vcpu->kvm;
1023 u64 offset, ns, elapsed;
1024 unsigned long flags;
1025 s64 sdiff;
1026
1027 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1028 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1029 ns = get_kernel_ns();
1030 elapsed = ns - kvm->arch.last_tsc_nsec;
1031 sdiff = data - kvm->arch.last_tsc_write;
1032 if (sdiff < 0)
1033 sdiff = -sdiff;
1034
1035 /*
1036 * Special case: close write to TSC within 5 seconds of
1037 * another CPU is interpreted as an attempt to synchronize
1038 * The 5 seconds is to accommodate host load / swapping as
1039 * well as any reset of TSC during the boot process.
1040 *
1041 * In that case, for a reliable TSC, we can match TSC offsets,
1042 * or make a best guest using elapsed value.
1043 */
1044 if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1045 elapsed < 5ULL * NSEC_PER_SEC) {
1046 if (!check_tsc_unstable()) {
1047 offset = kvm->arch.last_tsc_offset;
1048 pr_debug("kvm: matched tsc offset for %llu\n", data);
1049 } else {
1050 u64 delta = nsec_to_cycles(vcpu, elapsed);
1051 offset += delta;
1052 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1053 }
1054 ns = kvm->arch.last_tsc_nsec;
1055 }
1056 kvm->arch.last_tsc_nsec = ns;
1057 kvm->arch.last_tsc_write = data;
1058 kvm->arch.last_tsc_offset = offset;
1059 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1060 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1061
1062 /* Reset of TSC must disable overshoot protection below */
1063 vcpu->arch.hv_clock.tsc_timestamp = 0;
1064 vcpu->arch.last_tsc_write = data;
1065 vcpu->arch.last_tsc_nsec = ns;
1066 }
1067 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1068
1069 static int kvm_guest_time_update(struct kvm_vcpu *v)
1070 {
1071 unsigned long flags;
1072 struct kvm_vcpu_arch *vcpu = &v->arch;
1073 void *shared_kaddr;
1074 unsigned long this_tsc_khz;
1075 s64 kernel_ns, max_kernel_ns;
1076 u64 tsc_timestamp;
1077
1078 /* Keep irq disabled to prevent changes to the clock */
1079 local_irq_save(flags);
1080 kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1081 kernel_ns = get_kernel_ns();
1082 this_tsc_khz = vcpu_tsc_khz(v);
1083 if (unlikely(this_tsc_khz == 0)) {
1084 local_irq_restore(flags);
1085 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1086 return 1;
1087 }
1088
1089 /*
1090 * We may have to catch up the TSC to match elapsed wall clock
1091 * time for two reasons, even if kvmclock is used.
1092 * 1) CPU could have been running below the maximum TSC rate
1093 * 2) Broken TSC compensation resets the base at each VCPU
1094 * entry to avoid unknown leaps of TSC even when running
1095 * again on the same CPU. This may cause apparent elapsed
1096 * time to disappear, and the guest to stand still or run
1097 * very slowly.
1098 */
1099 if (vcpu->tsc_catchup) {
1100 u64 tsc = compute_guest_tsc(v, kernel_ns);
1101 if (tsc > tsc_timestamp) {
1102 kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1103 tsc_timestamp = tsc;
1104 }
1105 }
1106
1107 local_irq_restore(flags);
1108
1109 if (!vcpu->time_page)
1110 return 0;
1111
1112 /*
1113 * Time as measured by the TSC may go backwards when resetting the base
1114 * tsc_timestamp. The reason for this is that the TSC resolution is
1115 * higher than the resolution of the other clock scales. Thus, many
1116 * possible measurments of the TSC correspond to one measurement of any
1117 * other clock, and so a spread of values is possible. This is not a
1118 * problem for the computation of the nanosecond clock; with TSC rates
1119 * around 1GHZ, there can only be a few cycles which correspond to one
1120 * nanosecond value, and any path through this code will inevitably
1121 * take longer than that. However, with the kernel_ns value itself,
1122 * the precision may be much lower, down to HZ granularity. If the
1123 * first sampling of TSC against kernel_ns ends in the low part of the
1124 * range, and the second in the high end of the range, we can get:
1125 *
1126 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1127 *
1128 * As the sampling errors potentially range in the thousands of cycles,
1129 * it is possible such a time value has already been observed by the
1130 * guest. To protect against this, we must compute the system time as
1131 * observed by the guest and ensure the new system time is greater.
1132 */
1133 max_kernel_ns = 0;
1134 if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1135 max_kernel_ns = vcpu->last_guest_tsc -
1136 vcpu->hv_clock.tsc_timestamp;
1137 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1138 vcpu->hv_clock.tsc_to_system_mul,
1139 vcpu->hv_clock.tsc_shift);
1140 max_kernel_ns += vcpu->last_kernel_ns;
1141 }
1142
1143 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1144 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1145 &vcpu->hv_clock.tsc_shift,
1146 &vcpu->hv_clock.tsc_to_system_mul);
1147 vcpu->hw_tsc_khz = this_tsc_khz;
1148 }
1149
1150 if (max_kernel_ns > kernel_ns)
1151 kernel_ns = max_kernel_ns;
1152
1153 /* With all the info we got, fill in the values */
1154 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1155 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1156 vcpu->last_kernel_ns = kernel_ns;
1157 vcpu->last_guest_tsc = tsc_timestamp;
1158 vcpu->hv_clock.flags = 0;
1159
1160 /*
1161 * The interface expects us to write an even number signaling that the
1162 * update is finished. Since the guest won't see the intermediate
1163 * state, we just increase by 2 at the end.
1164 */
1165 vcpu->hv_clock.version += 2;
1166
1167 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1168
1169 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1170 sizeof(vcpu->hv_clock));
1171
1172 kunmap_atomic(shared_kaddr, KM_USER0);
1173
1174 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1175 return 0;
1176 }
1177
1178 static bool msr_mtrr_valid(unsigned msr)
1179 {
1180 switch (msr) {
1181 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1182 case MSR_MTRRfix64K_00000:
1183 case MSR_MTRRfix16K_80000:
1184 case MSR_MTRRfix16K_A0000:
1185 case MSR_MTRRfix4K_C0000:
1186 case MSR_MTRRfix4K_C8000:
1187 case MSR_MTRRfix4K_D0000:
1188 case MSR_MTRRfix4K_D8000:
1189 case MSR_MTRRfix4K_E0000:
1190 case MSR_MTRRfix4K_E8000:
1191 case MSR_MTRRfix4K_F0000:
1192 case MSR_MTRRfix4K_F8000:
1193 case MSR_MTRRdefType:
1194 case MSR_IA32_CR_PAT:
1195 return true;
1196 case 0x2f8:
1197 return true;
1198 }
1199 return false;
1200 }
1201
1202 static bool valid_pat_type(unsigned t)
1203 {
1204 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1205 }
1206
1207 static bool valid_mtrr_type(unsigned t)
1208 {
1209 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1210 }
1211
1212 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1213 {
1214 int i;
1215
1216 if (!msr_mtrr_valid(msr))
1217 return false;
1218
1219 if (msr == MSR_IA32_CR_PAT) {
1220 for (i = 0; i < 8; i++)
1221 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1222 return false;
1223 return true;
1224 } else if (msr == MSR_MTRRdefType) {
1225 if (data & ~0xcff)
1226 return false;
1227 return valid_mtrr_type(data & 0xff);
1228 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1229 for (i = 0; i < 8 ; i++)
1230 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1231 return false;
1232 return true;
1233 }
1234
1235 /* variable MTRRs */
1236 return valid_mtrr_type(data & 0xff);
1237 }
1238
1239 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1240 {
1241 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1242
1243 if (!mtrr_valid(vcpu, msr, data))
1244 return 1;
1245
1246 if (msr == MSR_MTRRdefType) {
1247 vcpu->arch.mtrr_state.def_type = data;
1248 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1249 } else if (msr == MSR_MTRRfix64K_00000)
1250 p[0] = data;
1251 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1252 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1253 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1254 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1255 else if (msr == MSR_IA32_CR_PAT)
1256 vcpu->arch.pat = data;
1257 else { /* Variable MTRRs */
1258 int idx, is_mtrr_mask;
1259 u64 *pt;
1260
1261 idx = (msr - 0x200) / 2;
1262 is_mtrr_mask = msr - 0x200 - 2 * idx;
1263 if (!is_mtrr_mask)
1264 pt =
1265 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1266 else
1267 pt =
1268 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1269 *pt = data;
1270 }
1271
1272 kvm_mmu_reset_context(vcpu);
1273 return 0;
1274 }
1275
1276 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1277 {
1278 u64 mcg_cap = vcpu->arch.mcg_cap;
1279 unsigned bank_num = mcg_cap & 0xff;
1280
1281 switch (msr) {
1282 case MSR_IA32_MCG_STATUS:
1283 vcpu->arch.mcg_status = data;
1284 break;
1285 case MSR_IA32_MCG_CTL:
1286 if (!(mcg_cap & MCG_CTL_P))
1287 return 1;
1288 if (data != 0 && data != ~(u64)0)
1289 return -1;
1290 vcpu->arch.mcg_ctl = data;
1291 break;
1292 default:
1293 if (msr >= MSR_IA32_MC0_CTL &&
1294 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1295 u32 offset = msr - MSR_IA32_MC0_CTL;
1296 /* only 0 or all 1s can be written to IA32_MCi_CTL
1297 * some Linux kernels though clear bit 10 in bank 4 to
1298 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1299 * this to avoid an uncatched #GP in the guest
1300 */
1301 if ((offset & 0x3) == 0 &&
1302 data != 0 && (data | (1 << 10)) != ~(u64)0)
1303 return -1;
1304 vcpu->arch.mce_banks[offset] = data;
1305 break;
1306 }
1307 return 1;
1308 }
1309 return 0;
1310 }
1311
1312 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1313 {
1314 struct kvm *kvm = vcpu->kvm;
1315 int lm = is_long_mode(vcpu);
1316 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1317 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1318 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1319 : kvm->arch.xen_hvm_config.blob_size_32;
1320 u32 page_num = data & ~PAGE_MASK;
1321 u64 page_addr = data & PAGE_MASK;
1322 u8 *page;
1323 int r;
1324
1325 r = -E2BIG;
1326 if (page_num >= blob_size)
1327 goto out;
1328 r = -ENOMEM;
1329 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1330 if (!page)
1331 goto out;
1332 r = -EFAULT;
1333 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1334 goto out_free;
1335 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1336 goto out_free;
1337 r = 0;
1338 out_free:
1339 kfree(page);
1340 out:
1341 return r;
1342 }
1343
1344 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1345 {
1346 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1347 }
1348
1349 static bool kvm_hv_msr_partition_wide(u32 msr)
1350 {
1351 bool r = false;
1352 switch (msr) {
1353 case HV_X64_MSR_GUEST_OS_ID:
1354 case HV_X64_MSR_HYPERCALL:
1355 r = true;
1356 break;
1357 }
1358
1359 return r;
1360 }
1361
1362 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1363 {
1364 struct kvm *kvm = vcpu->kvm;
1365
1366 switch (msr) {
1367 case HV_X64_MSR_GUEST_OS_ID:
1368 kvm->arch.hv_guest_os_id = data;
1369 /* setting guest os id to zero disables hypercall page */
1370 if (!kvm->arch.hv_guest_os_id)
1371 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1372 break;
1373 case HV_X64_MSR_HYPERCALL: {
1374 u64 gfn;
1375 unsigned long addr;
1376 u8 instructions[4];
1377
1378 /* if guest os id is not set hypercall should remain disabled */
1379 if (!kvm->arch.hv_guest_os_id)
1380 break;
1381 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1382 kvm->arch.hv_hypercall = data;
1383 break;
1384 }
1385 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1386 addr = gfn_to_hva(kvm, gfn);
1387 if (kvm_is_error_hva(addr))
1388 return 1;
1389 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1390 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1391 if (copy_to_user((void __user *)addr, instructions, 4))
1392 return 1;
1393 kvm->arch.hv_hypercall = data;
1394 break;
1395 }
1396 default:
1397 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1398 "data 0x%llx\n", msr, data);
1399 return 1;
1400 }
1401 return 0;
1402 }
1403
1404 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1405 {
1406 switch (msr) {
1407 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1408 unsigned long addr;
1409
1410 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1411 vcpu->arch.hv_vapic = data;
1412 break;
1413 }
1414 addr = gfn_to_hva(vcpu->kvm, data >>
1415 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1416 if (kvm_is_error_hva(addr))
1417 return 1;
1418 if (clear_user((void __user *)addr, PAGE_SIZE))
1419 return 1;
1420 vcpu->arch.hv_vapic = data;
1421 break;
1422 }
1423 case HV_X64_MSR_EOI:
1424 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1425 case HV_X64_MSR_ICR:
1426 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1427 case HV_X64_MSR_TPR:
1428 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1429 default:
1430 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1431 "data 0x%llx\n", msr, data);
1432 return 1;
1433 }
1434
1435 return 0;
1436 }
1437
1438 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1439 {
1440 gpa_t gpa = data & ~0x3f;
1441
1442 /* Bits 2:5 are resrved, Should be zero */
1443 if (data & 0x3c)
1444 return 1;
1445
1446 vcpu->arch.apf.msr_val = data;
1447
1448 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1449 kvm_clear_async_pf_completion_queue(vcpu);
1450 kvm_async_pf_hash_reset(vcpu);
1451 return 0;
1452 }
1453
1454 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1455 return 1;
1456
1457 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1458 kvm_async_pf_wakeup_all(vcpu);
1459 return 0;
1460 }
1461
1462 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1463 {
1464 if (vcpu->arch.time_page) {
1465 kvm_release_page_dirty(vcpu->arch.time_page);
1466 vcpu->arch.time_page = NULL;
1467 }
1468 }
1469
1470 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1471 {
1472 switch (msr) {
1473 case MSR_EFER:
1474 return set_efer(vcpu, data);
1475 case MSR_K7_HWCR:
1476 data &= ~(u64)0x40; /* ignore flush filter disable */
1477 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1478 if (data != 0) {
1479 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1480 data);
1481 return 1;
1482 }
1483 break;
1484 case MSR_FAM10H_MMIO_CONF_BASE:
1485 if (data != 0) {
1486 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1487 "0x%llx\n", data);
1488 return 1;
1489 }
1490 break;
1491 case MSR_AMD64_NB_CFG:
1492 break;
1493 case MSR_IA32_DEBUGCTLMSR:
1494 if (!data) {
1495 /* We support the non-activated case already */
1496 break;
1497 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1498 /* Values other than LBR and BTF are vendor-specific,
1499 thus reserved and should throw a #GP */
1500 return 1;
1501 }
1502 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1503 __func__, data);
1504 break;
1505 case MSR_IA32_UCODE_REV:
1506 case MSR_IA32_UCODE_WRITE:
1507 case MSR_VM_HSAVE_PA:
1508 case MSR_AMD64_PATCH_LOADER:
1509 break;
1510 case 0x200 ... 0x2ff:
1511 return set_msr_mtrr(vcpu, msr, data);
1512 case MSR_IA32_APICBASE:
1513 kvm_set_apic_base(vcpu, data);
1514 break;
1515 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1516 return kvm_x2apic_msr_write(vcpu, msr, data);
1517 case MSR_IA32_MISC_ENABLE:
1518 vcpu->arch.ia32_misc_enable_msr = data;
1519 break;
1520 case MSR_KVM_WALL_CLOCK_NEW:
1521 case MSR_KVM_WALL_CLOCK:
1522 vcpu->kvm->arch.wall_clock = data;
1523 kvm_write_wall_clock(vcpu->kvm, data);
1524 break;
1525 case MSR_KVM_SYSTEM_TIME_NEW:
1526 case MSR_KVM_SYSTEM_TIME: {
1527 kvmclock_reset(vcpu);
1528
1529 vcpu->arch.time = data;
1530 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1531
1532 /* we verify if the enable bit is set... */
1533 if (!(data & 1))
1534 break;
1535
1536 /* ...but clean it before doing the actual write */
1537 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1538
1539 vcpu->arch.time_page =
1540 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1541
1542 if (is_error_page(vcpu->arch.time_page)) {
1543 kvm_release_page_clean(vcpu->arch.time_page);
1544 vcpu->arch.time_page = NULL;
1545 }
1546 break;
1547 }
1548 case MSR_KVM_ASYNC_PF_EN:
1549 if (kvm_pv_enable_async_pf(vcpu, data))
1550 return 1;
1551 break;
1552 case MSR_IA32_MCG_CTL:
1553 case MSR_IA32_MCG_STATUS:
1554 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1555 return set_msr_mce(vcpu, msr, data);
1556
1557 /* Performance counters are not protected by a CPUID bit,
1558 * so we should check all of them in the generic path for the sake of
1559 * cross vendor migration.
1560 * Writing a zero into the event select MSRs disables them,
1561 * which we perfectly emulate ;-). Any other value should be at least
1562 * reported, some guests depend on them.
1563 */
1564 case MSR_P6_EVNTSEL0:
1565 case MSR_P6_EVNTSEL1:
1566 case MSR_K7_EVNTSEL0:
1567 case MSR_K7_EVNTSEL1:
1568 case MSR_K7_EVNTSEL2:
1569 case MSR_K7_EVNTSEL3:
1570 if (data != 0)
1571 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1572 "0x%x data 0x%llx\n", msr, data);
1573 break;
1574 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1575 * so we ignore writes to make it happy.
1576 */
1577 case MSR_P6_PERFCTR0:
1578 case MSR_P6_PERFCTR1:
1579 case MSR_K7_PERFCTR0:
1580 case MSR_K7_PERFCTR1:
1581 case MSR_K7_PERFCTR2:
1582 case MSR_K7_PERFCTR3:
1583 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1584 "0x%x data 0x%llx\n", msr, data);
1585 break;
1586 case MSR_K7_CLK_CTL:
1587 /*
1588 * Ignore all writes to this no longer documented MSR.
1589 * Writes are only relevant for old K7 processors,
1590 * all pre-dating SVM, but a recommended workaround from
1591 * AMD for these chips. It is possible to speicify the
1592 * affected processor models on the command line, hence
1593 * the need to ignore the workaround.
1594 */
1595 break;
1596 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1597 if (kvm_hv_msr_partition_wide(msr)) {
1598 int r;
1599 mutex_lock(&vcpu->kvm->lock);
1600 r = set_msr_hyperv_pw(vcpu, msr, data);
1601 mutex_unlock(&vcpu->kvm->lock);
1602 return r;
1603 } else
1604 return set_msr_hyperv(vcpu, msr, data);
1605 break;
1606 case MSR_IA32_BBL_CR_CTL3:
1607 /* Drop writes to this legacy MSR -- see rdmsr
1608 * counterpart for further detail.
1609 */
1610 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1611 break;
1612 default:
1613 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1614 return xen_hvm_config(vcpu, data);
1615 if (!ignore_msrs) {
1616 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1617 msr, data);
1618 return 1;
1619 } else {
1620 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1621 msr, data);
1622 break;
1623 }
1624 }
1625 return 0;
1626 }
1627 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1628
1629
1630 /*
1631 * Reads an msr value (of 'msr_index') into 'pdata'.
1632 * Returns 0 on success, non-0 otherwise.
1633 * Assumes vcpu_load() was already called.
1634 */
1635 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1636 {
1637 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1638 }
1639
1640 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1641 {
1642 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1643
1644 if (!msr_mtrr_valid(msr))
1645 return 1;
1646
1647 if (msr == MSR_MTRRdefType)
1648 *pdata = vcpu->arch.mtrr_state.def_type +
1649 (vcpu->arch.mtrr_state.enabled << 10);
1650 else if (msr == MSR_MTRRfix64K_00000)
1651 *pdata = p[0];
1652 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1653 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1654 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1655 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1656 else if (msr == MSR_IA32_CR_PAT)
1657 *pdata = vcpu->arch.pat;
1658 else { /* Variable MTRRs */
1659 int idx, is_mtrr_mask;
1660 u64 *pt;
1661
1662 idx = (msr - 0x200) / 2;
1663 is_mtrr_mask = msr - 0x200 - 2 * idx;
1664 if (!is_mtrr_mask)
1665 pt =
1666 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1667 else
1668 pt =
1669 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1670 *pdata = *pt;
1671 }
1672
1673 return 0;
1674 }
1675
1676 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1677 {
1678 u64 data;
1679 u64 mcg_cap = vcpu->arch.mcg_cap;
1680 unsigned bank_num = mcg_cap & 0xff;
1681
1682 switch (msr) {
1683 case MSR_IA32_P5_MC_ADDR:
1684 case MSR_IA32_P5_MC_TYPE:
1685 data = 0;
1686 break;
1687 case MSR_IA32_MCG_CAP:
1688 data = vcpu->arch.mcg_cap;
1689 break;
1690 case MSR_IA32_MCG_CTL:
1691 if (!(mcg_cap & MCG_CTL_P))
1692 return 1;
1693 data = vcpu->arch.mcg_ctl;
1694 break;
1695 case MSR_IA32_MCG_STATUS:
1696 data = vcpu->arch.mcg_status;
1697 break;
1698 default:
1699 if (msr >= MSR_IA32_MC0_CTL &&
1700 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1701 u32 offset = msr - MSR_IA32_MC0_CTL;
1702 data = vcpu->arch.mce_banks[offset];
1703 break;
1704 }
1705 return 1;
1706 }
1707 *pdata = data;
1708 return 0;
1709 }
1710
1711 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1712 {
1713 u64 data = 0;
1714 struct kvm *kvm = vcpu->kvm;
1715
1716 switch (msr) {
1717 case HV_X64_MSR_GUEST_OS_ID:
1718 data = kvm->arch.hv_guest_os_id;
1719 break;
1720 case HV_X64_MSR_HYPERCALL:
1721 data = kvm->arch.hv_hypercall;
1722 break;
1723 default:
1724 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1725 return 1;
1726 }
1727
1728 *pdata = data;
1729 return 0;
1730 }
1731
1732 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1733 {
1734 u64 data = 0;
1735
1736 switch (msr) {
1737 case HV_X64_MSR_VP_INDEX: {
1738 int r;
1739 struct kvm_vcpu *v;
1740 kvm_for_each_vcpu(r, v, vcpu->kvm)
1741 if (v == vcpu)
1742 data = r;
1743 break;
1744 }
1745 case HV_X64_MSR_EOI:
1746 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1747 case HV_X64_MSR_ICR:
1748 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1749 case HV_X64_MSR_TPR:
1750 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1751 default:
1752 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1753 return 1;
1754 }
1755 *pdata = data;
1756 return 0;
1757 }
1758
1759 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1760 {
1761 u64 data;
1762
1763 switch (msr) {
1764 case MSR_IA32_PLATFORM_ID:
1765 case MSR_IA32_UCODE_REV:
1766 case MSR_IA32_EBL_CR_POWERON:
1767 case MSR_IA32_DEBUGCTLMSR:
1768 case MSR_IA32_LASTBRANCHFROMIP:
1769 case MSR_IA32_LASTBRANCHTOIP:
1770 case MSR_IA32_LASTINTFROMIP:
1771 case MSR_IA32_LASTINTTOIP:
1772 case MSR_K8_SYSCFG:
1773 case MSR_K7_HWCR:
1774 case MSR_VM_HSAVE_PA:
1775 case MSR_P6_PERFCTR0:
1776 case MSR_P6_PERFCTR1:
1777 case MSR_P6_EVNTSEL0:
1778 case MSR_P6_EVNTSEL1:
1779 case MSR_K7_EVNTSEL0:
1780 case MSR_K7_PERFCTR0:
1781 case MSR_K8_INT_PENDING_MSG:
1782 case MSR_AMD64_NB_CFG:
1783 case MSR_FAM10H_MMIO_CONF_BASE:
1784 data = 0;
1785 break;
1786 case MSR_MTRRcap:
1787 data = 0x500 | KVM_NR_VAR_MTRR;
1788 break;
1789 case 0x200 ... 0x2ff:
1790 return get_msr_mtrr(vcpu, msr, pdata);
1791 case 0xcd: /* fsb frequency */
1792 data = 3;
1793 break;
1794 /*
1795 * MSR_EBC_FREQUENCY_ID
1796 * Conservative value valid for even the basic CPU models.
1797 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1798 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1799 * and 266MHz for model 3, or 4. Set Core Clock
1800 * Frequency to System Bus Frequency Ratio to 1 (bits
1801 * 31:24) even though these are only valid for CPU
1802 * models > 2, however guests may end up dividing or
1803 * multiplying by zero otherwise.
1804 */
1805 case MSR_EBC_FREQUENCY_ID:
1806 data = 1 << 24;
1807 break;
1808 case MSR_IA32_APICBASE:
1809 data = kvm_get_apic_base(vcpu);
1810 break;
1811 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1812 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1813 break;
1814 case MSR_IA32_MISC_ENABLE:
1815 data = vcpu->arch.ia32_misc_enable_msr;
1816 break;
1817 case MSR_IA32_PERF_STATUS:
1818 /* TSC increment by tick */
1819 data = 1000ULL;
1820 /* CPU multiplier */
1821 data |= (((uint64_t)4ULL) << 40);
1822 break;
1823 case MSR_EFER:
1824 data = vcpu->arch.efer;
1825 break;
1826 case MSR_KVM_WALL_CLOCK:
1827 case MSR_KVM_WALL_CLOCK_NEW:
1828 data = vcpu->kvm->arch.wall_clock;
1829 break;
1830 case MSR_KVM_SYSTEM_TIME:
1831 case MSR_KVM_SYSTEM_TIME_NEW:
1832 data = vcpu->arch.time;
1833 break;
1834 case MSR_KVM_ASYNC_PF_EN:
1835 data = vcpu->arch.apf.msr_val;
1836 break;
1837 case MSR_IA32_P5_MC_ADDR:
1838 case MSR_IA32_P5_MC_TYPE:
1839 case MSR_IA32_MCG_CAP:
1840 case MSR_IA32_MCG_CTL:
1841 case MSR_IA32_MCG_STATUS:
1842 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1843 return get_msr_mce(vcpu, msr, pdata);
1844 case MSR_K7_CLK_CTL:
1845 /*
1846 * Provide expected ramp-up count for K7. All other
1847 * are set to zero, indicating minimum divisors for
1848 * every field.
1849 *
1850 * This prevents guest kernels on AMD host with CPU
1851 * type 6, model 8 and higher from exploding due to
1852 * the rdmsr failing.
1853 */
1854 data = 0x20000000;
1855 break;
1856 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1857 if (kvm_hv_msr_partition_wide(msr)) {
1858 int r;
1859 mutex_lock(&vcpu->kvm->lock);
1860 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1861 mutex_unlock(&vcpu->kvm->lock);
1862 return r;
1863 } else
1864 return get_msr_hyperv(vcpu, msr, pdata);
1865 break;
1866 case MSR_IA32_BBL_CR_CTL3:
1867 /* This legacy MSR exists but isn't fully documented in current
1868 * silicon. It is however accessed by winxp in very narrow
1869 * scenarios where it sets bit #19, itself documented as
1870 * a "reserved" bit. Best effort attempt to source coherent
1871 * read data here should the balance of the register be
1872 * interpreted by the guest:
1873 *
1874 * L2 cache control register 3: 64GB range, 256KB size,
1875 * enabled, latency 0x1, configured
1876 */
1877 data = 0xbe702111;
1878 break;
1879 default:
1880 if (!ignore_msrs) {
1881 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1882 return 1;
1883 } else {
1884 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1885 data = 0;
1886 }
1887 break;
1888 }
1889 *pdata = data;
1890 return 0;
1891 }
1892 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1893
1894 /*
1895 * Read or write a bunch of msrs. All parameters are kernel addresses.
1896 *
1897 * @return number of msrs set successfully.
1898 */
1899 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1900 struct kvm_msr_entry *entries,
1901 int (*do_msr)(struct kvm_vcpu *vcpu,
1902 unsigned index, u64 *data))
1903 {
1904 int i, idx;
1905
1906 idx = srcu_read_lock(&vcpu->kvm->srcu);
1907 for (i = 0; i < msrs->nmsrs; ++i)
1908 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1909 break;
1910 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1911
1912 return i;
1913 }
1914
1915 /*
1916 * Read or write a bunch of msrs. Parameters are user addresses.
1917 *
1918 * @return number of msrs set successfully.
1919 */
1920 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1921 int (*do_msr)(struct kvm_vcpu *vcpu,
1922 unsigned index, u64 *data),
1923 int writeback)
1924 {
1925 struct kvm_msrs msrs;
1926 struct kvm_msr_entry *entries;
1927 int r, n;
1928 unsigned size;
1929
1930 r = -EFAULT;
1931 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1932 goto out;
1933
1934 r = -E2BIG;
1935 if (msrs.nmsrs >= MAX_IO_MSRS)
1936 goto out;
1937
1938 r = -ENOMEM;
1939 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1940 entries = kmalloc(size, GFP_KERNEL);
1941 if (!entries)
1942 goto out;
1943
1944 r = -EFAULT;
1945 if (copy_from_user(entries, user_msrs->entries, size))
1946 goto out_free;
1947
1948 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1949 if (r < 0)
1950 goto out_free;
1951
1952 r = -EFAULT;
1953 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1954 goto out_free;
1955
1956 r = n;
1957
1958 out_free:
1959 kfree(entries);
1960 out:
1961 return r;
1962 }
1963
1964 int kvm_dev_ioctl_check_extension(long ext)
1965 {
1966 int r;
1967
1968 switch (ext) {
1969 case KVM_CAP_IRQCHIP:
1970 case KVM_CAP_HLT:
1971 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1972 case KVM_CAP_SET_TSS_ADDR:
1973 case KVM_CAP_EXT_CPUID:
1974 case KVM_CAP_CLOCKSOURCE:
1975 case KVM_CAP_PIT:
1976 case KVM_CAP_NOP_IO_DELAY:
1977 case KVM_CAP_MP_STATE:
1978 case KVM_CAP_SYNC_MMU:
1979 case KVM_CAP_USER_NMI:
1980 case KVM_CAP_REINJECT_CONTROL:
1981 case KVM_CAP_IRQ_INJECT_STATUS:
1982 case KVM_CAP_ASSIGN_DEV_IRQ:
1983 case KVM_CAP_IRQFD:
1984 case KVM_CAP_IOEVENTFD:
1985 case KVM_CAP_PIT2:
1986 case KVM_CAP_PIT_STATE2:
1987 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1988 case KVM_CAP_XEN_HVM:
1989 case KVM_CAP_ADJUST_CLOCK:
1990 case KVM_CAP_VCPU_EVENTS:
1991 case KVM_CAP_HYPERV:
1992 case KVM_CAP_HYPERV_VAPIC:
1993 case KVM_CAP_HYPERV_SPIN:
1994 case KVM_CAP_PCI_SEGMENT:
1995 case KVM_CAP_DEBUGREGS:
1996 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1997 case KVM_CAP_XSAVE:
1998 case KVM_CAP_ASYNC_PF:
1999 case KVM_CAP_GET_TSC_KHZ:
2000 r = 1;
2001 break;
2002 case KVM_CAP_COALESCED_MMIO:
2003 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2004 break;
2005 case KVM_CAP_VAPIC:
2006 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2007 break;
2008 case KVM_CAP_NR_VCPUS:
2009 r = KVM_MAX_VCPUS;
2010 break;
2011 case KVM_CAP_NR_MEMSLOTS:
2012 r = KVM_MEMORY_SLOTS;
2013 break;
2014 case KVM_CAP_PV_MMU: /* obsolete */
2015 r = 0;
2016 break;
2017 case KVM_CAP_IOMMU:
2018 r = iommu_found();
2019 break;
2020 case KVM_CAP_MCE:
2021 r = KVM_MAX_MCE_BANKS;
2022 break;
2023 case KVM_CAP_XCRS:
2024 r = cpu_has_xsave;
2025 break;
2026 case KVM_CAP_TSC_CONTROL:
2027 r = kvm_has_tsc_control;
2028 break;
2029 default:
2030 r = 0;
2031 break;
2032 }
2033 return r;
2034
2035 }
2036
2037 long kvm_arch_dev_ioctl(struct file *filp,
2038 unsigned int ioctl, unsigned long arg)
2039 {
2040 void __user *argp = (void __user *)arg;
2041 long r;
2042
2043 switch (ioctl) {
2044 case KVM_GET_MSR_INDEX_LIST: {
2045 struct kvm_msr_list __user *user_msr_list = argp;
2046 struct kvm_msr_list msr_list;
2047 unsigned n;
2048
2049 r = -EFAULT;
2050 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2051 goto out;
2052 n = msr_list.nmsrs;
2053 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2054 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2055 goto out;
2056 r = -E2BIG;
2057 if (n < msr_list.nmsrs)
2058 goto out;
2059 r = -EFAULT;
2060 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2061 num_msrs_to_save * sizeof(u32)))
2062 goto out;
2063 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2064 &emulated_msrs,
2065 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2066 goto out;
2067 r = 0;
2068 break;
2069 }
2070 case KVM_GET_SUPPORTED_CPUID: {
2071 struct kvm_cpuid2 __user *cpuid_arg = argp;
2072 struct kvm_cpuid2 cpuid;
2073
2074 r = -EFAULT;
2075 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2076 goto out;
2077 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2078 cpuid_arg->entries);
2079 if (r)
2080 goto out;
2081
2082 r = -EFAULT;
2083 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2084 goto out;
2085 r = 0;
2086 break;
2087 }
2088 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2089 u64 mce_cap;
2090
2091 mce_cap = KVM_MCE_CAP_SUPPORTED;
2092 r = -EFAULT;
2093 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2094 goto out;
2095 r = 0;
2096 break;
2097 }
2098 default:
2099 r = -EINVAL;
2100 }
2101 out:
2102 return r;
2103 }
2104
2105 static void wbinvd_ipi(void *garbage)
2106 {
2107 wbinvd();
2108 }
2109
2110 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2111 {
2112 return vcpu->kvm->arch.iommu_domain &&
2113 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2114 }
2115
2116 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2117 {
2118 /* Address WBINVD may be executed by guest */
2119 if (need_emulate_wbinvd(vcpu)) {
2120 if (kvm_x86_ops->has_wbinvd_exit())
2121 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2122 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2123 smp_call_function_single(vcpu->cpu,
2124 wbinvd_ipi, NULL, 1);
2125 }
2126
2127 kvm_x86_ops->vcpu_load(vcpu, cpu);
2128 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2129 /* Make sure TSC doesn't go backwards */
2130 s64 tsc_delta;
2131 u64 tsc;
2132
2133 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2134 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2135 tsc - vcpu->arch.last_guest_tsc;
2136
2137 if (tsc_delta < 0)
2138 mark_tsc_unstable("KVM discovered backwards TSC");
2139 if (check_tsc_unstable()) {
2140 kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2141 vcpu->arch.tsc_catchup = 1;
2142 }
2143 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2144 if (vcpu->cpu != cpu)
2145 kvm_migrate_timers(vcpu);
2146 vcpu->cpu = cpu;
2147 }
2148 }
2149
2150 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2151 {
2152 kvm_x86_ops->vcpu_put(vcpu);
2153 kvm_put_guest_fpu(vcpu);
2154 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2155 }
2156
2157 static int is_efer_nx(void)
2158 {
2159 unsigned long long efer = 0;
2160
2161 rdmsrl_safe(MSR_EFER, &efer);
2162 return efer & EFER_NX;
2163 }
2164
2165 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2166 {
2167 int i;
2168 struct kvm_cpuid_entry2 *e, *entry;
2169
2170 entry = NULL;
2171 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2172 e = &vcpu->arch.cpuid_entries[i];
2173 if (e->function == 0x80000001) {
2174 entry = e;
2175 break;
2176 }
2177 }
2178 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2179 entry->edx &= ~(1 << 20);
2180 printk(KERN_INFO "kvm: guest NX capability removed\n");
2181 }
2182 }
2183
2184 /* when an old userspace process fills a new kernel module */
2185 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2186 struct kvm_cpuid *cpuid,
2187 struct kvm_cpuid_entry __user *entries)
2188 {
2189 int r, i;
2190 struct kvm_cpuid_entry *cpuid_entries;
2191
2192 r = -E2BIG;
2193 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2194 goto out;
2195 r = -ENOMEM;
2196 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2197 if (!cpuid_entries)
2198 goto out;
2199 r = -EFAULT;
2200 if (copy_from_user(cpuid_entries, entries,
2201 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2202 goto out_free;
2203 for (i = 0; i < cpuid->nent; i++) {
2204 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2205 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2206 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2207 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2208 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2209 vcpu->arch.cpuid_entries[i].index = 0;
2210 vcpu->arch.cpuid_entries[i].flags = 0;
2211 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2212 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2213 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2214 }
2215 vcpu->arch.cpuid_nent = cpuid->nent;
2216 cpuid_fix_nx_cap(vcpu);
2217 r = 0;
2218 kvm_apic_set_version(vcpu);
2219 kvm_x86_ops->cpuid_update(vcpu);
2220 update_cpuid(vcpu);
2221
2222 out_free:
2223 vfree(cpuid_entries);
2224 out:
2225 return r;
2226 }
2227
2228 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2229 struct kvm_cpuid2 *cpuid,
2230 struct kvm_cpuid_entry2 __user *entries)
2231 {
2232 int r;
2233
2234 r = -E2BIG;
2235 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2236 goto out;
2237 r = -EFAULT;
2238 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2239 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2240 goto out;
2241 vcpu->arch.cpuid_nent = cpuid->nent;
2242 kvm_apic_set_version(vcpu);
2243 kvm_x86_ops->cpuid_update(vcpu);
2244 update_cpuid(vcpu);
2245 return 0;
2246
2247 out:
2248 return r;
2249 }
2250
2251 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2252 struct kvm_cpuid2 *cpuid,
2253 struct kvm_cpuid_entry2 __user *entries)
2254 {
2255 int r;
2256
2257 r = -E2BIG;
2258 if (cpuid->nent < vcpu->arch.cpuid_nent)
2259 goto out;
2260 r = -EFAULT;
2261 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2262 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2263 goto out;
2264 return 0;
2265
2266 out:
2267 cpuid->nent = vcpu->arch.cpuid_nent;
2268 return r;
2269 }
2270
2271 static void cpuid_mask(u32 *word, int wordnum)
2272 {
2273 *word &= boot_cpu_data.x86_capability[wordnum];
2274 }
2275
2276 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2277 u32 index)
2278 {
2279 entry->function = function;
2280 entry->index = index;
2281 cpuid_count(entry->function, entry->index,
2282 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2283 entry->flags = 0;
2284 }
2285
2286 #define F(x) bit(X86_FEATURE_##x)
2287
2288 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2289 u32 index, int *nent, int maxnent)
2290 {
2291 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2292 #ifdef CONFIG_X86_64
2293 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2294 ? F(GBPAGES) : 0;
2295 unsigned f_lm = F(LM);
2296 #else
2297 unsigned f_gbpages = 0;
2298 unsigned f_lm = 0;
2299 #endif
2300 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2301
2302 /* cpuid 1.edx */
2303 const u32 kvm_supported_word0_x86_features =
2304 F(FPU) | F(VME) | F(DE) | F(PSE) |
2305 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2306 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2307 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2308 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2309 0 /* Reserved, DS, ACPI */ | F(MMX) |
2310 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2311 0 /* HTT, TM, Reserved, PBE */;
2312 /* cpuid 0x80000001.edx */
2313 const u32 kvm_supported_word1_x86_features =
2314 F(FPU) | F(VME) | F(DE) | F(PSE) |
2315 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2316 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2317 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2318 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2319 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2320 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2321 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2322 /* cpuid 1.ecx */
2323 const u32 kvm_supported_word4_x86_features =
2324 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2325 0 /* DS-CPL, VMX, SMX, EST */ |
2326 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2327 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2328 0 /* Reserved, DCA */ | F(XMM4_1) |
2329 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2330 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2331 F(F16C);
2332 /* cpuid 0x80000001.ecx */
2333 const u32 kvm_supported_word6_x86_features =
2334 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2335 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2336 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2337 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2338
2339 /* all calls to cpuid_count() should be made on the same cpu */
2340 get_cpu();
2341 do_cpuid_1_ent(entry, function, index);
2342 ++*nent;
2343
2344 switch (function) {
2345 case 0:
2346 entry->eax = min(entry->eax, (u32)0xd);
2347 break;
2348 case 1:
2349 entry->edx &= kvm_supported_word0_x86_features;
2350 cpuid_mask(&entry->edx, 0);
2351 entry->ecx &= kvm_supported_word4_x86_features;
2352 cpuid_mask(&entry->ecx, 4);
2353 /* we support x2apic emulation even if host does not support
2354 * it since we emulate x2apic in software */
2355 entry->ecx |= F(X2APIC);
2356 break;
2357 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2358 * may return different values. This forces us to get_cpu() before
2359 * issuing the first command, and also to emulate this annoying behavior
2360 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2361 case 2: {
2362 int t, times = entry->eax & 0xff;
2363
2364 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2365 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2366 for (t = 1; t < times && *nent < maxnent; ++t) {
2367 do_cpuid_1_ent(&entry[t], function, 0);
2368 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2369 ++*nent;
2370 }
2371 break;
2372 }
2373 /* function 4 and 0xb have additional index. */
2374 case 4: {
2375 int i, cache_type;
2376
2377 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2378 /* read more entries until cache_type is zero */
2379 for (i = 1; *nent < maxnent; ++i) {
2380 cache_type = entry[i - 1].eax & 0x1f;
2381 if (!cache_type)
2382 break;
2383 do_cpuid_1_ent(&entry[i], function, i);
2384 entry[i].flags |=
2385 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2386 ++*nent;
2387 }
2388 break;
2389 }
2390 case 0xb: {
2391 int i, level_type;
2392
2393 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2394 /* read more entries until level_type is zero */
2395 for (i = 1; *nent < maxnent; ++i) {
2396 level_type = entry[i - 1].ecx & 0xff00;
2397 if (!level_type)
2398 break;
2399 do_cpuid_1_ent(&entry[i], function, i);
2400 entry[i].flags |=
2401 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2402 ++*nent;
2403 }
2404 break;
2405 }
2406 case 0xd: {
2407 int i;
2408
2409 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2410 for (i = 1; *nent < maxnent && i < 64; ++i) {
2411 if (entry[i].eax == 0)
2412 continue;
2413 do_cpuid_1_ent(&entry[i], function, i);
2414 entry[i].flags |=
2415 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2416 ++*nent;
2417 }
2418 break;
2419 }
2420 case KVM_CPUID_SIGNATURE: {
2421 char signature[12] = "KVMKVMKVM\0\0";
2422 u32 *sigptr = (u32 *)signature;
2423 entry->eax = 0;
2424 entry->ebx = sigptr[0];
2425 entry->ecx = sigptr[1];
2426 entry->edx = sigptr[2];
2427 break;
2428 }
2429 case KVM_CPUID_FEATURES:
2430 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2431 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2432 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2433 (1 << KVM_FEATURE_ASYNC_PF) |
2434 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2435 entry->ebx = 0;
2436 entry->ecx = 0;
2437 entry->edx = 0;
2438 break;
2439 case 0x80000000:
2440 entry->eax = min(entry->eax, 0x8000001a);
2441 break;
2442 case 0x80000001:
2443 entry->edx &= kvm_supported_word1_x86_features;
2444 cpuid_mask(&entry->edx, 1);
2445 entry->ecx &= kvm_supported_word6_x86_features;
2446 cpuid_mask(&entry->ecx, 6);
2447 break;
2448 }
2449
2450 kvm_x86_ops->set_supported_cpuid(function, entry);
2451
2452 put_cpu();
2453 }
2454
2455 #undef F
2456
2457 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2458 struct kvm_cpuid_entry2 __user *entries)
2459 {
2460 struct kvm_cpuid_entry2 *cpuid_entries;
2461 int limit, nent = 0, r = -E2BIG;
2462 u32 func;
2463
2464 if (cpuid->nent < 1)
2465 goto out;
2466 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2467 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2468 r = -ENOMEM;
2469 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2470 if (!cpuid_entries)
2471 goto out;
2472
2473 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2474 limit = cpuid_entries[0].eax;
2475 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2476 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2477 &nent, cpuid->nent);
2478 r = -E2BIG;
2479 if (nent >= cpuid->nent)
2480 goto out_free;
2481
2482 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2483 limit = cpuid_entries[nent - 1].eax;
2484 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2485 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2486 &nent, cpuid->nent);
2487
2488
2489
2490 r = -E2BIG;
2491 if (nent >= cpuid->nent)
2492 goto out_free;
2493
2494 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2495 cpuid->nent);
2496
2497 r = -E2BIG;
2498 if (nent >= cpuid->nent)
2499 goto out_free;
2500
2501 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2502 cpuid->nent);
2503
2504 r = -E2BIG;
2505 if (nent >= cpuid->nent)
2506 goto out_free;
2507
2508 r = -EFAULT;
2509 if (copy_to_user(entries, cpuid_entries,
2510 nent * sizeof(struct kvm_cpuid_entry2)))
2511 goto out_free;
2512 cpuid->nent = nent;
2513 r = 0;
2514
2515 out_free:
2516 vfree(cpuid_entries);
2517 out:
2518 return r;
2519 }
2520
2521 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2522 struct kvm_lapic_state *s)
2523 {
2524 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2525
2526 return 0;
2527 }
2528
2529 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2530 struct kvm_lapic_state *s)
2531 {
2532 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2533 kvm_apic_post_state_restore(vcpu);
2534 update_cr8_intercept(vcpu);
2535
2536 return 0;
2537 }
2538
2539 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2540 struct kvm_interrupt *irq)
2541 {
2542 if (irq->irq < 0 || irq->irq >= 256)
2543 return -EINVAL;
2544 if (irqchip_in_kernel(vcpu->kvm))
2545 return -ENXIO;
2546
2547 kvm_queue_interrupt(vcpu, irq->irq, false);
2548 kvm_make_request(KVM_REQ_EVENT, vcpu);
2549
2550 return 0;
2551 }
2552
2553 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2554 {
2555 kvm_inject_nmi(vcpu);
2556
2557 return 0;
2558 }
2559
2560 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2561 struct kvm_tpr_access_ctl *tac)
2562 {
2563 if (tac->flags)
2564 return -EINVAL;
2565 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2566 return 0;
2567 }
2568
2569 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2570 u64 mcg_cap)
2571 {
2572 int r;
2573 unsigned bank_num = mcg_cap & 0xff, bank;
2574
2575 r = -EINVAL;
2576 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2577 goto out;
2578 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2579 goto out;
2580 r = 0;
2581 vcpu->arch.mcg_cap = mcg_cap;
2582 /* Init IA32_MCG_CTL to all 1s */
2583 if (mcg_cap & MCG_CTL_P)
2584 vcpu->arch.mcg_ctl = ~(u64)0;
2585 /* Init IA32_MCi_CTL to all 1s */
2586 for (bank = 0; bank < bank_num; bank++)
2587 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2588 out:
2589 return r;
2590 }
2591
2592 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2593 struct kvm_x86_mce *mce)
2594 {
2595 u64 mcg_cap = vcpu->arch.mcg_cap;
2596 unsigned bank_num = mcg_cap & 0xff;
2597 u64 *banks = vcpu->arch.mce_banks;
2598
2599 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2600 return -EINVAL;
2601 /*
2602 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2603 * reporting is disabled
2604 */
2605 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2606 vcpu->arch.mcg_ctl != ~(u64)0)
2607 return 0;
2608 banks += 4 * mce->bank;
2609 /*
2610 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2611 * reporting is disabled for the bank
2612 */
2613 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2614 return 0;
2615 if (mce->status & MCI_STATUS_UC) {
2616 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2617 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2618 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2619 return 0;
2620 }
2621 if (banks[1] & MCI_STATUS_VAL)
2622 mce->status |= MCI_STATUS_OVER;
2623 banks[2] = mce->addr;
2624 banks[3] = mce->misc;
2625 vcpu->arch.mcg_status = mce->mcg_status;
2626 banks[1] = mce->status;
2627 kvm_queue_exception(vcpu, MC_VECTOR);
2628 } else if (!(banks[1] & MCI_STATUS_VAL)
2629 || !(banks[1] & MCI_STATUS_UC)) {
2630 if (banks[1] & MCI_STATUS_VAL)
2631 mce->status |= MCI_STATUS_OVER;
2632 banks[2] = mce->addr;
2633 banks[3] = mce->misc;
2634 banks[1] = mce->status;
2635 } else
2636 banks[1] |= MCI_STATUS_OVER;
2637 return 0;
2638 }
2639
2640 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2641 struct kvm_vcpu_events *events)
2642 {
2643 events->exception.injected =
2644 vcpu->arch.exception.pending &&
2645 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2646 events->exception.nr = vcpu->arch.exception.nr;
2647 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2648 events->exception.pad = 0;
2649 events->exception.error_code = vcpu->arch.exception.error_code;
2650
2651 events->interrupt.injected =
2652 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2653 events->interrupt.nr = vcpu->arch.interrupt.nr;
2654 events->interrupt.soft = 0;
2655 events->interrupt.shadow =
2656 kvm_x86_ops->get_interrupt_shadow(vcpu,
2657 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2658
2659 events->nmi.injected = vcpu->arch.nmi_injected;
2660 events->nmi.pending = vcpu->arch.nmi_pending;
2661 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2662 events->nmi.pad = 0;
2663
2664 events->sipi_vector = vcpu->arch.sipi_vector;
2665
2666 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2667 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2668 | KVM_VCPUEVENT_VALID_SHADOW);
2669 memset(&events->reserved, 0, sizeof(events->reserved));
2670 }
2671
2672 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2673 struct kvm_vcpu_events *events)
2674 {
2675 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2676 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2677 | KVM_VCPUEVENT_VALID_SHADOW))
2678 return -EINVAL;
2679
2680 vcpu->arch.exception.pending = events->exception.injected;
2681 vcpu->arch.exception.nr = events->exception.nr;
2682 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2683 vcpu->arch.exception.error_code = events->exception.error_code;
2684
2685 vcpu->arch.interrupt.pending = events->interrupt.injected;
2686 vcpu->arch.interrupt.nr = events->interrupt.nr;
2687 vcpu->arch.interrupt.soft = events->interrupt.soft;
2688 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2689 kvm_x86_ops->set_interrupt_shadow(vcpu,
2690 events->interrupt.shadow);
2691
2692 vcpu->arch.nmi_injected = events->nmi.injected;
2693 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2694 vcpu->arch.nmi_pending = events->nmi.pending;
2695 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2696
2697 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2698 vcpu->arch.sipi_vector = events->sipi_vector;
2699
2700 kvm_make_request(KVM_REQ_EVENT, vcpu);
2701
2702 return 0;
2703 }
2704
2705 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2706 struct kvm_debugregs *dbgregs)
2707 {
2708 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2709 dbgregs->dr6 = vcpu->arch.dr6;
2710 dbgregs->dr7 = vcpu->arch.dr7;
2711 dbgregs->flags = 0;
2712 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2713 }
2714
2715 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2716 struct kvm_debugregs *dbgregs)
2717 {
2718 if (dbgregs->flags)
2719 return -EINVAL;
2720
2721 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2722 vcpu->arch.dr6 = dbgregs->dr6;
2723 vcpu->arch.dr7 = dbgregs->dr7;
2724
2725 return 0;
2726 }
2727
2728 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2729 struct kvm_xsave *guest_xsave)
2730 {
2731 if (cpu_has_xsave)
2732 memcpy(guest_xsave->region,
2733 &vcpu->arch.guest_fpu.state->xsave,
2734 xstate_size);
2735 else {
2736 memcpy(guest_xsave->region,
2737 &vcpu->arch.guest_fpu.state->fxsave,
2738 sizeof(struct i387_fxsave_struct));
2739 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2740 XSTATE_FPSSE;
2741 }
2742 }
2743
2744 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2745 struct kvm_xsave *guest_xsave)
2746 {
2747 u64 xstate_bv =
2748 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2749
2750 if (cpu_has_xsave)
2751 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2752 guest_xsave->region, xstate_size);
2753 else {
2754 if (xstate_bv & ~XSTATE_FPSSE)
2755 return -EINVAL;
2756 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2757 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2758 }
2759 return 0;
2760 }
2761
2762 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2763 struct kvm_xcrs *guest_xcrs)
2764 {
2765 if (!cpu_has_xsave) {
2766 guest_xcrs->nr_xcrs = 0;
2767 return;
2768 }
2769
2770 guest_xcrs->nr_xcrs = 1;
2771 guest_xcrs->flags = 0;
2772 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2773 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2774 }
2775
2776 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2777 struct kvm_xcrs *guest_xcrs)
2778 {
2779 int i, r = 0;
2780
2781 if (!cpu_has_xsave)
2782 return -EINVAL;
2783
2784 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2785 return -EINVAL;
2786
2787 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2788 /* Only support XCR0 currently */
2789 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2790 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2791 guest_xcrs->xcrs[0].value);
2792 break;
2793 }
2794 if (r)
2795 r = -EINVAL;
2796 return r;
2797 }
2798
2799 long kvm_arch_vcpu_ioctl(struct file *filp,
2800 unsigned int ioctl, unsigned long arg)
2801 {
2802 struct kvm_vcpu *vcpu = filp->private_data;
2803 void __user *argp = (void __user *)arg;
2804 int r;
2805 union {
2806 struct kvm_lapic_state *lapic;
2807 struct kvm_xsave *xsave;
2808 struct kvm_xcrs *xcrs;
2809 void *buffer;
2810 } u;
2811
2812 u.buffer = NULL;
2813 switch (ioctl) {
2814 case KVM_GET_LAPIC: {
2815 r = -EINVAL;
2816 if (!vcpu->arch.apic)
2817 goto out;
2818 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2819
2820 r = -ENOMEM;
2821 if (!u.lapic)
2822 goto out;
2823 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2824 if (r)
2825 goto out;
2826 r = -EFAULT;
2827 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2828 goto out;
2829 r = 0;
2830 break;
2831 }
2832 case KVM_SET_LAPIC: {
2833 r = -EINVAL;
2834 if (!vcpu->arch.apic)
2835 goto out;
2836 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2837 r = -ENOMEM;
2838 if (!u.lapic)
2839 goto out;
2840 r = -EFAULT;
2841 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2842 goto out;
2843 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2844 if (r)
2845 goto out;
2846 r = 0;
2847 break;
2848 }
2849 case KVM_INTERRUPT: {
2850 struct kvm_interrupt irq;
2851
2852 r = -EFAULT;
2853 if (copy_from_user(&irq, argp, sizeof irq))
2854 goto out;
2855 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2856 if (r)
2857 goto out;
2858 r = 0;
2859 break;
2860 }
2861 case KVM_NMI: {
2862 r = kvm_vcpu_ioctl_nmi(vcpu);
2863 if (r)
2864 goto out;
2865 r = 0;
2866 break;
2867 }
2868 case KVM_SET_CPUID: {
2869 struct kvm_cpuid __user *cpuid_arg = argp;
2870 struct kvm_cpuid cpuid;
2871
2872 r = -EFAULT;
2873 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2874 goto out;
2875 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2876 if (r)
2877 goto out;
2878 break;
2879 }
2880 case KVM_SET_CPUID2: {
2881 struct kvm_cpuid2 __user *cpuid_arg = argp;
2882 struct kvm_cpuid2 cpuid;
2883
2884 r = -EFAULT;
2885 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2886 goto out;
2887 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2888 cpuid_arg->entries);
2889 if (r)
2890 goto out;
2891 break;
2892 }
2893 case KVM_GET_CPUID2: {
2894 struct kvm_cpuid2 __user *cpuid_arg = argp;
2895 struct kvm_cpuid2 cpuid;
2896
2897 r = -EFAULT;
2898 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2899 goto out;
2900 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2901 cpuid_arg->entries);
2902 if (r)
2903 goto out;
2904 r = -EFAULT;
2905 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2906 goto out;
2907 r = 0;
2908 break;
2909 }
2910 case KVM_GET_MSRS:
2911 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2912 break;
2913 case KVM_SET_MSRS:
2914 r = msr_io(vcpu, argp, do_set_msr, 0);
2915 break;
2916 case KVM_TPR_ACCESS_REPORTING: {
2917 struct kvm_tpr_access_ctl tac;
2918
2919 r = -EFAULT;
2920 if (copy_from_user(&tac, argp, sizeof tac))
2921 goto out;
2922 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2923 if (r)
2924 goto out;
2925 r = -EFAULT;
2926 if (copy_to_user(argp, &tac, sizeof tac))
2927 goto out;
2928 r = 0;
2929 break;
2930 };
2931 case KVM_SET_VAPIC_ADDR: {
2932 struct kvm_vapic_addr va;
2933
2934 r = -EINVAL;
2935 if (!irqchip_in_kernel(vcpu->kvm))
2936 goto out;
2937 r = -EFAULT;
2938 if (copy_from_user(&va, argp, sizeof va))
2939 goto out;
2940 r = 0;
2941 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2942 break;
2943 }
2944 case KVM_X86_SETUP_MCE: {
2945 u64 mcg_cap;
2946
2947 r = -EFAULT;
2948 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2949 goto out;
2950 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2951 break;
2952 }
2953 case KVM_X86_SET_MCE: {
2954 struct kvm_x86_mce mce;
2955
2956 r = -EFAULT;
2957 if (copy_from_user(&mce, argp, sizeof mce))
2958 goto out;
2959 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2960 break;
2961 }
2962 case KVM_GET_VCPU_EVENTS: {
2963 struct kvm_vcpu_events events;
2964
2965 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2966
2967 r = -EFAULT;
2968 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2969 break;
2970 r = 0;
2971 break;
2972 }
2973 case KVM_SET_VCPU_EVENTS: {
2974 struct kvm_vcpu_events events;
2975
2976 r = -EFAULT;
2977 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2978 break;
2979
2980 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2981 break;
2982 }
2983 case KVM_GET_DEBUGREGS: {
2984 struct kvm_debugregs dbgregs;
2985
2986 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2987
2988 r = -EFAULT;
2989 if (copy_to_user(argp, &dbgregs,
2990 sizeof(struct kvm_debugregs)))
2991 break;
2992 r = 0;
2993 break;
2994 }
2995 case KVM_SET_DEBUGREGS: {
2996 struct kvm_debugregs dbgregs;
2997
2998 r = -EFAULT;
2999 if (copy_from_user(&dbgregs, argp,
3000 sizeof(struct kvm_debugregs)))
3001 break;
3002
3003 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3004 break;
3005 }
3006 case KVM_GET_XSAVE: {
3007 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3008 r = -ENOMEM;
3009 if (!u.xsave)
3010 break;
3011
3012 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3013
3014 r = -EFAULT;
3015 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3016 break;
3017 r = 0;
3018 break;
3019 }
3020 case KVM_SET_XSAVE: {
3021 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3022 r = -ENOMEM;
3023 if (!u.xsave)
3024 break;
3025
3026 r = -EFAULT;
3027 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3028 break;
3029
3030 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3031 break;
3032 }
3033 case KVM_GET_XCRS: {
3034 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3035 r = -ENOMEM;
3036 if (!u.xcrs)
3037 break;
3038
3039 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3040
3041 r = -EFAULT;
3042 if (copy_to_user(argp, u.xcrs,
3043 sizeof(struct kvm_xcrs)))
3044 break;
3045 r = 0;
3046 break;
3047 }
3048 case KVM_SET_XCRS: {
3049 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3050 r = -ENOMEM;
3051 if (!u.xcrs)
3052 break;
3053
3054 r = -EFAULT;
3055 if (copy_from_user(u.xcrs, argp,
3056 sizeof(struct kvm_xcrs)))
3057 break;
3058
3059 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3060 break;
3061 }
3062 case KVM_SET_TSC_KHZ: {
3063 u32 user_tsc_khz;
3064
3065 r = -EINVAL;
3066 if (!kvm_has_tsc_control)
3067 break;
3068
3069 user_tsc_khz = (u32)arg;
3070
3071 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3072 goto out;
3073
3074 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3075
3076 r = 0;
3077 goto out;
3078 }
3079 case KVM_GET_TSC_KHZ: {
3080 r = -EIO;
3081 if (check_tsc_unstable())
3082 goto out;
3083
3084 r = vcpu_tsc_khz(vcpu);
3085
3086 goto out;
3087 }
3088 default:
3089 r = -EINVAL;
3090 }
3091 out:
3092 kfree(u.buffer);
3093 return r;
3094 }
3095
3096 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3097 {
3098 int ret;
3099
3100 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3101 return -1;
3102 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3103 return ret;
3104 }
3105
3106 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3107 u64 ident_addr)
3108 {
3109 kvm->arch.ept_identity_map_addr = ident_addr;
3110 return 0;
3111 }
3112
3113 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3114 u32 kvm_nr_mmu_pages)
3115 {
3116 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3117 return -EINVAL;
3118
3119 mutex_lock(&kvm->slots_lock);
3120 spin_lock(&kvm->mmu_lock);
3121
3122 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3123 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3124
3125 spin_unlock(&kvm->mmu_lock);
3126 mutex_unlock(&kvm->slots_lock);
3127 return 0;
3128 }
3129
3130 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3131 {
3132 return kvm->arch.n_max_mmu_pages;
3133 }
3134
3135 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3136 {
3137 int r;
3138
3139 r = 0;
3140 switch (chip->chip_id) {
3141 case KVM_IRQCHIP_PIC_MASTER:
3142 memcpy(&chip->chip.pic,
3143 &pic_irqchip(kvm)->pics[0],
3144 sizeof(struct kvm_pic_state));
3145 break;
3146 case KVM_IRQCHIP_PIC_SLAVE:
3147 memcpy(&chip->chip.pic,
3148 &pic_irqchip(kvm)->pics[1],
3149 sizeof(struct kvm_pic_state));
3150 break;
3151 case KVM_IRQCHIP_IOAPIC:
3152 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3153 break;
3154 default:
3155 r = -EINVAL;
3156 break;
3157 }
3158 return r;
3159 }
3160
3161 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3162 {
3163 int r;
3164
3165 r = 0;
3166 switch (chip->chip_id) {
3167 case KVM_IRQCHIP_PIC_MASTER:
3168 spin_lock(&pic_irqchip(kvm)->lock);
3169 memcpy(&pic_irqchip(kvm)->pics[0],
3170 &chip->chip.pic,
3171 sizeof(struct kvm_pic_state));
3172 spin_unlock(&pic_irqchip(kvm)->lock);
3173 break;
3174 case KVM_IRQCHIP_PIC_SLAVE:
3175 spin_lock(&pic_irqchip(kvm)->lock);
3176 memcpy(&pic_irqchip(kvm)->pics[1],
3177 &chip->chip.pic,
3178 sizeof(struct kvm_pic_state));
3179 spin_unlock(&pic_irqchip(kvm)->lock);
3180 break;
3181 case KVM_IRQCHIP_IOAPIC:
3182 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3183 break;
3184 default:
3185 r = -EINVAL;
3186 break;
3187 }
3188 kvm_pic_update_irq(pic_irqchip(kvm));
3189 return r;
3190 }
3191
3192 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3193 {
3194 int r = 0;
3195
3196 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3197 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3198 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3199 return r;
3200 }
3201
3202 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3203 {
3204 int r = 0;
3205
3206 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3207 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3208 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3209 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3210 return r;
3211 }
3212
3213 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3214 {
3215 int r = 0;
3216
3217 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3218 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3219 sizeof(ps->channels));
3220 ps->flags = kvm->arch.vpit->pit_state.flags;
3221 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3222 memset(&ps->reserved, 0, sizeof(ps->reserved));
3223 return r;
3224 }
3225
3226 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3227 {
3228 int r = 0, start = 0;
3229 u32 prev_legacy, cur_legacy;
3230 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3231 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3232 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3233 if (!prev_legacy && cur_legacy)
3234 start = 1;
3235 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3236 sizeof(kvm->arch.vpit->pit_state.channels));
3237 kvm->arch.vpit->pit_state.flags = ps->flags;
3238 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3239 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3240 return r;
3241 }
3242
3243 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3244 struct kvm_reinject_control *control)
3245 {
3246 if (!kvm->arch.vpit)
3247 return -ENXIO;
3248 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3249 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3250 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3251 return 0;
3252 }
3253
3254 /*
3255 * Get (and clear) the dirty memory log for a memory slot.
3256 */
3257 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3258 struct kvm_dirty_log *log)
3259 {
3260 int r, i;
3261 struct kvm_memory_slot *memslot;
3262 unsigned long n;
3263 unsigned long is_dirty = 0;
3264
3265 mutex_lock(&kvm->slots_lock);
3266
3267 r = -EINVAL;
3268 if (log->slot >= KVM_MEMORY_SLOTS)
3269 goto out;
3270
3271 memslot = &kvm->memslots->memslots[log->slot];
3272 r = -ENOENT;
3273 if (!memslot->dirty_bitmap)
3274 goto out;
3275
3276 n = kvm_dirty_bitmap_bytes(memslot);
3277
3278 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3279 is_dirty = memslot->dirty_bitmap[i];
3280
3281 /* If nothing is dirty, don't bother messing with page tables. */
3282 if (is_dirty) {
3283 struct kvm_memslots *slots, *old_slots;
3284 unsigned long *dirty_bitmap;
3285
3286 dirty_bitmap = memslot->dirty_bitmap_head;
3287 if (memslot->dirty_bitmap == dirty_bitmap)
3288 dirty_bitmap += n / sizeof(long);
3289 memset(dirty_bitmap, 0, n);
3290
3291 r = -ENOMEM;
3292 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3293 if (!slots)
3294 goto out;
3295 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3296 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3297 slots->generation++;
3298
3299 old_slots = kvm->memslots;
3300 rcu_assign_pointer(kvm->memslots, slots);
3301 synchronize_srcu_expedited(&kvm->srcu);
3302 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3303 kfree(old_slots);
3304
3305 spin_lock(&kvm->mmu_lock);
3306 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3307 spin_unlock(&kvm->mmu_lock);
3308
3309 r = -EFAULT;
3310 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3311 goto out;
3312 } else {
3313 r = -EFAULT;
3314 if (clear_user(log->dirty_bitmap, n))
3315 goto out;
3316 }
3317
3318 r = 0;
3319 out:
3320 mutex_unlock(&kvm->slots_lock);
3321 return r;
3322 }
3323
3324 long kvm_arch_vm_ioctl(struct file *filp,
3325 unsigned int ioctl, unsigned long arg)
3326 {
3327 struct kvm *kvm = filp->private_data;
3328 void __user *argp = (void __user *)arg;
3329 int r = -ENOTTY;
3330 /*
3331 * This union makes it completely explicit to gcc-3.x
3332 * that these two variables' stack usage should be
3333 * combined, not added together.
3334 */
3335 union {
3336 struct kvm_pit_state ps;
3337 struct kvm_pit_state2 ps2;
3338 struct kvm_pit_config pit_config;
3339 } u;
3340
3341 switch (ioctl) {
3342 case KVM_SET_TSS_ADDR:
3343 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3344 if (r < 0)
3345 goto out;
3346 break;
3347 case KVM_SET_IDENTITY_MAP_ADDR: {
3348 u64 ident_addr;
3349
3350 r = -EFAULT;
3351 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3352 goto out;
3353 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3354 if (r < 0)
3355 goto out;
3356 break;
3357 }
3358 case KVM_SET_NR_MMU_PAGES:
3359 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3360 if (r)
3361 goto out;
3362 break;
3363 case KVM_GET_NR_MMU_PAGES:
3364 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3365 break;
3366 case KVM_CREATE_IRQCHIP: {
3367 struct kvm_pic *vpic;
3368
3369 mutex_lock(&kvm->lock);
3370 r = -EEXIST;
3371 if (kvm->arch.vpic)
3372 goto create_irqchip_unlock;
3373 r = -ENOMEM;
3374 vpic = kvm_create_pic(kvm);
3375 if (vpic) {
3376 r = kvm_ioapic_init(kvm);
3377 if (r) {
3378 mutex_lock(&kvm->slots_lock);
3379 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3380 &vpic->dev);
3381 mutex_unlock(&kvm->slots_lock);
3382 kfree(vpic);
3383 goto create_irqchip_unlock;
3384 }
3385 } else
3386 goto create_irqchip_unlock;
3387 smp_wmb();
3388 kvm->arch.vpic = vpic;
3389 smp_wmb();
3390 r = kvm_setup_default_irq_routing(kvm);
3391 if (r) {
3392 mutex_lock(&kvm->slots_lock);
3393 mutex_lock(&kvm->irq_lock);
3394 kvm_ioapic_destroy(kvm);
3395 kvm_destroy_pic(kvm);
3396 mutex_unlock(&kvm->irq_lock);
3397 mutex_unlock(&kvm->slots_lock);
3398 }
3399 create_irqchip_unlock:
3400 mutex_unlock(&kvm->lock);
3401 break;
3402 }
3403 case KVM_CREATE_PIT:
3404 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3405 goto create_pit;
3406 case KVM_CREATE_PIT2:
3407 r = -EFAULT;
3408 if (copy_from_user(&u.pit_config, argp,
3409 sizeof(struct kvm_pit_config)))
3410 goto out;
3411 create_pit:
3412 mutex_lock(&kvm->slots_lock);
3413 r = -EEXIST;
3414 if (kvm->arch.vpit)
3415 goto create_pit_unlock;
3416 r = -ENOMEM;
3417 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3418 if (kvm->arch.vpit)
3419 r = 0;
3420 create_pit_unlock:
3421 mutex_unlock(&kvm->slots_lock);
3422 break;
3423 case KVM_IRQ_LINE_STATUS:
3424 case KVM_IRQ_LINE: {
3425 struct kvm_irq_level irq_event;
3426
3427 r = -EFAULT;
3428 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3429 goto out;
3430 r = -ENXIO;
3431 if (irqchip_in_kernel(kvm)) {
3432 __s32 status;
3433 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3434 irq_event.irq, irq_event.level);
3435 if (ioctl == KVM_IRQ_LINE_STATUS) {
3436 r = -EFAULT;
3437 irq_event.status = status;
3438 if (copy_to_user(argp, &irq_event,
3439 sizeof irq_event))
3440 goto out;
3441 }
3442 r = 0;
3443 }
3444 break;
3445 }
3446 case KVM_GET_IRQCHIP: {
3447 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3448 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3449
3450 r = -ENOMEM;
3451 if (!chip)
3452 goto out;
3453 r = -EFAULT;
3454 if (copy_from_user(chip, argp, sizeof *chip))
3455 goto get_irqchip_out;
3456 r = -ENXIO;
3457 if (!irqchip_in_kernel(kvm))
3458 goto get_irqchip_out;
3459 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3460 if (r)
3461 goto get_irqchip_out;
3462 r = -EFAULT;
3463 if (copy_to_user(argp, chip, sizeof *chip))
3464 goto get_irqchip_out;
3465 r = 0;
3466 get_irqchip_out:
3467 kfree(chip);
3468 if (r)
3469 goto out;
3470 break;
3471 }
3472 case KVM_SET_IRQCHIP: {
3473 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3474 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3475
3476 r = -ENOMEM;
3477 if (!chip)
3478 goto out;
3479 r = -EFAULT;
3480 if (copy_from_user(chip, argp, sizeof *chip))
3481 goto set_irqchip_out;
3482 r = -ENXIO;
3483 if (!irqchip_in_kernel(kvm))
3484 goto set_irqchip_out;
3485 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3486 if (r)
3487 goto set_irqchip_out;
3488 r = 0;
3489 set_irqchip_out:
3490 kfree(chip);
3491 if (r)
3492 goto out;
3493 break;
3494 }
3495 case KVM_GET_PIT: {
3496 r = -EFAULT;
3497 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3498 goto out;
3499 r = -ENXIO;
3500 if (!kvm->arch.vpit)
3501 goto out;
3502 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3503 if (r)
3504 goto out;
3505 r = -EFAULT;
3506 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3507 goto out;
3508 r = 0;
3509 break;
3510 }
3511 case KVM_SET_PIT: {
3512 r = -EFAULT;
3513 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3514 goto out;
3515 r = -ENXIO;
3516 if (!kvm->arch.vpit)
3517 goto out;
3518 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3519 if (r)
3520 goto out;
3521 r = 0;
3522 break;
3523 }
3524 case KVM_GET_PIT2: {
3525 r = -ENXIO;
3526 if (!kvm->arch.vpit)
3527 goto out;
3528 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3529 if (r)
3530 goto out;
3531 r = -EFAULT;
3532 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3533 goto out;
3534 r = 0;
3535 break;
3536 }
3537 case KVM_SET_PIT2: {
3538 r = -EFAULT;
3539 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3540 goto out;
3541 r = -ENXIO;
3542 if (!kvm->arch.vpit)
3543 goto out;
3544 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3545 if (r)
3546 goto out;
3547 r = 0;
3548 break;
3549 }
3550 case KVM_REINJECT_CONTROL: {
3551 struct kvm_reinject_control control;
3552 r = -EFAULT;
3553 if (copy_from_user(&control, argp, sizeof(control)))
3554 goto out;
3555 r = kvm_vm_ioctl_reinject(kvm, &control);
3556 if (r)
3557 goto out;
3558 r = 0;
3559 break;
3560 }
3561 case KVM_XEN_HVM_CONFIG: {
3562 r = -EFAULT;
3563 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3564 sizeof(struct kvm_xen_hvm_config)))
3565 goto out;
3566 r = -EINVAL;
3567 if (kvm->arch.xen_hvm_config.flags)
3568 goto out;
3569 r = 0;
3570 break;
3571 }
3572 case KVM_SET_CLOCK: {
3573 struct kvm_clock_data user_ns;
3574 u64 now_ns;
3575 s64 delta;
3576
3577 r = -EFAULT;
3578 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3579 goto out;
3580
3581 r = -EINVAL;
3582 if (user_ns.flags)
3583 goto out;
3584
3585 r = 0;
3586 local_irq_disable();
3587 now_ns = get_kernel_ns();
3588 delta = user_ns.clock - now_ns;
3589 local_irq_enable();
3590 kvm->arch.kvmclock_offset = delta;
3591 break;
3592 }
3593 case KVM_GET_CLOCK: {
3594 struct kvm_clock_data user_ns;
3595 u64 now_ns;
3596
3597 local_irq_disable();
3598 now_ns = get_kernel_ns();
3599 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3600 local_irq_enable();
3601 user_ns.flags = 0;
3602 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3603
3604 r = -EFAULT;
3605 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3606 goto out;
3607 r = 0;
3608 break;
3609 }
3610
3611 default:
3612 ;
3613 }
3614 out:
3615 return r;
3616 }
3617
3618 static void kvm_init_msr_list(void)
3619 {
3620 u32 dummy[2];
3621 unsigned i, j;
3622
3623 /* skip the first msrs in the list. KVM-specific */
3624 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3625 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3626 continue;
3627 if (j < i)
3628 msrs_to_save[j] = msrs_to_save[i];
3629 j++;
3630 }
3631 num_msrs_to_save = j;
3632 }
3633
3634 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3635 const void *v)
3636 {
3637 int handled = 0;
3638 int n;
3639
3640 do {
3641 n = min(len, 8);
3642 if (!(vcpu->arch.apic &&
3643 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3644 && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3645 break;
3646 handled += n;
3647 addr += n;
3648 len -= n;
3649 v += n;
3650 } while (len);
3651
3652 return handled;
3653 }
3654
3655 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3656 {
3657 int handled = 0;
3658 int n;
3659
3660 do {
3661 n = min(len, 8);
3662 if (!(vcpu->arch.apic &&
3663 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3664 && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3665 break;
3666 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3667 handled += n;
3668 addr += n;
3669 len -= n;
3670 v += n;
3671 } while (len);
3672
3673 return handled;
3674 }
3675
3676 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3677 struct kvm_segment *var, int seg)
3678 {
3679 kvm_x86_ops->set_segment(vcpu, var, seg);
3680 }
3681
3682 void kvm_get_segment(struct kvm_vcpu *vcpu,
3683 struct kvm_segment *var, int seg)
3684 {
3685 kvm_x86_ops->get_segment(vcpu, var, seg);
3686 }
3687
3688 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3689 {
3690 return gpa;
3691 }
3692
3693 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3694 {
3695 gpa_t t_gpa;
3696 struct x86_exception exception;
3697
3698 BUG_ON(!mmu_is_nested(vcpu));
3699
3700 /* NPT walks are always user-walks */
3701 access |= PFERR_USER_MASK;
3702 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3703
3704 return t_gpa;
3705 }
3706
3707 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3708 struct x86_exception *exception)
3709 {
3710 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3711 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3712 }
3713
3714 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3715 struct x86_exception *exception)
3716 {
3717 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3718 access |= PFERR_FETCH_MASK;
3719 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3720 }
3721
3722 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3723 struct x86_exception *exception)
3724 {
3725 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3726 access |= PFERR_WRITE_MASK;
3727 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3728 }
3729
3730 /* uses this to access any guest's mapped memory without checking CPL */
3731 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3732 struct x86_exception *exception)
3733 {
3734 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3735 }
3736
3737 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3738 struct kvm_vcpu *vcpu, u32 access,
3739 struct x86_exception *exception)
3740 {
3741 void *data = val;
3742 int r = X86EMUL_CONTINUE;
3743
3744 while (bytes) {
3745 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3746 exception);
3747 unsigned offset = addr & (PAGE_SIZE-1);
3748 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3749 int ret;
3750
3751 if (gpa == UNMAPPED_GVA)
3752 return X86EMUL_PROPAGATE_FAULT;
3753 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3754 if (ret < 0) {
3755 r = X86EMUL_IO_NEEDED;
3756 goto out;
3757 }
3758
3759 bytes -= toread;
3760 data += toread;
3761 addr += toread;
3762 }
3763 out:
3764 return r;
3765 }
3766
3767 /* used for instruction fetching */
3768 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3769 gva_t addr, void *val, unsigned int bytes,
3770 struct x86_exception *exception)
3771 {
3772 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3773 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3774
3775 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3776 access | PFERR_FETCH_MASK,
3777 exception);
3778 }
3779
3780 static int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3781 gva_t addr, void *val, unsigned int bytes,
3782 struct x86_exception *exception)
3783 {
3784 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3785 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3786
3787 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3788 exception);
3789 }
3790
3791 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3792 gva_t addr, void *val, unsigned int bytes,
3793 struct x86_exception *exception)
3794 {
3795 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3796 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3797 }
3798
3799 static int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3800 gva_t addr, void *val,
3801 unsigned int bytes,
3802 struct x86_exception *exception)
3803 {
3804 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3805 void *data = val;
3806 int r = X86EMUL_CONTINUE;
3807
3808 while (bytes) {
3809 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3810 PFERR_WRITE_MASK,
3811 exception);
3812 unsigned offset = addr & (PAGE_SIZE-1);
3813 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3814 int ret;
3815
3816 if (gpa == UNMAPPED_GVA)
3817 return X86EMUL_PROPAGATE_FAULT;
3818 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3819 if (ret < 0) {
3820 r = X86EMUL_IO_NEEDED;
3821 goto out;
3822 }
3823
3824 bytes -= towrite;
3825 data += towrite;
3826 addr += towrite;
3827 }
3828 out:
3829 return r;
3830 }
3831
3832 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3833 unsigned long addr,
3834 void *val,
3835 unsigned int bytes,
3836 struct x86_exception *exception)
3837 {
3838 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3839 gpa_t gpa;
3840 int handled;
3841
3842 if (vcpu->mmio_read_completed) {
3843 memcpy(val, vcpu->mmio_data, bytes);
3844 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3845 vcpu->mmio_phys_addr, *(u64 *)val);
3846 vcpu->mmio_read_completed = 0;
3847 return X86EMUL_CONTINUE;
3848 }
3849
3850 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3851
3852 if (gpa == UNMAPPED_GVA)
3853 return X86EMUL_PROPAGATE_FAULT;
3854
3855 /* For APIC access vmexit */
3856 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3857 goto mmio;
3858
3859 if (kvm_read_guest_virt(ctxt, addr, val, bytes, exception)
3860 == X86EMUL_CONTINUE)
3861 return X86EMUL_CONTINUE;
3862
3863 mmio:
3864 /*
3865 * Is this MMIO handled locally?
3866 */
3867 handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
3868
3869 if (handled == bytes)
3870 return X86EMUL_CONTINUE;
3871
3872 gpa += handled;
3873 bytes -= handled;
3874 val += handled;
3875
3876 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3877
3878 vcpu->mmio_needed = 1;
3879 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3880 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3881 vcpu->mmio_size = bytes;
3882 vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3883 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3884 vcpu->mmio_index = 0;
3885
3886 return X86EMUL_IO_NEEDED;
3887 }
3888
3889 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3890 const void *val, int bytes)
3891 {
3892 int ret;
3893
3894 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3895 if (ret < 0)
3896 return 0;
3897 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3898 return 1;
3899 }
3900
3901 static int emulator_write_emulated_onepage(unsigned long addr,
3902 const void *val,
3903 unsigned int bytes,
3904 struct x86_exception *exception,
3905 struct kvm_vcpu *vcpu)
3906 {
3907 gpa_t gpa;
3908 int handled;
3909
3910 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3911
3912 if (gpa == UNMAPPED_GVA)
3913 return X86EMUL_PROPAGATE_FAULT;
3914
3915 /* For APIC access vmexit */
3916 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3917 goto mmio;
3918
3919 if (emulator_write_phys(vcpu, gpa, val, bytes))
3920 return X86EMUL_CONTINUE;
3921
3922 mmio:
3923 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3924 /*
3925 * Is this MMIO handled locally?
3926 */
3927 handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
3928 if (handled == bytes)
3929 return X86EMUL_CONTINUE;
3930
3931 gpa += handled;
3932 bytes -= handled;
3933 val += handled;
3934
3935 vcpu->mmio_needed = 1;
3936 memcpy(vcpu->mmio_data, val, bytes);
3937 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3938 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3939 vcpu->mmio_size = bytes;
3940 vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3941 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3942 memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3943 vcpu->mmio_index = 0;
3944
3945 return X86EMUL_CONTINUE;
3946 }
3947
3948 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3949 unsigned long addr,
3950 const void *val,
3951 unsigned int bytes,
3952 struct x86_exception *exception)
3953 {
3954 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3955
3956 /* Crossing a page boundary? */
3957 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3958 int rc, now;
3959
3960 now = -addr & ~PAGE_MASK;
3961 rc = emulator_write_emulated_onepage(addr, val, now, exception,
3962 vcpu);
3963 if (rc != X86EMUL_CONTINUE)
3964 return rc;
3965 addr += now;
3966 val += now;
3967 bytes -= now;
3968 }
3969 return emulator_write_emulated_onepage(addr, val, bytes, exception,
3970 vcpu);
3971 }
3972
3973 #define CMPXCHG_TYPE(t, ptr, old, new) \
3974 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3975
3976 #ifdef CONFIG_X86_64
3977 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3978 #else
3979 # define CMPXCHG64(ptr, old, new) \
3980 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3981 #endif
3982
3983 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3984 unsigned long addr,
3985 const void *old,
3986 const void *new,
3987 unsigned int bytes,
3988 struct x86_exception *exception)
3989 {
3990 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3991 gpa_t gpa;
3992 struct page *page;
3993 char *kaddr;
3994 bool exchanged;
3995
3996 /* guests cmpxchg8b have to be emulated atomically */
3997 if (bytes > 8 || (bytes & (bytes - 1)))
3998 goto emul_write;
3999
4000 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4001
4002 if (gpa == UNMAPPED_GVA ||
4003 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4004 goto emul_write;
4005
4006 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4007 goto emul_write;
4008
4009 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4010 if (is_error_page(page)) {
4011 kvm_release_page_clean(page);
4012 goto emul_write;
4013 }
4014
4015 kaddr = kmap_atomic(page, KM_USER0);
4016 kaddr += offset_in_page(gpa);
4017 switch (bytes) {
4018 case 1:
4019 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4020 break;
4021 case 2:
4022 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4023 break;
4024 case 4:
4025 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4026 break;
4027 case 8:
4028 exchanged = CMPXCHG64(kaddr, old, new);
4029 break;
4030 default:
4031 BUG();
4032 }
4033 kunmap_atomic(kaddr, KM_USER0);
4034 kvm_release_page_dirty(page);
4035
4036 if (!exchanged)
4037 return X86EMUL_CMPXCHG_FAILED;
4038
4039 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4040
4041 return X86EMUL_CONTINUE;
4042
4043 emul_write:
4044 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4045
4046 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4047 }
4048
4049 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4050 {
4051 /* TODO: String I/O for in kernel device */
4052 int r;
4053
4054 if (vcpu->arch.pio.in)
4055 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4056 vcpu->arch.pio.size, pd);
4057 else
4058 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4059 vcpu->arch.pio.port, vcpu->arch.pio.size,
4060 pd);
4061 return r;
4062 }
4063
4064
4065 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4066 int size, unsigned short port, void *val,
4067 unsigned int count)
4068 {
4069 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4070
4071 if (vcpu->arch.pio.count)
4072 goto data_avail;
4073
4074 trace_kvm_pio(0, port, size, count);
4075
4076 vcpu->arch.pio.port = port;
4077 vcpu->arch.pio.in = 1;
4078 vcpu->arch.pio.count = count;
4079 vcpu->arch.pio.size = size;
4080
4081 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4082 data_avail:
4083 memcpy(val, vcpu->arch.pio_data, size * count);
4084 vcpu->arch.pio.count = 0;
4085 return 1;
4086 }
4087
4088 vcpu->run->exit_reason = KVM_EXIT_IO;
4089 vcpu->run->io.direction = KVM_EXIT_IO_IN;
4090 vcpu->run->io.size = size;
4091 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4092 vcpu->run->io.count = count;
4093 vcpu->run->io.port = port;
4094
4095 return 0;
4096 }
4097
4098 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4099 int size, unsigned short port,
4100 const void *val, unsigned int count)
4101 {
4102 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4103
4104 trace_kvm_pio(1, port, size, count);
4105
4106 vcpu->arch.pio.port = port;
4107 vcpu->arch.pio.in = 0;
4108 vcpu->arch.pio.count = count;
4109 vcpu->arch.pio.size = size;
4110
4111 memcpy(vcpu->arch.pio_data, val, size * count);
4112
4113 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4114 vcpu->arch.pio.count = 0;
4115 return 1;
4116 }
4117
4118 vcpu->run->exit_reason = KVM_EXIT_IO;
4119 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4120 vcpu->run->io.size = size;
4121 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4122 vcpu->run->io.count = count;
4123 vcpu->run->io.port = port;
4124
4125 return 0;
4126 }
4127
4128 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4129 {
4130 return kvm_x86_ops->get_segment_base(vcpu, seg);
4131 }
4132
4133 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4134 {
4135 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4136 }
4137
4138 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4139 {
4140 if (!need_emulate_wbinvd(vcpu))
4141 return X86EMUL_CONTINUE;
4142
4143 if (kvm_x86_ops->has_wbinvd_exit()) {
4144 int cpu = get_cpu();
4145
4146 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4147 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4148 wbinvd_ipi, NULL, 1);
4149 put_cpu();
4150 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4151 } else
4152 wbinvd();
4153 return X86EMUL_CONTINUE;
4154 }
4155 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4156
4157 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4158 {
4159 kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4160 }
4161
4162 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4163 {
4164 return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4165 }
4166
4167 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4168 {
4169
4170 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4171 }
4172
4173 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4174 {
4175 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4176 }
4177
4178 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4179 {
4180 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4181 unsigned long value;
4182
4183 switch (cr) {
4184 case 0:
4185 value = kvm_read_cr0(vcpu);
4186 break;
4187 case 2:
4188 value = vcpu->arch.cr2;
4189 break;
4190 case 3:
4191 value = kvm_read_cr3(vcpu);
4192 break;
4193 case 4:
4194 value = kvm_read_cr4(vcpu);
4195 break;
4196 case 8:
4197 value = kvm_get_cr8(vcpu);
4198 break;
4199 default:
4200 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4201 return 0;
4202 }
4203
4204 return value;
4205 }
4206
4207 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4208 {
4209 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4210 int res = 0;
4211
4212 switch (cr) {
4213 case 0:
4214 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4215 break;
4216 case 2:
4217 vcpu->arch.cr2 = val;
4218 break;
4219 case 3:
4220 res = kvm_set_cr3(vcpu, val);
4221 break;
4222 case 4:
4223 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4224 break;
4225 case 8:
4226 res = kvm_set_cr8(vcpu, val);
4227 break;
4228 default:
4229 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4230 res = -1;
4231 }
4232
4233 return res;
4234 }
4235
4236 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4237 {
4238 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4239 }
4240
4241 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4242 {
4243 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4244 }
4245
4246 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4247 {
4248 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4249 }
4250
4251 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4252 {
4253 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4254 }
4255
4256 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4257 {
4258 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4259 }
4260
4261 static unsigned long emulator_get_cached_segment_base(
4262 struct x86_emulate_ctxt *ctxt, int seg)
4263 {
4264 return get_segment_base(emul_to_vcpu(ctxt), seg);
4265 }
4266
4267 static bool emulator_get_cached_descriptor(struct x86_emulate_ctxt *ctxt,
4268 struct desc_struct *desc, u32 *base3,
4269 int seg)
4270 {
4271 struct kvm_segment var;
4272
4273 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4274
4275 if (var.unusable)
4276 return false;
4277
4278 if (var.g)
4279 var.limit >>= 12;
4280 set_desc_limit(desc, var.limit);
4281 set_desc_base(desc, (unsigned long)var.base);
4282 #ifdef CONFIG_X86_64
4283 if (base3)
4284 *base3 = var.base >> 32;
4285 #endif
4286 desc->type = var.type;
4287 desc->s = var.s;
4288 desc->dpl = var.dpl;
4289 desc->p = var.present;
4290 desc->avl = var.avl;
4291 desc->l = var.l;
4292 desc->d = var.db;
4293 desc->g = var.g;
4294
4295 return true;
4296 }
4297
4298 static void emulator_set_cached_descriptor(struct x86_emulate_ctxt *ctxt,
4299 struct desc_struct *desc, u32 base3,
4300 int seg)
4301 {
4302 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4303 struct kvm_segment var;
4304
4305 /* needed to preserve selector */
4306 kvm_get_segment(vcpu, &var, seg);
4307
4308 var.base = get_desc_base(desc);
4309 #ifdef CONFIG_X86_64
4310 var.base |= ((u64)base3) << 32;
4311 #endif
4312 var.limit = get_desc_limit(desc);
4313 if (desc->g)
4314 var.limit = (var.limit << 12) | 0xfff;
4315 var.type = desc->type;
4316 var.present = desc->p;
4317 var.dpl = desc->dpl;
4318 var.db = desc->d;
4319 var.s = desc->s;
4320 var.l = desc->l;
4321 var.g = desc->g;
4322 var.avl = desc->avl;
4323 var.present = desc->p;
4324 var.unusable = !var.present;
4325 var.padding = 0;
4326
4327 kvm_set_segment(vcpu, &var, seg);
4328 return;
4329 }
4330
4331 static u16 emulator_get_segment_selector(struct x86_emulate_ctxt *ctxt, int seg)
4332 {
4333 struct kvm_segment kvm_seg;
4334
4335 kvm_get_segment(emul_to_vcpu(ctxt), &kvm_seg, seg);
4336 return kvm_seg.selector;
4337 }
4338
4339 static void emulator_set_segment_selector(struct x86_emulate_ctxt *ctxt,
4340 u16 sel, int seg)
4341 {
4342 struct kvm_segment kvm_seg;
4343
4344 kvm_get_segment(emul_to_vcpu(ctxt), &kvm_seg, seg);
4345 kvm_seg.selector = sel;
4346 kvm_set_segment(emul_to_vcpu(ctxt), &kvm_seg, seg);
4347 }
4348
4349 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4350 u32 msr_index, u64 *pdata)
4351 {
4352 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4353 }
4354
4355 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4356 u32 msr_index, u64 data)
4357 {
4358 return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4359 }
4360
4361 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4362 {
4363 emul_to_vcpu(ctxt)->arch.halt_request = 1;
4364 }
4365
4366 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4367 {
4368 preempt_disable();
4369 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4370 /*
4371 * CR0.TS may reference the host fpu state, not the guest fpu state,
4372 * so it may be clear at this point.
4373 */
4374 clts();
4375 }
4376
4377 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4378 {
4379 preempt_enable();
4380 }
4381
4382 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4383 struct x86_instruction_info *info,
4384 enum x86_intercept_stage stage)
4385 {
4386 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4387 }
4388
4389 static struct x86_emulate_ops emulate_ops = {
4390 .read_std = kvm_read_guest_virt_system,
4391 .write_std = kvm_write_guest_virt_system,
4392 .fetch = kvm_fetch_guest_virt,
4393 .read_emulated = emulator_read_emulated,
4394 .write_emulated = emulator_write_emulated,
4395 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4396 .invlpg = emulator_invlpg,
4397 .pio_in_emulated = emulator_pio_in_emulated,
4398 .pio_out_emulated = emulator_pio_out_emulated,
4399 .get_cached_descriptor = emulator_get_cached_descriptor,
4400 .set_cached_descriptor = emulator_set_cached_descriptor,
4401 .get_segment_selector = emulator_get_segment_selector,
4402 .set_segment_selector = emulator_set_segment_selector,
4403 .get_cached_segment_base = emulator_get_cached_segment_base,
4404 .get_gdt = emulator_get_gdt,
4405 .get_idt = emulator_get_idt,
4406 .set_gdt = emulator_set_gdt,
4407 .set_idt = emulator_set_idt,
4408 .get_cr = emulator_get_cr,
4409 .set_cr = emulator_set_cr,
4410 .cpl = emulator_get_cpl,
4411 .get_dr = emulator_get_dr,
4412 .set_dr = emulator_set_dr,
4413 .set_msr = emulator_set_msr,
4414 .get_msr = emulator_get_msr,
4415 .halt = emulator_halt,
4416 .wbinvd = emulator_wbinvd,
4417 .fix_hypercall = emulator_fix_hypercall,
4418 .get_fpu = emulator_get_fpu,
4419 .put_fpu = emulator_put_fpu,
4420 .intercept = emulator_intercept,
4421 };
4422
4423 static void cache_all_regs(struct kvm_vcpu *vcpu)
4424 {
4425 kvm_register_read(vcpu, VCPU_REGS_RAX);
4426 kvm_register_read(vcpu, VCPU_REGS_RSP);
4427 kvm_register_read(vcpu, VCPU_REGS_RIP);
4428 vcpu->arch.regs_dirty = ~0;
4429 }
4430
4431 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4432 {
4433 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4434 /*
4435 * an sti; sti; sequence only disable interrupts for the first
4436 * instruction. So, if the last instruction, be it emulated or
4437 * not, left the system with the INT_STI flag enabled, it
4438 * means that the last instruction is an sti. We should not
4439 * leave the flag on in this case. The same goes for mov ss
4440 */
4441 if (!(int_shadow & mask))
4442 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4443 }
4444
4445 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4446 {
4447 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4448 if (ctxt->exception.vector == PF_VECTOR)
4449 kvm_propagate_fault(vcpu, &ctxt->exception);
4450 else if (ctxt->exception.error_code_valid)
4451 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4452 ctxt->exception.error_code);
4453 else
4454 kvm_queue_exception(vcpu, ctxt->exception.vector);
4455 }
4456
4457 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4458 {
4459 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4460 int cs_db, cs_l;
4461
4462 cache_all_regs(vcpu);
4463
4464 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4465
4466 vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
4467 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4468 vcpu->arch.emulate_ctxt.mode =
4469 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4470 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4471 ? X86EMUL_MODE_VM86 : cs_l
4472 ? X86EMUL_MODE_PROT64 : cs_db
4473 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4474 vcpu->arch.emulate_ctxt.guest_mode = is_guest_mode(vcpu);
4475 memset(c, 0, sizeof(struct decode_cache));
4476 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4477 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4478 }
4479
4480 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4481 {
4482 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4483 int ret;
4484
4485 init_emulate_ctxt(vcpu);
4486
4487 vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4488 vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4489 vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip +
4490 inc_eip;
4491 ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4492
4493 if (ret != X86EMUL_CONTINUE)
4494 return EMULATE_FAIL;
4495
4496 vcpu->arch.emulate_ctxt.eip = c->eip;
4497 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4498 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4499 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4500
4501 if (irq == NMI_VECTOR)
4502 vcpu->arch.nmi_pending = false;
4503 else
4504 vcpu->arch.interrupt.pending = false;
4505
4506 return EMULATE_DONE;
4507 }
4508 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4509
4510 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4511 {
4512 int r = EMULATE_DONE;
4513
4514 ++vcpu->stat.insn_emulation_fail;
4515 trace_kvm_emulate_insn_failed(vcpu);
4516 if (!is_guest_mode(vcpu)) {
4517 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4518 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4519 vcpu->run->internal.ndata = 0;
4520 r = EMULATE_FAIL;
4521 }
4522 kvm_queue_exception(vcpu, UD_VECTOR);
4523
4524 return r;
4525 }
4526
4527 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4528 {
4529 gpa_t gpa;
4530
4531 if (tdp_enabled)
4532 return false;
4533
4534 /*
4535 * if emulation was due to access to shadowed page table
4536 * and it failed try to unshadow page and re-entetr the
4537 * guest to let CPU execute the instruction.
4538 */
4539 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4540 return true;
4541
4542 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4543
4544 if (gpa == UNMAPPED_GVA)
4545 return true; /* let cpu generate fault */
4546
4547 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4548 return true;
4549
4550 return false;
4551 }
4552
4553 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4554 unsigned long cr2,
4555 int emulation_type,
4556 void *insn,
4557 int insn_len)
4558 {
4559 int r;
4560 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4561 bool writeback = true;
4562
4563 kvm_clear_exception_queue(vcpu);
4564 vcpu->arch.mmio_fault_cr2 = cr2;
4565 /*
4566 * TODO: fix emulate.c to use guest_read/write_register
4567 * instead of direct ->regs accesses, can save hundred cycles
4568 * on Intel for instructions that don't read/change RSP, for
4569 * for example.
4570 */
4571 cache_all_regs(vcpu);
4572
4573 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4574 init_emulate_ctxt(vcpu);
4575 vcpu->arch.emulate_ctxt.interruptibility = 0;
4576 vcpu->arch.emulate_ctxt.have_exception = false;
4577 vcpu->arch.emulate_ctxt.perm_ok = false;
4578
4579 vcpu->arch.emulate_ctxt.only_vendor_specific_insn
4580 = emulation_type & EMULTYPE_TRAP_UD;
4581
4582 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len);
4583
4584 trace_kvm_emulate_insn_start(vcpu);
4585 ++vcpu->stat.insn_emulation;
4586 if (r) {
4587 if (emulation_type & EMULTYPE_TRAP_UD)
4588 return EMULATE_FAIL;
4589 if (reexecute_instruction(vcpu, cr2))
4590 return EMULATE_DONE;
4591 if (emulation_type & EMULTYPE_SKIP)
4592 return EMULATE_FAIL;
4593 return handle_emulation_failure(vcpu);
4594 }
4595 }
4596
4597 if (emulation_type & EMULTYPE_SKIP) {
4598 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4599 return EMULATE_DONE;
4600 }
4601
4602 /* this is needed for vmware backdoor interface to work since it
4603 changes registers values during IO operation */
4604 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4605 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4606 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4607 }
4608
4609 restart:
4610 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4611
4612 if (r == EMULATION_INTERCEPTED)
4613 return EMULATE_DONE;
4614
4615 if (r == EMULATION_FAILED) {
4616 if (reexecute_instruction(vcpu, cr2))
4617 return EMULATE_DONE;
4618
4619 return handle_emulation_failure(vcpu);
4620 }
4621
4622 if (vcpu->arch.emulate_ctxt.have_exception) {
4623 inject_emulated_exception(vcpu);
4624 r = EMULATE_DONE;
4625 } else if (vcpu->arch.pio.count) {
4626 if (!vcpu->arch.pio.in)
4627 vcpu->arch.pio.count = 0;
4628 else
4629 writeback = false;
4630 r = EMULATE_DO_MMIO;
4631 } else if (vcpu->mmio_needed) {
4632 if (!vcpu->mmio_is_write)
4633 writeback = false;
4634 r = EMULATE_DO_MMIO;
4635 } else if (r == EMULATION_RESTART)
4636 goto restart;
4637 else
4638 r = EMULATE_DONE;
4639
4640 if (writeback) {
4641 toggle_interruptibility(vcpu,
4642 vcpu->arch.emulate_ctxt.interruptibility);
4643 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4644 kvm_make_request(KVM_REQ_EVENT, vcpu);
4645 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4646 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4647 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4648 } else
4649 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4650
4651 return r;
4652 }
4653 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4654
4655 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4656 {
4657 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4658 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4659 size, port, &val, 1);
4660 /* do not return to emulator after return from userspace */
4661 vcpu->arch.pio.count = 0;
4662 return ret;
4663 }
4664 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4665
4666 static void tsc_bad(void *info)
4667 {
4668 __this_cpu_write(cpu_tsc_khz, 0);
4669 }
4670
4671 static void tsc_khz_changed(void *data)
4672 {
4673 struct cpufreq_freqs *freq = data;
4674 unsigned long khz = 0;
4675
4676 if (data)
4677 khz = freq->new;
4678 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4679 khz = cpufreq_quick_get(raw_smp_processor_id());
4680 if (!khz)
4681 khz = tsc_khz;
4682 __this_cpu_write(cpu_tsc_khz, khz);
4683 }
4684
4685 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4686 void *data)
4687 {
4688 struct cpufreq_freqs *freq = data;
4689 struct kvm *kvm;
4690 struct kvm_vcpu *vcpu;
4691 int i, send_ipi = 0;
4692
4693 /*
4694 * We allow guests to temporarily run on slowing clocks,
4695 * provided we notify them after, or to run on accelerating
4696 * clocks, provided we notify them before. Thus time never
4697 * goes backwards.
4698 *
4699 * However, we have a problem. We can't atomically update
4700 * the frequency of a given CPU from this function; it is
4701 * merely a notifier, which can be called from any CPU.
4702 * Changing the TSC frequency at arbitrary points in time
4703 * requires a recomputation of local variables related to
4704 * the TSC for each VCPU. We must flag these local variables
4705 * to be updated and be sure the update takes place with the
4706 * new frequency before any guests proceed.
4707 *
4708 * Unfortunately, the combination of hotplug CPU and frequency
4709 * change creates an intractable locking scenario; the order
4710 * of when these callouts happen is undefined with respect to
4711 * CPU hotplug, and they can race with each other. As such,
4712 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4713 * undefined; you can actually have a CPU frequency change take
4714 * place in between the computation of X and the setting of the
4715 * variable. To protect against this problem, all updates of
4716 * the per_cpu tsc_khz variable are done in an interrupt
4717 * protected IPI, and all callers wishing to update the value
4718 * must wait for a synchronous IPI to complete (which is trivial
4719 * if the caller is on the CPU already). This establishes the
4720 * necessary total order on variable updates.
4721 *
4722 * Note that because a guest time update may take place
4723 * anytime after the setting of the VCPU's request bit, the
4724 * correct TSC value must be set before the request. However,
4725 * to ensure the update actually makes it to any guest which
4726 * starts running in hardware virtualization between the set
4727 * and the acquisition of the spinlock, we must also ping the
4728 * CPU after setting the request bit.
4729 *
4730 */
4731
4732 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4733 return 0;
4734 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4735 return 0;
4736
4737 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4738
4739 raw_spin_lock(&kvm_lock);
4740 list_for_each_entry(kvm, &vm_list, vm_list) {
4741 kvm_for_each_vcpu(i, vcpu, kvm) {
4742 if (vcpu->cpu != freq->cpu)
4743 continue;
4744 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4745 if (vcpu->cpu != smp_processor_id())
4746 send_ipi = 1;
4747 }
4748 }
4749 raw_spin_unlock(&kvm_lock);
4750
4751 if (freq->old < freq->new && send_ipi) {
4752 /*
4753 * We upscale the frequency. Must make the guest
4754 * doesn't see old kvmclock values while running with
4755 * the new frequency, otherwise we risk the guest sees
4756 * time go backwards.
4757 *
4758 * In case we update the frequency for another cpu
4759 * (which might be in guest context) send an interrupt
4760 * to kick the cpu out of guest context. Next time
4761 * guest context is entered kvmclock will be updated,
4762 * so the guest will not see stale values.
4763 */
4764 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4765 }
4766 return 0;
4767 }
4768
4769 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4770 .notifier_call = kvmclock_cpufreq_notifier
4771 };
4772
4773 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4774 unsigned long action, void *hcpu)
4775 {
4776 unsigned int cpu = (unsigned long)hcpu;
4777
4778 switch (action) {
4779 case CPU_ONLINE:
4780 case CPU_DOWN_FAILED:
4781 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4782 break;
4783 case CPU_DOWN_PREPARE:
4784 smp_call_function_single(cpu, tsc_bad, NULL, 1);
4785 break;
4786 }
4787 return NOTIFY_OK;
4788 }
4789
4790 static struct notifier_block kvmclock_cpu_notifier_block = {
4791 .notifier_call = kvmclock_cpu_notifier,
4792 .priority = -INT_MAX
4793 };
4794
4795 static void kvm_timer_init(void)
4796 {
4797 int cpu;
4798
4799 max_tsc_khz = tsc_khz;
4800 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4801 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4802 #ifdef CONFIG_CPU_FREQ
4803 struct cpufreq_policy policy;
4804 memset(&policy, 0, sizeof(policy));
4805 cpu = get_cpu();
4806 cpufreq_get_policy(&policy, cpu);
4807 if (policy.cpuinfo.max_freq)
4808 max_tsc_khz = policy.cpuinfo.max_freq;
4809 put_cpu();
4810 #endif
4811 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4812 CPUFREQ_TRANSITION_NOTIFIER);
4813 }
4814 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4815 for_each_online_cpu(cpu)
4816 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4817 }
4818
4819 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4820
4821 static int kvm_is_in_guest(void)
4822 {
4823 return percpu_read(current_vcpu) != NULL;
4824 }
4825
4826 static int kvm_is_user_mode(void)
4827 {
4828 int user_mode = 3;
4829
4830 if (percpu_read(current_vcpu))
4831 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4832
4833 return user_mode != 0;
4834 }
4835
4836 static unsigned long kvm_get_guest_ip(void)
4837 {
4838 unsigned long ip = 0;
4839
4840 if (percpu_read(current_vcpu))
4841 ip = kvm_rip_read(percpu_read(current_vcpu));
4842
4843 return ip;
4844 }
4845
4846 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4847 .is_in_guest = kvm_is_in_guest,
4848 .is_user_mode = kvm_is_user_mode,
4849 .get_guest_ip = kvm_get_guest_ip,
4850 };
4851
4852 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4853 {
4854 percpu_write(current_vcpu, vcpu);
4855 }
4856 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4857
4858 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4859 {
4860 percpu_write(current_vcpu, NULL);
4861 }
4862 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4863
4864 int kvm_arch_init(void *opaque)
4865 {
4866 int r;
4867 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4868
4869 if (kvm_x86_ops) {
4870 printk(KERN_ERR "kvm: already loaded the other module\n");
4871 r = -EEXIST;
4872 goto out;
4873 }
4874
4875 if (!ops->cpu_has_kvm_support()) {
4876 printk(KERN_ERR "kvm: no hardware support\n");
4877 r = -EOPNOTSUPP;
4878 goto out;
4879 }
4880 if (ops->disabled_by_bios()) {
4881 printk(KERN_ERR "kvm: disabled by bios\n");
4882 r = -EOPNOTSUPP;
4883 goto out;
4884 }
4885
4886 r = kvm_mmu_module_init();
4887 if (r)
4888 goto out;
4889
4890 kvm_init_msr_list();
4891
4892 kvm_x86_ops = ops;
4893 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4894 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4895 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4896
4897 kvm_timer_init();
4898
4899 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4900
4901 if (cpu_has_xsave)
4902 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4903
4904 return 0;
4905
4906 out:
4907 return r;
4908 }
4909
4910 void kvm_arch_exit(void)
4911 {
4912 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4913
4914 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4915 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4916 CPUFREQ_TRANSITION_NOTIFIER);
4917 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4918 kvm_x86_ops = NULL;
4919 kvm_mmu_module_exit();
4920 }
4921
4922 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4923 {
4924 ++vcpu->stat.halt_exits;
4925 if (irqchip_in_kernel(vcpu->kvm)) {
4926 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4927 return 1;
4928 } else {
4929 vcpu->run->exit_reason = KVM_EXIT_HLT;
4930 return 0;
4931 }
4932 }
4933 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4934
4935 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4936 unsigned long a1)
4937 {
4938 if (is_long_mode(vcpu))
4939 return a0;
4940 else
4941 return a0 | ((gpa_t)a1 << 32);
4942 }
4943
4944 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4945 {
4946 u64 param, ingpa, outgpa, ret;
4947 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4948 bool fast, longmode;
4949 int cs_db, cs_l;
4950
4951 /*
4952 * hypercall generates UD from non zero cpl and real mode
4953 * per HYPER-V spec
4954 */
4955 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4956 kvm_queue_exception(vcpu, UD_VECTOR);
4957 return 0;
4958 }
4959
4960 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4961 longmode = is_long_mode(vcpu) && cs_l == 1;
4962
4963 if (!longmode) {
4964 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4965 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4966 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4967 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4968 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4969 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4970 }
4971 #ifdef CONFIG_X86_64
4972 else {
4973 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4974 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4975 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4976 }
4977 #endif
4978
4979 code = param & 0xffff;
4980 fast = (param >> 16) & 0x1;
4981 rep_cnt = (param >> 32) & 0xfff;
4982 rep_idx = (param >> 48) & 0xfff;
4983
4984 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4985
4986 switch (code) {
4987 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4988 kvm_vcpu_on_spin(vcpu);
4989 break;
4990 default:
4991 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4992 break;
4993 }
4994
4995 ret = res | (((u64)rep_done & 0xfff) << 32);
4996 if (longmode) {
4997 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4998 } else {
4999 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5000 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5001 }
5002
5003 return 1;
5004 }
5005
5006 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5007 {
5008 unsigned long nr, a0, a1, a2, a3, ret;
5009 int r = 1;
5010
5011 if (kvm_hv_hypercall_enabled(vcpu->kvm))
5012 return kvm_hv_hypercall(vcpu);
5013
5014 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5015 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5016 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5017 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5018 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5019
5020 trace_kvm_hypercall(nr, a0, a1, a2, a3);
5021
5022 if (!is_long_mode(vcpu)) {
5023 nr &= 0xFFFFFFFF;
5024 a0 &= 0xFFFFFFFF;
5025 a1 &= 0xFFFFFFFF;
5026 a2 &= 0xFFFFFFFF;
5027 a3 &= 0xFFFFFFFF;
5028 }
5029
5030 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5031 ret = -KVM_EPERM;
5032 goto out;
5033 }
5034
5035 switch (nr) {
5036 case KVM_HC_VAPIC_POLL_IRQ:
5037 ret = 0;
5038 break;
5039 case KVM_HC_MMU_OP:
5040 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5041 break;
5042 default:
5043 ret = -KVM_ENOSYS;
5044 break;
5045 }
5046 out:
5047 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5048 ++vcpu->stat.hypercalls;
5049 return r;
5050 }
5051 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5052
5053 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5054 {
5055 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5056 char instruction[3];
5057 unsigned long rip = kvm_rip_read(vcpu);
5058
5059 /*
5060 * Blow out the MMU to ensure that no other VCPU has an active mapping
5061 * to ensure that the updated hypercall appears atomically across all
5062 * VCPUs.
5063 */
5064 kvm_mmu_zap_all(vcpu->kvm);
5065
5066 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5067
5068 return emulator_write_emulated(&vcpu->arch.emulate_ctxt,
5069 rip, instruction, 3, NULL);
5070 }
5071
5072 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5073 {
5074 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5075 int j, nent = vcpu->arch.cpuid_nent;
5076
5077 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5078 /* when no next entry is found, the current entry[i] is reselected */
5079 for (j = i + 1; ; j = (j + 1) % nent) {
5080 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5081 if (ej->function == e->function) {
5082 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5083 return j;
5084 }
5085 }
5086 return 0; /* silence gcc, even though control never reaches here */
5087 }
5088
5089 /* find an entry with matching function, matching index (if needed), and that
5090 * should be read next (if it's stateful) */
5091 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5092 u32 function, u32 index)
5093 {
5094 if (e->function != function)
5095 return 0;
5096 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5097 return 0;
5098 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5099 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5100 return 0;
5101 return 1;
5102 }
5103
5104 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5105 u32 function, u32 index)
5106 {
5107 int i;
5108 struct kvm_cpuid_entry2 *best = NULL;
5109
5110 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5111 struct kvm_cpuid_entry2 *e;
5112
5113 e = &vcpu->arch.cpuid_entries[i];
5114 if (is_matching_cpuid_entry(e, function, index)) {
5115 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5116 move_to_next_stateful_cpuid_entry(vcpu, i);
5117 best = e;
5118 break;
5119 }
5120 }
5121 return best;
5122 }
5123 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5124
5125 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5126 {
5127 struct kvm_cpuid_entry2 *best;
5128
5129 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5130 if (!best || best->eax < 0x80000008)
5131 goto not_found;
5132 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5133 if (best)
5134 return best->eax & 0xff;
5135 not_found:
5136 return 36;
5137 }
5138
5139 /*
5140 * If no match is found, check whether we exceed the vCPU's limit
5141 * and return the content of the highest valid _standard_ leaf instead.
5142 * This is to satisfy the CPUID specification.
5143 */
5144 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5145 u32 function, u32 index)
5146 {
5147 struct kvm_cpuid_entry2 *maxlevel;
5148
5149 maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5150 if (!maxlevel || maxlevel->eax >= function)
5151 return NULL;
5152 if (function & 0x80000000) {
5153 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5154 if (!maxlevel)
5155 return NULL;
5156 }
5157 return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5158 }
5159
5160 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5161 {
5162 u32 function, index;
5163 struct kvm_cpuid_entry2 *best;
5164
5165 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5166 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5167 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5168 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5169 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5170 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5171 best = kvm_find_cpuid_entry(vcpu, function, index);
5172
5173 if (!best)
5174 best = check_cpuid_limit(vcpu, function, index);
5175
5176 if (best) {
5177 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5178 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5179 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5180 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5181 }
5182 kvm_x86_ops->skip_emulated_instruction(vcpu);
5183 trace_kvm_cpuid(function,
5184 kvm_register_read(vcpu, VCPU_REGS_RAX),
5185 kvm_register_read(vcpu, VCPU_REGS_RBX),
5186 kvm_register_read(vcpu, VCPU_REGS_RCX),
5187 kvm_register_read(vcpu, VCPU_REGS_RDX));
5188 }
5189 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5190
5191 /*
5192 * Check if userspace requested an interrupt window, and that the
5193 * interrupt window is open.
5194 *
5195 * No need to exit to userspace if we already have an interrupt queued.
5196 */
5197 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5198 {
5199 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5200 vcpu->run->request_interrupt_window &&
5201 kvm_arch_interrupt_allowed(vcpu));
5202 }
5203
5204 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5205 {
5206 struct kvm_run *kvm_run = vcpu->run;
5207
5208 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5209 kvm_run->cr8 = kvm_get_cr8(vcpu);
5210 kvm_run->apic_base = kvm_get_apic_base(vcpu);
5211 if (irqchip_in_kernel(vcpu->kvm))
5212 kvm_run->ready_for_interrupt_injection = 1;
5213 else
5214 kvm_run->ready_for_interrupt_injection =
5215 kvm_arch_interrupt_allowed(vcpu) &&
5216 !kvm_cpu_has_interrupt(vcpu) &&
5217 !kvm_event_needs_reinjection(vcpu);
5218 }
5219
5220 static void vapic_enter(struct kvm_vcpu *vcpu)
5221 {
5222 struct kvm_lapic *apic = vcpu->arch.apic;
5223 struct page *page;
5224
5225 if (!apic || !apic->vapic_addr)
5226 return;
5227
5228 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5229
5230 vcpu->arch.apic->vapic_page = page;
5231 }
5232
5233 static void vapic_exit(struct kvm_vcpu *vcpu)
5234 {
5235 struct kvm_lapic *apic = vcpu->arch.apic;
5236 int idx;
5237
5238 if (!apic || !apic->vapic_addr)
5239 return;
5240
5241 idx = srcu_read_lock(&vcpu->kvm->srcu);
5242 kvm_release_page_dirty(apic->vapic_page);
5243 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5244 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5245 }
5246
5247 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5248 {
5249 int max_irr, tpr;
5250
5251 if (!kvm_x86_ops->update_cr8_intercept)
5252 return;
5253
5254 if (!vcpu->arch.apic)
5255 return;
5256
5257 if (!vcpu->arch.apic->vapic_addr)
5258 max_irr = kvm_lapic_find_highest_irr(vcpu);
5259 else
5260 max_irr = -1;
5261
5262 if (max_irr != -1)
5263 max_irr >>= 4;
5264
5265 tpr = kvm_lapic_get_cr8(vcpu);
5266
5267 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5268 }
5269
5270 static void inject_pending_event(struct kvm_vcpu *vcpu)
5271 {
5272 /* try to reinject previous events if any */
5273 if (vcpu->arch.exception.pending) {
5274 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5275 vcpu->arch.exception.has_error_code,
5276 vcpu->arch.exception.error_code);
5277 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5278 vcpu->arch.exception.has_error_code,
5279 vcpu->arch.exception.error_code,
5280 vcpu->arch.exception.reinject);
5281 return;
5282 }
5283
5284 if (vcpu->arch.nmi_injected) {
5285 kvm_x86_ops->set_nmi(vcpu);
5286 return;
5287 }
5288
5289 if (vcpu->arch.interrupt.pending) {
5290 kvm_x86_ops->set_irq(vcpu);
5291 return;
5292 }
5293
5294 /* try to inject new event if pending */
5295 if (vcpu->arch.nmi_pending) {
5296 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5297 vcpu->arch.nmi_pending = false;
5298 vcpu->arch.nmi_injected = true;
5299 kvm_x86_ops->set_nmi(vcpu);
5300 }
5301 } else if (kvm_cpu_has_interrupt(vcpu)) {
5302 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5303 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5304 false);
5305 kvm_x86_ops->set_irq(vcpu);
5306 }
5307 }
5308 }
5309
5310 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5311 {
5312 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5313 !vcpu->guest_xcr0_loaded) {
5314 /* kvm_set_xcr() also depends on this */
5315 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5316 vcpu->guest_xcr0_loaded = 1;
5317 }
5318 }
5319
5320 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5321 {
5322 if (vcpu->guest_xcr0_loaded) {
5323 if (vcpu->arch.xcr0 != host_xcr0)
5324 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5325 vcpu->guest_xcr0_loaded = 0;
5326 }
5327 }
5328
5329 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5330 {
5331 int r;
5332 bool nmi_pending;
5333 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5334 vcpu->run->request_interrupt_window;
5335
5336 if (vcpu->requests) {
5337 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5338 kvm_mmu_unload(vcpu);
5339 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5340 __kvm_migrate_timers(vcpu);
5341 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5342 r = kvm_guest_time_update(vcpu);
5343 if (unlikely(r))
5344 goto out;
5345 }
5346 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5347 kvm_mmu_sync_roots(vcpu);
5348 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5349 kvm_x86_ops->tlb_flush(vcpu);
5350 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5351 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5352 r = 0;
5353 goto out;
5354 }
5355 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5356 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5357 r = 0;
5358 goto out;
5359 }
5360 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5361 vcpu->fpu_active = 0;
5362 kvm_x86_ops->fpu_deactivate(vcpu);
5363 }
5364 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5365 /* Page is swapped out. Do synthetic halt */
5366 vcpu->arch.apf.halted = true;
5367 r = 1;
5368 goto out;
5369 }
5370 }
5371
5372 r = kvm_mmu_reload(vcpu);
5373 if (unlikely(r))
5374 goto out;
5375
5376 /*
5377 * An NMI can be injected between local nmi_pending read and
5378 * vcpu->arch.nmi_pending read inside inject_pending_event().
5379 * But in that case, KVM_REQ_EVENT will be set, which makes
5380 * the race described above benign.
5381 */
5382 nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5383
5384 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5385 inject_pending_event(vcpu);
5386
5387 /* enable NMI/IRQ window open exits if needed */
5388 if (nmi_pending)
5389 kvm_x86_ops->enable_nmi_window(vcpu);
5390 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5391 kvm_x86_ops->enable_irq_window(vcpu);
5392
5393 if (kvm_lapic_enabled(vcpu)) {
5394 update_cr8_intercept(vcpu);
5395 kvm_lapic_sync_to_vapic(vcpu);
5396 }
5397 }
5398
5399 preempt_disable();
5400
5401 kvm_x86_ops->prepare_guest_switch(vcpu);
5402 if (vcpu->fpu_active)
5403 kvm_load_guest_fpu(vcpu);
5404 kvm_load_guest_xcr0(vcpu);
5405
5406 vcpu->mode = IN_GUEST_MODE;
5407
5408 /* We should set ->mode before check ->requests,
5409 * see the comment in make_all_cpus_request.
5410 */
5411 smp_mb();
5412
5413 local_irq_disable();
5414
5415 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5416 || need_resched() || signal_pending(current)) {
5417 vcpu->mode = OUTSIDE_GUEST_MODE;
5418 smp_wmb();
5419 local_irq_enable();
5420 preempt_enable();
5421 kvm_x86_ops->cancel_injection(vcpu);
5422 r = 1;
5423 goto out;
5424 }
5425
5426 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5427
5428 kvm_guest_enter();
5429
5430 if (unlikely(vcpu->arch.switch_db_regs)) {
5431 set_debugreg(0, 7);
5432 set_debugreg(vcpu->arch.eff_db[0], 0);
5433 set_debugreg(vcpu->arch.eff_db[1], 1);
5434 set_debugreg(vcpu->arch.eff_db[2], 2);
5435 set_debugreg(vcpu->arch.eff_db[3], 3);
5436 }
5437
5438 trace_kvm_entry(vcpu->vcpu_id);
5439 kvm_x86_ops->run(vcpu);
5440
5441 /*
5442 * If the guest has used debug registers, at least dr7
5443 * will be disabled while returning to the host.
5444 * If we don't have active breakpoints in the host, we don't
5445 * care about the messed up debug address registers. But if
5446 * we have some of them active, restore the old state.
5447 */
5448 if (hw_breakpoint_active())
5449 hw_breakpoint_restore();
5450
5451 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5452
5453 vcpu->mode = OUTSIDE_GUEST_MODE;
5454 smp_wmb();
5455 local_irq_enable();
5456
5457 ++vcpu->stat.exits;
5458
5459 /*
5460 * We must have an instruction between local_irq_enable() and
5461 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5462 * the interrupt shadow. The stat.exits increment will do nicely.
5463 * But we need to prevent reordering, hence this barrier():
5464 */
5465 barrier();
5466
5467 kvm_guest_exit();
5468
5469 preempt_enable();
5470
5471 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5472
5473 /*
5474 * Profile KVM exit RIPs:
5475 */
5476 if (unlikely(prof_on == KVM_PROFILING)) {
5477 unsigned long rip = kvm_rip_read(vcpu);
5478 profile_hit(KVM_PROFILING, (void *)rip);
5479 }
5480
5481
5482 kvm_lapic_sync_from_vapic(vcpu);
5483
5484 r = kvm_x86_ops->handle_exit(vcpu);
5485 out:
5486 return r;
5487 }
5488
5489
5490 static int __vcpu_run(struct kvm_vcpu *vcpu)
5491 {
5492 int r;
5493 struct kvm *kvm = vcpu->kvm;
5494
5495 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5496 pr_debug("vcpu %d received sipi with vector # %x\n",
5497 vcpu->vcpu_id, vcpu->arch.sipi_vector);
5498 kvm_lapic_reset(vcpu);
5499 r = kvm_arch_vcpu_reset(vcpu);
5500 if (r)
5501 return r;
5502 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5503 }
5504
5505 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5506 vapic_enter(vcpu);
5507
5508 r = 1;
5509 while (r > 0) {
5510 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5511 !vcpu->arch.apf.halted)
5512 r = vcpu_enter_guest(vcpu);
5513 else {
5514 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5515 kvm_vcpu_block(vcpu);
5516 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5517 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5518 {
5519 switch(vcpu->arch.mp_state) {
5520 case KVM_MP_STATE_HALTED:
5521 vcpu->arch.mp_state =
5522 KVM_MP_STATE_RUNNABLE;
5523 case KVM_MP_STATE_RUNNABLE:
5524 vcpu->arch.apf.halted = false;
5525 break;
5526 case KVM_MP_STATE_SIPI_RECEIVED:
5527 default:
5528 r = -EINTR;
5529 break;
5530 }
5531 }
5532 }
5533
5534 if (r <= 0)
5535 break;
5536
5537 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5538 if (kvm_cpu_has_pending_timer(vcpu))
5539 kvm_inject_pending_timer_irqs(vcpu);
5540
5541 if (dm_request_for_irq_injection(vcpu)) {
5542 r = -EINTR;
5543 vcpu->run->exit_reason = KVM_EXIT_INTR;
5544 ++vcpu->stat.request_irq_exits;
5545 }
5546
5547 kvm_check_async_pf_completion(vcpu);
5548
5549 if (signal_pending(current)) {
5550 r = -EINTR;
5551 vcpu->run->exit_reason = KVM_EXIT_INTR;
5552 ++vcpu->stat.signal_exits;
5553 }
5554 if (need_resched()) {
5555 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5556 kvm_resched(vcpu);
5557 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5558 }
5559 }
5560
5561 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5562
5563 vapic_exit(vcpu);
5564
5565 return r;
5566 }
5567
5568 static int complete_mmio(struct kvm_vcpu *vcpu)
5569 {
5570 struct kvm_run *run = vcpu->run;
5571 int r;
5572
5573 if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5574 return 1;
5575
5576 if (vcpu->mmio_needed) {
5577 vcpu->mmio_needed = 0;
5578 if (!vcpu->mmio_is_write)
5579 memcpy(vcpu->mmio_data, run->mmio.data, 8);
5580 vcpu->mmio_index += 8;
5581 if (vcpu->mmio_index < vcpu->mmio_size) {
5582 run->exit_reason = KVM_EXIT_MMIO;
5583 run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5584 memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5585 run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5586 run->mmio.is_write = vcpu->mmio_is_write;
5587 vcpu->mmio_needed = 1;
5588 return 0;
5589 }
5590 if (vcpu->mmio_is_write)
5591 return 1;
5592 vcpu->mmio_read_completed = 1;
5593 }
5594 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5595 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5596 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5597 if (r != EMULATE_DONE)
5598 return 0;
5599 return 1;
5600 }
5601
5602 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5603 {
5604 int r;
5605 sigset_t sigsaved;
5606
5607 if (!tsk_used_math(current) && init_fpu(current))
5608 return -ENOMEM;
5609
5610 if (vcpu->sigset_active)
5611 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5612
5613 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5614 kvm_vcpu_block(vcpu);
5615 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5616 r = -EAGAIN;
5617 goto out;
5618 }
5619
5620 /* re-sync apic's tpr */
5621 if (!irqchip_in_kernel(vcpu->kvm)) {
5622 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5623 r = -EINVAL;
5624 goto out;
5625 }
5626 }
5627
5628 r = complete_mmio(vcpu);
5629 if (r <= 0)
5630 goto out;
5631
5632 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5633 kvm_register_write(vcpu, VCPU_REGS_RAX,
5634 kvm_run->hypercall.ret);
5635
5636 r = __vcpu_run(vcpu);
5637
5638 out:
5639 post_kvm_run_save(vcpu);
5640 if (vcpu->sigset_active)
5641 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5642
5643 return r;
5644 }
5645
5646 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5647 {
5648 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5649 /*
5650 * We are here if userspace calls get_regs() in the middle of
5651 * instruction emulation. Registers state needs to be copied
5652 * back from emulation context to vcpu. Usrapace shouldn't do
5653 * that usually, but some bad designed PV devices (vmware
5654 * backdoor interface) need this to work
5655 */
5656 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5657 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5658 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5659 }
5660 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5661 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5662 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5663 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5664 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5665 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5666 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5667 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5668 #ifdef CONFIG_X86_64
5669 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5670 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5671 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5672 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5673 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5674 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5675 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5676 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5677 #endif
5678
5679 regs->rip = kvm_rip_read(vcpu);
5680 regs->rflags = kvm_get_rflags(vcpu);
5681
5682 return 0;
5683 }
5684
5685 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5686 {
5687 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5688 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5689
5690 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5691 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5692 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5693 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5694 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5695 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5696 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5697 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5698 #ifdef CONFIG_X86_64
5699 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5700 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5701 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5702 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5703 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5704 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5705 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5706 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5707 #endif
5708
5709 kvm_rip_write(vcpu, regs->rip);
5710 kvm_set_rflags(vcpu, regs->rflags);
5711
5712 vcpu->arch.exception.pending = false;
5713
5714 kvm_make_request(KVM_REQ_EVENT, vcpu);
5715
5716 return 0;
5717 }
5718
5719 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5720 {
5721 struct kvm_segment cs;
5722
5723 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5724 *db = cs.db;
5725 *l = cs.l;
5726 }
5727 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5728
5729 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5730 struct kvm_sregs *sregs)
5731 {
5732 struct desc_ptr dt;
5733
5734 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5735 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5736 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5737 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5738 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5739 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5740
5741 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5742 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5743
5744 kvm_x86_ops->get_idt(vcpu, &dt);
5745 sregs->idt.limit = dt.size;
5746 sregs->idt.base = dt.address;
5747 kvm_x86_ops->get_gdt(vcpu, &dt);
5748 sregs->gdt.limit = dt.size;
5749 sregs->gdt.base = dt.address;
5750
5751 sregs->cr0 = kvm_read_cr0(vcpu);
5752 sregs->cr2 = vcpu->arch.cr2;
5753 sregs->cr3 = kvm_read_cr3(vcpu);
5754 sregs->cr4 = kvm_read_cr4(vcpu);
5755 sregs->cr8 = kvm_get_cr8(vcpu);
5756 sregs->efer = vcpu->arch.efer;
5757 sregs->apic_base = kvm_get_apic_base(vcpu);
5758
5759 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5760
5761 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5762 set_bit(vcpu->arch.interrupt.nr,
5763 (unsigned long *)sregs->interrupt_bitmap);
5764
5765 return 0;
5766 }
5767
5768 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5769 struct kvm_mp_state *mp_state)
5770 {
5771 mp_state->mp_state = vcpu->arch.mp_state;
5772 return 0;
5773 }
5774
5775 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5776 struct kvm_mp_state *mp_state)
5777 {
5778 vcpu->arch.mp_state = mp_state->mp_state;
5779 kvm_make_request(KVM_REQ_EVENT, vcpu);
5780 return 0;
5781 }
5782
5783 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5784 bool has_error_code, u32 error_code)
5785 {
5786 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5787 int ret;
5788
5789 init_emulate_ctxt(vcpu);
5790
5791 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5792 tss_selector, reason, has_error_code,
5793 error_code);
5794
5795 if (ret)
5796 return EMULATE_FAIL;
5797
5798 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5799 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5800 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5801 kvm_make_request(KVM_REQ_EVENT, vcpu);
5802 return EMULATE_DONE;
5803 }
5804 EXPORT_SYMBOL_GPL(kvm_task_switch);
5805
5806 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5807 struct kvm_sregs *sregs)
5808 {
5809 int mmu_reset_needed = 0;
5810 int pending_vec, max_bits, idx;
5811 struct desc_ptr dt;
5812
5813 dt.size = sregs->idt.limit;
5814 dt.address = sregs->idt.base;
5815 kvm_x86_ops->set_idt(vcpu, &dt);
5816 dt.size = sregs->gdt.limit;
5817 dt.address = sregs->gdt.base;
5818 kvm_x86_ops->set_gdt(vcpu, &dt);
5819
5820 vcpu->arch.cr2 = sregs->cr2;
5821 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5822 vcpu->arch.cr3 = sregs->cr3;
5823 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5824
5825 kvm_set_cr8(vcpu, sregs->cr8);
5826
5827 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5828 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5829 kvm_set_apic_base(vcpu, sregs->apic_base);
5830
5831 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5832 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5833 vcpu->arch.cr0 = sregs->cr0;
5834
5835 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5836 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5837 if (sregs->cr4 & X86_CR4_OSXSAVE)
5838 update_cpuid(vcpu);
5839
5840 idx = srcu_read_lock(&vcpu->kvm->srcu);
5841 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5842 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5843 mmu_reset_needed = 1;
5844 }
5845 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5846
5847 if (mmu_reset_needed)
5848 kvm_mmu_reset_context(vcpu);
5849
5850 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5851 pending_vec = find_first_bit(
5852 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5853 if (pending_vec < max_bits) {
5854 kvm_queue_interrupt(vcpu, pending_vec, false);
5855 pr_debug("Set back pending irq %d\n", pending_vec);
5856 }
5857
5858 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5859 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5860 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5861 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5862 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5863 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5864
5865 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5866 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5867
5868 update_cr8_intercept(vcpu);
5869
5870 /* Older userspace won't unhalt the vcpu on reset. */
5871 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5872 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5873 !is_protmode(vcpu))
5874 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5875
5876 kvm_make_request(KVM_REQ_EVENT, vcpu);
5877
5878 return 0;
5879 }
5880
5881 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5882 struct kvm_guest_debug *dbg)
5883 {
5884 unsigned long rflags;
5885 int i, r;
5886
5887 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5888 r = -EBUSY;
5889 if (vcpu->arch.exception.pending)
5890 goto out;
5891 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5892 kvm_queue_exception(vcpu, DB_VECTOR);
5893 else
5894 kvm_queue_exception(vcpu, BP_VECTOR);
5895 }
5896
5897 /*
5898 * Read rflags as long as potentially injected trace flags are still
5899 * filtered out.
5900 */
5901 rflags = kvm_get_rflags(vcpu);
5902
5903 vcpu->guest_debug = dbg->control;
5904 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5905 vcpu->guest_debug = 0;
5906
5907 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5908 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5909 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5910 vcpu->arch.switch_db_regs =
5911 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5912 } else {
5913 for (i = 0; i < KVM_NR_DB_REGS; i++)
5914 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5915 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5916 }
5917
5918 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5919 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5920 get_segment_base(vcpu, VCPU_SREG_CS);
5921
5922 /*
5923 * Trigger an rflags update that will inject or remove the trace
5924 * flags.
5925 */
5926 kvm_set_rflags(vcpu, rflags);
5927
5928 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5929
5930 r = 0;
5931
5932 out:
5933
5934 return r;
5935 }
5936
5937 /*
5938 * Translate a guest virtual address to a guest physical address.
5939 */
5940 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5941 struct kvm_translation *tr)
5942 {
5943 unsigned long vaddr = tr->linear_address;
5944 gpa_t gpa;
5945 int idx;
5946
5947 idx = srcu_read_lock(&vcpu->kvm->srcu);
5948 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5949 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5950 tr->physical_address = gpa;
5951 tr->valid = gpa != UNMAPPED_GVA;
5952 tr->writeable = 1;
5953 tr->usermode = 0;
5954
5955 return 0;
5956 }
5957
5958 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5959 {
5960 struct i387_fxsave_struct *fxsave =
5961 &vcpu->arch.guest_fpu.state->fxsave;
5962
5963 memcpy(fpu->fpr, fxsave->st_space, 128);
5964 fpu->fcw = fxsave->cwd;
5965 fpu->fsw = fxsave->swd;
5966 fpu->ftwx = fxsave->twd;
5967 fpu->last_opcode = fxsave->fop;
5968 fpu->last_ip = fxsave->rip;
5969 fpu->last_dp = fxsave->rdp;
5970 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5971
5972 return 0;
5973 }
5974
5975 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5976 {
5977 struct i387_fxsave_struct *fxsave =
5978 &vcpu->arch.guest_fpu.state->fxsave;
5979
5980 memcpy(fxsave->st_space, fpu->fpr, 128);
5981 fxsave->cwd = fpu->fcw;
5982 fxsave->swd = fpu->fsw;
5983 fxsave->twd = fpu->ftwx;
5984 fxsave->fop = fpu->last_opcode;
5985 fxsave->rip = fpu->last_ip;
5986 fxsave->rdp = fpu->last_dp;
5987 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5988
5989 return 0;
5990 }
5991
5992 int fx_init(struct kvm_vcpu *vcpu)
5993 {
5994 int err;
5995
5996 err = fpu_alloc(&vcpu->arch.guest_fpu);
5997 if (err)
5998 return err;
5999
6000 fpu_finit(&vcpu->arch.guest_fpu);
6001
6002 /*
6003 * Ensure guest xcr0 is valid for loading
6004 */
6005 vcpu->arch.xcr0 = XSTATE_FP;
6006
6007 vcpu->arch.cr0 |= X86_CR0_ET;
6008
6009 return 0;
6010 }
6011 EXPORT_SYMBOL_GPL(fx_init);
6012
6013 static void fx_free(struct kvm_vcpu *vcpu)
6014 {
6015 fpu_free(&vcpu->arch.guest_fpu);
6016 }
6017
6018 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6019 {
6020 if (vcpu->guest_fpu_loaded)
6021 return;
6022
6023 /*
6024 * Restore all possible states in the guest,
6025 * and assume host would use all available bits.
6026 * Guest xcr0 would be loaded later.
6027 */
6028 kvm_put_guest_xcr0(vcpu);
6029 vcpu->guest_fpu_loaded = 1;
6030 unlazy_fpu(current);
6031 fpu_restore_checking(&vcpu->arch.guest_fpu);
6032 trace_kvm_fpu(1);
6033 }
6034
6035 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6036 {
6037 kvm_put_guest_xcr0(vcpu);
6038
6039 if (!vcpu->guest_fpu_loaded)
6040 return;
6041
6042 vcpu->guest_fpu_loaded = 0;
6043 fpu_save_init(&vcpu->arch.guest_fpu);
6044 ++vcpu->stat.fpu_reload;
6045 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6046 trace_kvm_fpu(0);
6047 }
6048
6049 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6050 {
6051 kvmclock_reset(vcpu);
6052
6053 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6054 fx_free(vcpu);
6055 kvm_x86_ops->vcpu_free(vcpu);
6056 }
6057
6058 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6059 unsigned int id)
6060 {
6061 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6062 printk_once(KERN_WARNING
6063 "kvm: SMP vm created on host with unstable TSC; "
6064 "guest TSC will not be reliable\n");
6065 return kvm_x86_ops->vcpu_create(kvm, id);
6066 }
6067
6068 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6069 {
6070 int r;
6071
6072 vcpu->arch.mtrr_state.have_fixed = 1;
6073 vcpu_load(vcpu);
6074 r = kvm_arch_vcpu_reset(vcpu);
6075 if (r == 0)
6076 r = kvm_mmu_setup(vcpu);
6077 vcpu_put(vcpu);
6078 if (r < 0)
6079 goto free_vcpu;
6080
6081 return 0;
6082 free_vcpu:
6083 kvm_x86_ops->vcpu_free(vcpu);
6084 return r;
6085 }
6086
6087 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6088 {
6089 vcpu->arch.apf.msr_val = 0;
6090
6091 vcpu_load(vcpu);
6092 kvm_mmu_unload(vcpu);
6093 vcpu_put(vcpu);
6094
6095 fx_free(vcpu);
6096 kvm_x86_ops->vcpu_free(vcpu);
6097 }
6098
6099 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6100 {
6101 vcpu->arch.nmi_pending = false;
6102 vcpu->arch.nmi_injected = false;
6103
6104 vcpu->arch.switch_db_regs = 0;
6105 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6106 vcpu->arch.dr6 = DR6_FIXED_1;
6107 vcpu->arch.dr7 = DR7_FIXED_1;
6108
6109 kvm_make_request(KVM_REQ_EVENT, vcpu);
6110 vcpu->arch.apf.msr_val = 0;
6111
6112 kvmclock_reset(vcpu);
6113
6114 kvm_clear_async_pf_completion_queue(vcpu);
6115 kvm_async_pf_hash_reset(vcpu);
6116 vcpu->arch.apf.halted = false;
6117
6118 return kvm_x86_ops->vcpu_reset(vcpu);
6119 }
6120
6121 int kvm_arch_hardware_enable(void *garbage)
6122 {
6123 struct kvm *kvm;
6124 struct kvm_vcpu *vcpu;
6125 int i;
6126
6127 kvm_shared_msr_cpu_online();
6128 list_for_each_entry(kvm, &vm_list, vm_list)
6129 kvm_for_each_vcpu(i, vcpu, kvm)
6130 if (vcpu->cpu == smp_processor_id())
6131 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6132 return kvm_x86_ops->hardware_enable(garbage);
6133 }
6134
6135 void kvm_arch_hardware_disable(void *garbage)
6136 {
6137 kvm_x86_ops->hardware_disable(garbage);
6138 drop_user_return_notifiers(garbage);
6139 }
6140
6141 int kvm_arch_hardware_setup(void)
6142 {
6143 return kvm_x86_ops->hardware_setup();
6144 }
6145
6146 void kvm_arch_hardware_unsetup(void)
6147 {
6148 kvm_x86_ops->hardware_unsetup();
6149 }
6150
6151 void kvm_arch_check_processor_compat(void *rtn)
6152 {
6153 kvm_x86_ops->check_processor_compatibility(rtn);
6154 }
6155
6156 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6157 {
6158 struct page *page;
6159 struct kvm *kvm;
6160 int r;
6161
6162 BUG_ON(vcpu->kvm == NULL);
6163 kvm = vcpu->kvm;
6164
6165 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6166 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6167 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6168 vcpu->arch.mmu.translate_gpa = translate_gpa;
6169 vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6170 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6171 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6172 else
6173 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6174
6175 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6176 if (!page) {
6177 r = -ENOMEM;
6178 goto fail;
6179 }
6180 vcpu->arch.pio_data = page_address(page);
6181
6182 kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6183
6184 r = kvm_mmu_create(vcpu);
6185 if (r < 0)
6186 goto fail_free_pio_data;
6187
6188 if (irqchip_in_kernel(kvm)) {
6189 r = kvm_create_lapic(vcpu);
6190 if (r < 0)
6191 goto fail_mmu_destroy;
6192 }
6193
6194 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6195 GFP_KERNEL);
6196 if (!vcpu->arch.mce_banks) {
6197 r = -ENOMEM;
6198 goto fail_free_lapic;
6199 }
6200 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6201
6202 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6203 goto fail_free_mce_banks;
6204
6205 kvm_async_pf_hash_reset(vcpu);
6206
6207 return 0;
6208 fail_free_mce_banks:
6209 kfree(vcpu->arch.mce_banks);
6210 fail_free_lapic:
6211 kvm_free_lapic(vcpu);
6212 fail_mmu_destroy:
6213 kvm_mmu_destroy(vcpu);
6214 fail_free_pio_data:
6215 free_page((unsigned long)vcpu->arch.pio_data);
6216 fail:
6217 return r;
6218 }
6219
6220 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6221 {
6222 int idx;
6223
6224 kfree(vcpu->arch.mce_banks);
6225 kvm_free_lapic(vcpu);
6226 idx = srcu_read_lock(&vcpu->kvm->srcu);
6227 kvm_mmu_destroy(vcpu);
6228 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6229 free_page((unsigned long)vcpu->arch.pio_data);
6230 }
6231
6232 int kvm_arch_init_vm(struct kvm *kvm)
6233 {
6234 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6235 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6236
6237 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6238 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6239
6240 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6241
6242 return 0;
6243 }
6244
6245 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6246 {
6247 vcpu_load(vcpu);
6248 kvm_mmu_unload(vcpu);
6249 vcpu_put(vcpu);
6250 }
6251
6252 static void kvm_free_vcpus(struct kvm *kvm)
6253 {
6254 unsigned int i;
6255 struct kvm_vcpu *vcpu;
6256
6257 /*
6258 * Unpin any mmu pages first.
6259 */
6260 kvm_for_each_vcpu(i, vcpu, kvm) {
6261 kvm_clear_async_pf_completion_queue(vcpu);
6262 kvm_unload_vcpu_mmu(vcpu);
6263 }
6264 kvm_for_each_vcpu(i, vcpu, kvm)
6265 kvm_arch_vcpu_free(vcpu);
6266
6267 mutex_lock(&kvm->lock);
6268 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6269 kvm->vcpus[i] = NULL;
6270
6271 atomic_set(&kvm->online_vcpus, 0);
6272 mutex_unlock(&kvm->lock);
6273 }
6274
6275 void kvm_arch_sync_events(struct kvm *kvm)
6276 {
6277 kvm_free_all_assigned_devices(kvm);
6278 kvm_free_pit(kvm);
6279 }
6280
6281 void kvm_arch_destroy_vm(struct kvm *kvm)
6282 {
6283 kvm_iommu_unmap_guest(kvm);
6284 kfree(kvm->arch.vpic);
6285 kfree(kvm->arch.vioapic);
6286 kvm_free_vcpus(kvm);
6287 if (kvm->arch.apic_access_page)
6288 put_page(kvm->arch.apic_access_page);
6289 if (kvm->arch.ept_identity_pagetable)
6290 put_page(kvm->arch.ept_identity_pagetable);
6291 }
6292
6293 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6294 struct kvm_memory_slot *memslot,
6295 struct kvm_memory_slot old,
6296 struct kvm_userspace_memory_region *mem,
6297 int user_alloc)
6298 {
6299 int npages = memslot->npages;
6300 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6301
6302 /* Prevent internal slot pages from being moved by fork()/COW. */
6303 if (memslot->id >= KVM_MEMORY_SLOTS)
6304 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6305
6306 /*To keep backward compatibility with older userspace,
6307 *x86 needs to hanlde !user_alloc case.
6308 */
6309 if (!user_alloc) {
6310 if (npages && !old.rmap) {
6311 unsigned long userspace_addr;
6312
6313 down_write(&current->mm->mmap_sem);
6314 userspace_addr = do_mmap(NULL, 0,
6315 npages * PAGE_SIZE,
6316 PROT_READ | PROT_WRITE,
6317 map_flags,
6318 0);
6319 up_write(&current->mm->mmap_sem);
6320
6321 if (IS_ERR((void *)userspace_addr))
6322 return PTR_ERR((void *)userspace_addr);
6323
6324 memslot->userspace_addr = userspace_addr;
6325 }
6326 }
6327
6328
6329 return 0;
6330 }
6331
6332 void kvm_arch_commit_memory_region(struct kvm *kvm,
6333 struct kvm_userspace_memory_region *mem,
6334 struct kvm_memory_slot old,
6335 int user_alloc)
6336 {
6337
6338 int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6339
6340 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6341 int ret;
6342
6343 down_write(&current->mm->mmap_sem);
6344 ret = do_munmap(current->mm, old.userspace_addr,
6345 old.npages * PAGE_SIZE);
6346 up_write(&current->mm->mmap_sem);
6347 if (ret < 0)
6348 printk(KERN_WARNING
6349 "kvm_vm_ioctl_set_memory_region: "
6350 "failed to munmap memory\n");
6351 }
6352
6353 if (!kvm->arch.n_requested_mmu_pages)
6354 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6355
6356 spin_lock(&kvm->mmu_lock);
6357 if (nr_mmu_pages)
6358 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6359 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6360 spin_unlock(&kvm->mmu_lock);
6361 }
6362
6363 void kvm_arch_flush_shadow(struct kvm *kvm)
6364 {
6365 kvm_mmu_zap_all(kvm);
6366 kvm_reload_remote_mmus(kvm);
6367 }
6368
6369 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6370 {
6371 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6372 !vcpu->arch.apf.halted)
6373 || !list_empty_careful(&vcpu->async_pf.done)
6374 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6375 || vcpu->arch.nmi_pending ||
6376 (kvm_arch_interrupt_allowed(vcpu) &&
6377 kvm_cpu_has_interrupt(vcpu));
6378 }
6379
6380 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6381 {
6382 int me;
6383 int cpu = vcpu->cpu;
6384
6385 if (waitqueue_active(&vcpu->wq)) {
6386 wake_up_interruptible(&vcpu->wq);
6387 ++vcpu->stat.halt_wakeup;
6388 }
6389
6390 me = get_cpu();
6391 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6392 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6393 smp_send_reschedule(cpu);
6394 put_cpu();
6395 }
6396
6397 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6398 {
6399 return kvm_x86_ops->interrupt_allowed(vcpu);
6400 }
6401
6402 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6403 {
6404 unsigned long current_rip = kvm_rip_read(vcpu) +
6405 get_segment_base(vcpu, VCPU_SREG_CS);
6406
6407 return current_rip == linear_rip;
6408 }
6409 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6410
6411 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6412 {
6413 unsigned long rflags;
6414
6415 rflags = kvm_x86_ops->get_rflags(vcpu);
6416 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6417 rflags &= ~X86_EFLAGS_TF;
6418 return rflags;
6419 }
6420 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6421
6422 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6423 {
6424 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6425 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6426 rflags |= X86_EFLAGS_TF;
6427 kvm_x86_ops->set_rflags(vcpu, rflags);
6428 kvm_make_request(KVM_REQ_EVENT, vcpu);
6429 }
6430 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6431
6432 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6433 {
6434 int r;
6435
6436 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6437 is_error_page(work->page))
6438 return;
6439
6440 r = kvm_mmu_reload(vcpu);
6441 if (unlikely(r))
6442 return;
6443
6444 if (!vcpu->arch.mmu.direct_map &&
6445 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6446 return;
6447
6448 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6449 }
6450
6451 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6452 {
6453 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6454 }
6455
6456 static inline u32 kvm_async_pf_next_probe(u32 key)
6457 {
6458 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6459 }
6460
6461 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6462 {
6463 u32 key = kvm_async_pf_hash_fn(gfn);
6464
6465 while (vcpu->arch.apf.gfns[key] != ~0)
6466 key = kvm_async_pf_next_probe(key);
6467
6468 vcpu->arch.apf.gfns[key] = gfn;
6469 }
6470
6471 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6472 {
6473 int i;
6474 u32 key = kvm_async_pf_hash_fn(gfn);
6475
6476 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6477 (vcpu->arch.apf.gfns[key] != gfn &&
6478 vcpu->arch.apf.gfns[key] != ~0); i++)
6479 key = kvm_async_pf_next_probe(key);
6480
6481 return key;
6482 }
6483
6484 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6485 {
6486 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6487 }
6488
6489 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6490 {
6491 u32 i, j, k;
6492
6493 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6494 while (true) {
6495 vcpu->arch.apf.gfns[i] = ~0;
6496 do {
6497 j = kvm_async_pf_next_probe(j);
6498 if (vcpu->arch.apf.gfns[j] == ~0)
6499 return;
6500 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6501 /*
6502 * k lies cyclically in ]i,j]
6503 * | i.k.j |
6504 * |....j i.k.| or |.k..j i...|
6505 */
6506 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6507 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6508 i = j;
6509 }
6510 }
6511
6512 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6513 {
6514
6515 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6516 sizeof(val));
6517 }
6518
6519 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6520 struct kvm_async_pf *work)
6521 {
6522 struct x86_exception fault;
6523
6524 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6525 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6526
6527 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6528 (vcpu->arch.apf.send_user_only &&
6529 kvm_x86_ops->get_cpl(vcpu) == 0))
6530 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6531 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6532 fault.vector = PF_VECTOR;
6533 fault.error_code_valid = true;
6534 fault.error_code = 0;
6535 fault.nested_page_fault = false;
6536 fault.address = work->arch.token;
6537 kvm_inject_page_fault(vcpu, &fault);
6538 }
6539 }
6540
6541 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6542 struct kvm_async_pf *work)
6543 {
6544 struct x86_exception fault;
6545
6546 trace_kvm_async_pf_ready(work->arch.token, work->gva);
6547 if (is_error_page(work->page))
6548 work->arch.token = ~0; /* broadcast wakeup */
6549 else
6550 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6551
6552 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6553 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6554 fault.vector = PF_VECTOR;
6555 fault.error_code_valid = true;
6556 fault.error_code = 0;
6557 fault.nested_page_fault = false;
6558 fault.address = work->arch.token;
6559 kvm_inject_page_fault(vcpu, &fault);
6560 }
6561 vcpu->arch.apf.halted = false;
6562 }
6563
6564 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6565 {
6566 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6567 return true;
6568 else
6569 return !kvm_event_needs_reinjection(vcpu) &&
6570 kvm_x86_ops->interrupt_allowed(vcpu);
6571 }
6572
6573 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6574 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6575 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6576 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6577 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6578 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6579 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6580 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6581 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6582 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6583 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6584 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
linux-next