?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
ath5k: fix values for bus error bits in ISR2
[linux-2.6/next.git] / drivers / net / cris / eth_v10.c
blob15c0195ebd3118da2ad9dc33fe4658739607fc7b
1 /*
2 * e100net.c: A network driver for the ETRAX 100LX network controller.
3 *
4 * Copyright (c) 1998-2002 Axis Communications AB.
5 *
6 * The outline of this driver comes from skeleton.c.
7 *
8 */
9
10
11 #include <linux/module.h>
12
13 #include <linux/kernel.h>
14 #include <linux/delay.h>
15 #include <linux/types.h>
16 #include <linux/fcntl.h>
17 #include <linux/interrupt.h>
18 #include <linux/ptrace.h>
19 #include <linux/ioport.h>
20 #include <linux/in.h>
21 #include <linux/slab.h>
22 #include <linux/string.h>
23 #include <linux/spinlock.h>
24 #include <linux/errno.h>
25 #include <linux/init.h>
26 #include <linux/bitops.h>
27
28 #include <linux/if.h>
29 #include <linux/mii.h>
30 #include <linux/netdevice.h>
31 #include <linux/etherdevice.h>
32 #include <linux/skbuff.h>
33 #include <linux/ethtool.h>
34
35 #include <arch/svinto.h>/* DMA and register descriptions */
36 #include <asm/io.h> /* CRIS_LED_* I/O functions */
37 #include <asm/irq.h>
38 #include <asm/dma.h>
39 #include <asm/system.h>
40 #include <asm/ethernet.h>
41 #include <asm/cache.h>
42 #include <arch/io_interface_mux.h>
43
44 //#define ETHDEBUG
45 #define D(x)
46
47 /*
48 * The name of the card. Is used for messages and in the requests for
49 * io regions, irqs and dma channels
50 */
51
52 static const char* cardname = "ETRAX 100LX built-in ethernet controller";
53
54 /* A default ethernet address. Highlevel SW will set the real one later */
55
56 static struct sockaddr default_mac = {
57 0,
58 { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
59 };
60
61 /* Information that need to be kept for each board. */
62 struct net_local {
63 struct net_device_stats stats;
64 struct mii_if_info mii_if;
65
66 /* Tx control lock. This protects the transmit buffer ring
67 * state along with the "tx full" state of the driver. This
68 * means all netif_queue flow control actions are protected
69 * by this lock as well.
70 */
71 spinlock_t lock;
72
73 spinlock_t led_lock; /* Protect LED state */
74 spinlock_t transceiver_lock; /* Protect transceiver state. */
75 };
76
77 typedef struct etrax_eth_descr
78 {
79 etrax_dma_descr descr;
80 struct sk_buff* skb;
81 } etrax_eth_descr;
82
83 /* Some transceivers requires special handling */
84 struct transceiver_ops
85 {
86 unsigned int oui;
87 void (*check_speed)(struct net_device* dev);
88 void (*check_duplex)(struct net_device* dev);
89 };
90
91 /* Duplex settings */
92 enum duplex
93 {
94 half,
95 full,
96 autoneg
97 };
98
99 /* Dma descriptors etc. */
100
101 #define MAX_MEDIA_DATA_SIZE 1522
102
103 #define MIN_PACKET_LEN 46
104 #define ETHER_HEAD_LEN 14
105
106 /*
107 ** MDIO constants.
108 */
109 #define MDIO_START 0x1
110 #define MDIO_READ 0x2
111 #define MDIO_WRITE 0x1
112 #define MDIO_PREAMBLE 0xfffffffful
113
114 /* Broadcom specific */
115 #define MDIO_AUX_CTRL_STATUS_REG 0x18
116 #define MDIO_BC_FULL_DUPLEX_IND 0x1
117 #define MDIO_BC_SPEED 0x2
118
119 /* TDK specific */
120 #define MDIO_TDK_DIAGNOSTIC_REG 18
121 #define MDIO_TDK_DIAGNOSTIC_RATE 0x400
122 #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
123
124 /*Intel LXT972A specific*/
125 #define MDIO_INT_STATUS_REG_2 0x0011
126 #define MDIO_INT_FULL_DUPLEX_IND (1 << 9)
127 #define MDIO_INT_SPEED (1 << 14)
128
129 /* Network flash constants */
130 #define NET_FLASH_TIME (HZ/50) /* 20 ms */
131 #define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
132 #define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
133 #define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */
134
135 #define NO_NETWORK_ACTIVITY 0
136 #define NETWORK_ACTIVITY 1
137
138 #define NBR_OF_RX_DESC 32
139 #define NBR_OF_TX_DESC 16
140
141 /* Large packets are sent directly to upper layers while small packets are */
142 /* copied (to reduce memory waste). The following constant decides the breakpoint */
143 #define RX_COPYBREAK 256
144
145 /* Due to a chip bug we need to flush the cache when descriptors are returned */
146 /* to the DMA. To decrease performance impact we return descriptors in chunks. */
147 /* The following constant determines the number of descriptors to return. */
148 #define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2
149
150 #define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
151
152 /* Define some macros to access ETRAX 100 registers */
153 #define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
154 IO_FIELD_(reg##_, field##_, val)
155 #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
156 IO_STATE_(reg##_, field##_, _##val)
157
158 static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
159 to be processed */
160 static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
161
162 static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
163
164 static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */
165 static etrax_eth_descr* myLastTxDesc; /* End of send queue */
166 static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */
167 static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
168
169 static unsigned int network_rec_config_shadow = 0;
170
171 static unsigned int network_tr_ctrl_shadow = 0;
172
173 /* Network speed indication. */
174 static DEFINE_TIMER(speed_timer, NULL, 0, 0);
175 static DEFINE_TIMER(clear_led_timer, NULL, 0, 0);
176 static int current_speed; /* Speed read from transceiver */
177 static int current_speed_selection; /* Speed selected by user */
178 static unsigned long led_next_time;
179 static int led_active;
180 static int rx_queue_len;
181
182 /* Duplex */
183 static DEFINE_TIMER(duplex_timer, NULL, 0, 0);
184 static int full_duplex;
185 static enum duplex current_duplex;
186
187 /* Index to functions, as function prototypes. */
188
189 static int etrax_ethernet_init(void);
190
191 static int e100_open(struct net_device *dev);
192 static int e100_set_mac_address(struct net_device *dev, void *addr);
193 static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
194 static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id);
195 static irqreturn_t e100nw_interrupt(int irq, void *dev_id);
196 static void e100_rx(struct net_device *dev);
197 static int e100_close(struct net_device *dev);
198 static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
199 static int e100_set_config(struct net_device* dev, struct ifmap* map);
200 static void e100_tx_timeout(struct net_device *dev);
201 static struct net_device_stats *e100_get_stats(struct net_device *dev);
202 static void set_multicast_list(struct net_device *dev);
203 static void e100_hardware_send_packet(struct net_local* np, char *buf, int length);
204 static void update_rx_stats(struct net_device_stats *);
205 static void update_tx_stats(struct net_device_stats *);
206 static int e100_probe_transceiver(struct net_device* dev);
207
208 static void e100_check_speed(unsigned long priv);
209 static void e100_set_speed(struct net_device* dev, unsigned long speed);
210 static void e100_check_duplex(unsigned long priv);
211 static void e100_set_duplex(struct net_device* dev, enum duplex);
212 static void e100_negotiate(struct net_device* dev);
213
214 static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location);
215 static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value);
216
217 static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
218 static void e100_send_mdio_bit(unsigned char bit);
219 static unsigned char e100_receive_mdio_bit(void);
220 static void e100_reset_transceiver(struct net_device* net);
221
222 static void e100_clear_network_leds(unsigned long dummy);
223 static void e100_set_network_leds(int active);
224
225 static const struct ethtool_ops e100_ethtool_ops;
226 #if defined(CONFIG_ETRAX_NO_PHY)
227 static void dummy_check_speed(struct net_device* dev);
228 static void dummy_check_duplex(struct net_device* dev);
229 #else
230 static void broadcom_check_speed(struct net_device* dev);
231 static void broadcom_check_duplex(struct net_device* dev);
232 static void tdk_check_speed(struct net_device* dev);
233 static void tdk_check_duplex(struct net_device* dev);
234 static void intel_check_speed(struct net_device* dev);
235 static void intel_check_duplex(struct net_device* dev);
236 static void generic_check_speed(struct net_device* dev);
237 static void generic_check_duplex(struct net_device* dev);
238 #endif
239 #ifdef CONFIG_NET_POLL_CONTROLLER
240 static void e100_netpoll(struct net_device* dev);
241 #endif
242
243 static int autoneg_normal = 1;
244
245 struct transceiver_ops transceivers[] =
246 {
247 #if defined(CONFIG_ETRAX_NO_PHY)
248 {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */
249 #else
250 {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
251 {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
252 {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
253 {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
254 {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
255 #endif
256 };
257
258 struct transceiver_ops* transceiver = &transceivers[0];
259
260 static const struct net_device_ops e100_netdev_ops = {
261 .ndo_open = e100_open,
262 .ndo_stop = e100_close,
263 .ndo_start_xmit = e100_send_packet,
264 .ndo_tx_timeout = e100_tx_timeout,
265 .ndo_get_stats = e100_get_stats,
266 .ndo_set_multicast_list = set_multicast_list,
267 .ndo_do_ioctl = e100_ioctl,
268 .ndo_set_mac_address = e100_set_mac_address,
269 .ndo_validate_addr = eth_validate_addr,
270 .ndo_change_mtu = eth_change_mtu,
271 .ndo_set_config = e100_set_config,
272 #ifdef CONFIG_NET_POLL_CONTROLLER
273 .ndo_poll_controller = e100_netpoll,
274 #endif
275 };
276
277 #define tx_done(dev) (*R_DMA_CH0_CMD == 0)
278
279 /*
280 * Check for a network adaptor of this type, and return '0' if one exists.
281 * If dev->base_addr == 0, probe all likely locations.
282 * If dev->base_addr == 1, always return failure.
283 * If dev->base_addr == 2, allocate space for the device and return success
284 * (detachable devices only).
285 */
286
287 static int __init
288 etrax_ethernet_init(void)
289 {
290 struct net_device *dev;
291 struct net_local* np;
292 int i, err;
293
294 printk(KERN_INFO
295 "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2007 Axis Communications AB\n");
296
297 if (cris_request_io_interface(if_eth, cardname)) {
298 printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n");
299 return -EBUSY;
300 }
301
302 dev = alloc_etherdev(sizeof(struct net_local));
303 if (!dev)
304 return -ENOMEM;
305
306 np = netdev_priv(dev);
307
308 /* we do our own locking */
309 dev->features |= NETIF_F_LLTX;
310
311 dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
312
313 /* now setup our etrax specific stuff */
314
315 dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
316 dev->dma = NETWORK_RX_DMA_NBR;
317
318 /* fill in our handlers so the network layer can talk to us in the future */
319
320 dev->ethtool_ops = &e100_ethtool_ops;
321 dev->netdev_ops = &e100_netdev_ops;
322
323 spin_lock_init(&np->lock);
324 spin_lock_init(&np->led_lock);
325 spin_lock_init(&np->transceiver_lock);
326
327 /* Initialise the list of Etrax DMA-descriptors */
328
329 /* Initialise receive descriptors */
330
331 for (i = 0; i < NBR_OF_RX_DESC; i++) {
332 /* Allocate two extra cachelines to make sure that buffer used
333 * by DMA does not share cacheline with any other data (to
334 * avoid cache bug)
335 */
336 RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
337 if (!RxDescList[i].skb)
338 return -ENOMEM;
339 RxDescList[i].descr.ctrl = 0;
340 RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;
341 RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]);
342 RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
343 RxDescList[i].descr.status = 0;
344 RxDescList[i].descr.hw_len = 0;
345 prepare_rx_descriptor(&RxDescList[i].descr);
346 }
347
348 RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol;
349 RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]);
350 rx_queue_len = 0;
351
352 /* Initialize transmit descriptors */
353 for (i = 0; i < NBR_OF_TX_DESC; i++) {
354 TxDescList[i].descr.ctrl = 0;
355 TxDescList[i].descr.sw_len = 0;
356 TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr);
357 TxDescList[i].descr.buf = 0;
358 TxDescList[i].descr.status = 0;
359 TxDescList[i].descr.hw_len = 0;
360 TxDescList[i].skb = 0;
361 }
362
363 TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol;
364 TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr);
365
366 /* Initialise initial pointers */
367
368 myNextRxDesc = &RxDescList[0];
369 myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
370 myFirstTxDesc = &TxDescList[0];
371 myNextTxDesc = &TxDescList[0];
372 myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
373
374 /* Register device */
375 err = register_netdev(dev);
376 if (err) {
377 free_netdev(dev);
378 return err;
379 }
380
381 /* set the default MAC address */
382
383 e100_set_mac_address(dev, &default_mac);
384
385 /* Initialize speed indicator stuff. */
386
387 current_speed = 10;
388 current_speed_selection = 0; /* Auto */
389 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
390 speed_timer.data = (unsigned long)dev;
391 speed_timer.function = e100_check_speed;
392
393 clear_led_timer.function = e100_clear_network_leds;
394 clear_led_timer.data = (unsigned long)dev;
395
396 full_duplex = 0;
397 current_duplex = autoneg;
398 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
399 duplex_timer.data = (unsigned long)dev;
400 duplex_timer.function = e100_check_duplex;
401
402 /* Initialize mii interface */
403 np->mii_if.phy_id_mask = 0x1f;
404 np->mii_if.reg_num_mask = 0x1f;
405 np->mii_if.dev = dev;
406 np->mii_if.mdio_read = e100_get_mdio_reg;
407 np->mii_if.mdio_write = e100_set_mdio_reg;
408
409 /* Initialize group address registers to make sure that no */
410 /* unwanted addresses are matched */
411 *R_NETWORK_GA_0 = 0x00000000;
412 *R_NETWORK_GA_1 = 0x00000000;
413
414 /* Initialize next time the led can flash */
415 led_next_time = jiffies;
416 return 0;
417 }
418
419 /* set MAC address of the interface. called from the core after a
420 * SIOCSIFADDR ioctl, and from the bootup above.
421 */
422
423 static int
424 e100_set_mac_address(struct net_device *dev, void *p)
425 {
426 struct net_local *np = netdev_priv(dev);
427 struct sockaddr *addr = p;
428
429 spin_lock(&np->lock); /* preemption protection */
430
431 /* remember it */
432
433 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
434
435 /* Write it to the hardware.
436 * Note the way the address is wrapped:
437 * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
438 * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
439 */
440
441 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
442 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
443 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
444 *R_NETWORK_SA_2 = 0;
445
446 /* show it in the log as well */
447
448 printk(KERN_INFO "%s: changed MAC to %pM\n", dev->name, dev->dev_addr);
449
450 spin_unlock(&np->lock);
451
452 return 0;
453 }
454
455 /*
456 * Open/initialize the board. This is called (in the current kernel)
457 * sometime after booting when the 'ifconfig' program is run.
458 *
459 * This routine should set everything up anew at each open, even
460 * registers that "should" only need to be set once at boot, so that
461 * there is non-reboot way to recover if something goes wrong.
462 */
463
464 static int
465 e100_open(struct net_device *dev)
466 {
467 unsigned long flags;
468
469 /* enable the MDIO output pin */
470
471 *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
472
473 *R_IRQ_MASK0_CLR =
474 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
475 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
476 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
477
478 /* clear dma0 and 1 eop and descr irq masks */
479 *R_IRQ_MASK2_CLR =
480 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
481 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
482 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
483 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
484
485 /* Reset and wait for the DMA channels */
486
487 RESET_DMA(NETWORK_TX_DMA_NBR);
488 RESET_DMA(NETWORK_RX_DMA_NBR);
489 WAIT_DMA(NETWORK_TX_DMA_NBR);
490 WAIT_DMA(NETWORK_RX_DMA_NBR);
491
492 /* Initialise the etrax network controller */
493
494 /* allocate the irq corresponding to the receiving DMA */
495
496 if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt,
497 IRQF_SAMPLE_RANDOM, cardname, (void *)dev)) {
498 goto grace_exit0;
499 }
500
501 /* allocate the irq corresponding to the transmitting DMA */
502
503 if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
504 cardname, (void *)dev)) {
505 goto grace_exit1;
506 }
507
508 /* allocate the irq corresponding to the network errors etc */
509
510 if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
511 cardname, (void *)dev)) {
512 goto grace_exit2;
513 }
514
515 /*
516 * Always allocate the DMA channels after the IRQ,
517 * and clean up on failure.
518 */
519
520 if (cris_request_dma(NETWORK_TX_DMA_NBR,
521 cardname,
522 DMA_VERBOSE_ON_ERROR,
523 dma_eth)) {
524 goto grace_exit3;
525 }
526
527 if (cris_request_dma(NETWORK_RX_DMA_NBR,
528 cardname,
529 DMA_VERBOSE_ON_ERROR,
530 dma_eth)) {
531 goto grace_exit4;
532 }
533
534 /* give the HW an idea of what MAC address we want */
535
536 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
537 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
538 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
539 *R_NETWORK_SA_2 = 0;
540
541 #if 0
542 /* use promiscuous mode for testing */
543 *R_NETWORK_GA_0 = 0xffffffff;
544 *R_NETWORK_GA_1 = 0xffffffff;
545
546 *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
547 #else
548 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522);
549 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
550 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
551 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
552 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
553 #endif
554
555 *R_NETWORK_GEN_CONFIG =
556 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
557 IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
558
559 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
560 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);
561 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);
562 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);
563 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);
564 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);
565 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
566 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
567
568 local_irq_save(flags);
569
570 /* enable the irq's for ethernet DMA */
571
572 *R_IRQ_MASK2_SET =
573 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
574 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
575
576 *R_IRQ_MASK0_SET =
577 IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
578 IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
579 IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
580
581 /* make sure the irqs are cleared */
582
583 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
584 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
585
586 /* make sure the rec and transmit error counters are cleared */
587
588 (void)*R_REC_COUNTERS; /* dummy read */
589 (void)*R_TR_COUNTERS; /* dummy read */
590
591 /* start the receiving DMA channel so we can receive packets from now on */
592
593 *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
594 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
595
596 /* Set up transmit DMA channel so it can be restarted later */
597
598 *R_DMA_CH0_FIRST = 0;
599 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
600 netif_start_queue(dev);
601
602 local_irq_restore(flags);
603
604 /* Probe for transceiver */
605 if (e100_probe_transceiver(dev))
606 goto grace_exit5;
607
608 /* Start duplex/speed timers */
609 add_timer(&speed_timer);
610 add_timer(&duplex_timer);
611
612 /* We are now ready to accept transmit requeusts from
613 * the queueing layer of the networking.
614 */
615 netif_carrier_on(dev);
616
617 return 0;
618
619 grace_exit5:
620 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
621 grace_exit4:
622 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
623 grace_exit3:
624 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
625 grace_exit2:
626 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
627 grace_exit1:
628 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
629 grace_exit0:
630 return -EAGAIN;
631 }
632
633 #if defined(CONFIG_ETRAX_NO_PHY)
634 static void
635 dummy_check_speed(struct net_device* dev)
636 {
637 current_speed = 100;
638 }
639 #else
640 static void
641 generic_check_speed(struct net_device* dev)
642 {
643 unsigned long data;
644 struct net_local *np = netdev_priv(dev);
645
646 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
647 if ((data & ADVERTISE_100FULL) ||
648 (data & ADVERTISE_100HALF))
649 current_speed = 100;
650 else
651 current_speed = 10;
652 }
653
654 static void
655 tdk_check_speed(struct net_device* dev)
656 {
657 unsigned long data;
658 struct net_local *np = netdev_priv(dev);
659
660 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
661 MDIO_TDK_DIAGNOSTIC_REG);
662 current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
663 }
664
665 static void
666 broadcom_check_speed(struct net_device* dev)
667 {
668 unsigned long data;
669 struct net_local *np = netdev_priv(dev);
670
671 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
672 MDIO_AUX_CTRL_STATUS_REG);
673 current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
674 }
675
676 static void
677 intel_check_speed(struct net_device* dev)
678 {
679 unsigned long data;
680 struct net_local *np = netdev_priv(dev);
681
682 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
683 MDIO_INT_STATUS_REG_2);
684 current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
685 }
686 #endif
687 static void
688 e100_check_speed(unsigned long priv)
689 {
690 struct net_device* dev = (struct net_device*)priv;
691 struct net_local *np = netdev_priv(dev);
692 static int led_initiated = 0;
693 unsigned long data;
694 int old_speed = current_speed;
695
696 spin_lock(&np->transceiver_lock);
697
698 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR);
699 if (!(data & BMSR_LSTATUS)) {
700 current_speed = 0;
701 } else {
702 transceiver->check_speed(dev);
703 }
704
705 spin_lock(&np->led_lock);
706 if ((old_speed != current_speed) || !led_initiated) {
707 led_initiated = 1;
708 e100_set_network_leds(NO_NETWORK_ACTIVITY);
709 if (current_speed)
710 netif_carrier_on(dev);
711 else
712 netif_carrier_off(dev);
713 }
714 spin_unlock(&np->led_lock);
715
716 /* Reinitialize the timer. */
717 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
718 add_timer(&speed_timer);
719
720 spin_unlock(&np->transceiver_lock);
721 }
722
723 static void
724 e100_negotiate(struct net_device* dev)
725 {
726 struct net_local *np = netdev_priv(dev);
727 unsigned short data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
728 MII_ADVERTISE);
729
730 /* Discard old speed and duplex settings */
731 data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL |
732 ADVERTISE_10HALF | ADVERTISE_10FULL);
733
734 switch (current_speed_selection) {
735 case 10:
736 if (current_duplex == full)
737 data |= ADVERTISE_10FULL;
738 else if (current_duplex == half)
739 data |= ADVERTISE_10HALF;
740 else
741 data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
742 break;
743
744 case 100:
745 if (current_duplex == full)
746 data |= ADVERTISE_100FULL;
747 else if (current_duplex == half)
748 data |= ADVERTISE_100HALF;
749 else
750 data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
751 break;
752
753 case 0: /* Auto */
754 if (current_duplex == full)
755 data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
756 else if (current_duplex == half)
757 data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
758 else
759 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
760 ADVERTISE_100HALF | ADVERTISE_100FULL;
761 break;
762
763 default: /* assume autoneg speed and duplex */
764 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
765 ADVERTISE_100HALF | ADVERTISE_100FULL;
766 break;
767 }
768
769 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data);
770
771 /* Renegotiate with link partner */
772 if (autoneg_normal) {
773 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
774 data |= BMCR_ANENABLE | BMCR_ANRESTART;
775 }
776 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data);
777 }
778
779 static void
780 e100_set_speed(struct net_device* dev, unsigned long speed)
781 {
782 struct net_local *np = netdev_priv(dev);
783
784 spin_lock(&np->transceiver_lock);
785 if (speed != current_speed_selection) {
786 current_speed_selection = speed;
787 e100_negotiate(dev);
788 }
789 spin_unlock(&np->transceiver_lock);
790 }
791
792 static void
793 e100_check_duplex(unsigned long priv)
794 {
795 struct net_device *dev = (struct net_device *)priv;
796 struct net_local *np = netdev_priv(dev);
797 int old_duplex;
798
799 spin_lock(&np->transceiver_lock);
800 old_duplex = full_duplex;
801 transceiver->check_duplex(dev);
802 if (old_duplex != full_duplex) {
803 /* Duplex changed */
804 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
805 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
806 }
807
808 /* Reinitialize the timer. */
809 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
810 add_timer(&duplex_timer);
811 np->mii_if.full_duplex = full_duplex;
812 spin_unlock(&np->transceiver_lock);
813 }
814 #if defined(CONFIG_ETRAX_NO_PHY)
815 static void
816 dummy_check_duplex(struct net_device* dev)
817 {
818 full_duplex = 1;
819 }
820 #else
821 static void
822 generic_check_duplex(struct net_device* dev)
823 {
824 unsigned long data;
825 struct net_local *np = netdev_priv(dev);
826
827 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
828 if ((data & ADVERTISE_10FULL) ||
829 (data & ADVERTISE_100FULL))
830 full_duplex = 1;
831 else
832 full_duplex = 0;
833 }
834
835 static void
836 tdk_check_duplex(struct net_device* dev)
837 {
838 unsigned long data;
839 struct net_local *np = netdev_priv(dev);
840
841 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
842 MDIO_TDK_DIAGNOSTIC_REG);
843 full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
844 }
845
846 static void
847 broadcom_check_duplex(struct net_device* dev)
848 {
849 unsigned long data;
850 struct net_local *np = netdev_priv(dev);
851
852 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
853 MDIO_AUX_CTRL_STATUS_REG);
854 full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
855 }
856
857 static void
858 intel_check_duplex(struct net_device* dev)
859 {
860 unsigned long data;
861 struct net_local *np = netdev_priv(dev);
862
863 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
864 MDIO_INT_STATUS_REG_2);
865 full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
866 }
867 #endif
868 static void
869 e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
870 {
871 struct net_local *np = netdev_priv(dev);
872
873 spin_lock(&np->transceiver_lock);
874 if (new_duplex != current_duplex) {
875 current_duplex = new_duplex;
876 e100_negotiate(dev);
877 }
878 spin_unlock(&np->transceiver_lock);
879 }
880
881 static int
882 e100_probe_transceiver(struct net_device* dev)
883 {
884 int ret = 0;
885
886 #if !defined(CONFIG_ETRAX_NO_PHY)
887 unsigned int phyid_high;
888 unsigned int phyid_low;
889 unsigned int oui;
890 struct transceiver_ops* ops = NULL;
891 struct net_local *np = netdev_priv(dev);
892
893 spin_lock(&np->transceiver_lock);
894
895 /* Probe MDIO physical address */
896 for (np->mii_if.phy_id = 0; np->mii_if.phy_id <= 31;
897 np->mii_if.phy_id++) {
898 if (e100_get_mdio_reg(dev,
899 np->mii_if.phy_id, MII_BMSR) != 0xffff)
900 break;
901 }
902 if (np->mii_if.phy_id == 32) {
903 ret = -ENODEV;
904 goto out;
905 }
906
907 /* Get manufacturer */
908 phyid_high = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID1);
909 phyid_low = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID2);
910 oui = (phyid_high << 6) | (phyid_low >> 10);
911
912 for (ops = &transceivers[0]; ops->oui; ops++) {
913 if (ops->oui == oui)
914 break;
915 }
916 transceiver = ops;
917 out:
918 spin_unlock(&np->transceiver_lock);
919 #endif
920 return ret;
921 }
922
923 static int
924 e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
925 {
926 unsigned short cmd; /* Data to be sent on MDIO port */
927 int data; /* Data read from MDIO */
928 int bitCounter;
929
930 /* Start of frame, OP Code, Physical Address, Register Address */
931 cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) |
932 (location << 2);
933
934 e100_send_mdio_cmd(cmd, 0);
935
936 data = 0;
937
938 /* Data... */
939 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
940 data |= (e100_receive_mdio_bit() << bitCounter);
941 }
942
943 return data;
944 }
945
946 static void
947 e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value)
948 {
949 int bitCounter;
950 unsigned short cmd;
951
952 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) |
953 (location << 2);
954
955 e100_send_mdio_cmd(cmd, 1);
956
957 /* Data... */
958 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
959 e100_send_mdio_bit(GET_BIT(bitCounter, value));
960 }
961
962 }
963
964 static void
965 e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
966 {
967 int bitCounter;
968 unsigned char data = 0x2;
969
970 /* Preamble */
971 for (bitCounter = 31; bitCounter>= 0; bitCounter--)
972 e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
973
974 for (bitCounter = 15; bitCounter >= 2; bitCounter--)
975 e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
976
977 /* Turnaround */
978 for (bitCounter = 1; bitCounter >= 0 ; bitCounter--)
979 if (write_cmd)
980 e100_send_mdio_bit(GET_BIT(bitCounter, data));
981 else
982 e100_receive_mdio_bit();
983 }
984
985 static void
986 e100_send_mdio_bit(unsigned char bit)
987 {
988 *R_NETWORK_MGM_CTRL =
989 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
990 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
991 udelay(1);
992 *R_NETWORK_MGM_CTRL =
993 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
994 IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
995 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
996 udelay(1);
997 }
998
999 static unsigned char
1000 e100_receive_mdio_bit()
1001 {
1002 unsigned char bit;
1003 *R_NETWORK_MGM_CTRL = 0;
1004 bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
1005 udelay(1);
1006 *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
1007 udelay(1);
1008 return bit;
1009 }
1010
1011 static void
1012 e100_reset_transceiver(struct net_device* dev)
1013 {
1014 struct net_local *np = netdev_priv(dev);
1015 unsigned short cmd;
1016 unsigned short data;
1017 int bitCounter;
1018
1019 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
1020
1021 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (np->mii_if.phy_id << 7) | (MII_BMCR << 2);
1022
1023 e100_send_mdio_cmd(cmd, 1);
1024
1025 data |= 0x8000;
1026
1027 for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
1028 e100_send_mdio_bit(GET_BIT(bitCounter, data));
1029 }
1030 }
1031
1032 /* Called by upper layers if they decide it took too long to complete
1033 * sending a packet - we need to reset and stuff.
1034 */
1035
1036 static void
1037 e100_tx_timeout(struct net_device *dev)
1038 {
1039 struct net_local *np = netdev_priv(dev);
1040 unsigned long flags;
1041
1042 spin_lock_irqsave(&np->lock, flags);
1043
1044 printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
1045 tx_done(dev) ? "IRQ problem" : "network cable problem");
1046
1047 /* remember we got an error */
1048
1049 np->stats.tx_errors++;
1050
1051 /* reset the TX DMA in case it has hung on something */
1052
1053 RESET_DMA(NETWORK_TX_DMA_NBR);
1054 WAIT_DMA(NETWORK_TX_DMA_NBR);
1055
1056 /* Reset the transceiver. */
1057
1058 e100_reset_transceiver(dev);
1059
1060 /* and get rid of the packets that never got an interrupt */
1061 while (myFirstTxDesc != myNextTxDesc) {
1062 dev_kfree_skb(myFirstTxDesc->skb);
1063 myFirstTxDesc->skb = 0;
1064 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1065 }
1066
1067 /* Set up transmit DMA channel so it can be restarted later */
1068 *R_DMA_CH0_FIRST = 0;
1069 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
1070
1071 /* tell the upper layers we're ok again */
1072
1073 netif_wake_queue(dev);
1074 spin_unlock_irqrestore(&np->lock, flags);
1075 }
1076
1077
1078 /* This will only be invoked if the driver is _not_ in XOFF state.
1079 * What this means is that we need not check it, and that this
1080 * invariant will hold if we make sure that the netif_*_queue()
1081 * calls are done at the proper times.
1082 */
1083
1084 static int
1085 e100_send_packet(struct sk_buff *skb, struct net_device *dev)
1086 {
1087 struct net_local *np = netdev_priv(dev);
1088 unsigned char *buf = skb->data;
1089 unsigned long flags;
1090
1091 #ifdef ETHDEBUG
1092 printk("send packet len %d\n", length);
1093 #endif
1094 spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */
1095
1096 myNextTxDesc->skb = skb;
1097
1098 dev->trans_start = jiffies;
1099
1100 e100_hardware_send_packet(np, buf, skb->len);
1101
1102 myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
1103
1104 /* Stop queue if full */
1105 if (myNextTxDesc == myFirstTxDesc) {
1106 netif_stop_queue(dev);
1107 }
1108
1109 spin_unlock_irqrestore(&np->lock, flags);
1110
1111 return NETDEV_TX_OK;
1112 }
1113
1114 /*
1115 * The typical workload of the driver:
1116 * Handle the network interface interrupts.
1117 */
1118
1119 static irqreturn_t
1120 e100rxtx_interrupt(int irq, void *dev_id)
1121 {
1122 struct net_device *dev = (struct net_device *)dev_id;
1123 struct net_local *np = netdev_priv(dev);
1124 unsigned long irqbits;
1125
1126 /*
1127 * Note that both rx and tx interrupts are blocked at this point,
1128 * regardless of which got us here.
1129 */
1130
1131 irqbits = *R_IRQ_MASK2_RD;
1132
1133 /* Handle received packets */
1134 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
1135 /* acknowledge the eop interrupt */
1136
1137 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
1138
1139 /* check if one or more complete packets were indeed received */
1140
1141 while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) &&
1142 (myNextRxDesc != myLastRxDesc)) {
1143 /* Take out the buffer and give it to the OS, then
1144 * allocate a new buffer to put a packet in.
1145 */
1146 e100_rx(dev);
1147 np->stats.rx_packets++;
1148 /* restart/continue on the channel, for safety */
1149 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
1150 /* clear dma channel 1 eop/descr irq bits */
1151 *R_DMA_CH1_CLR_INTR =
1152 IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
1153 IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
1154
1155 /* now, we might have gotten another packet
1156 so we have to loop back and check if so */
1157 }
1158 }
1159
1160 /* Report any packets that have been sent */
1161 while (virt_to_phys(myFirstTxDesc) != *R_DMA_CH0_FIRST &&
1162 (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) {
1163 np->stats.tx_bytes += myFirstTxDesc->skb->len;
1164 np->stats.tx_packets++;
1165
1166 /* dma is ready with the transmission of the data in tx_skb, so now
1167 we can release the skb memory */
1168 dev_kfree_skb_irq(myFirstTxDesc->skb);
1169 myFirstTxDesc->skb = 0;
1170 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1171 /* Wake up queue. */
1172 netif_wake_queue(dev);
1173 }
1174
1175 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
1176 /* acknowledge the eop interrupt. */
1177 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
1178 }
1179
1180 return IRQ_HANDLED;
1181 }
1182
1183 static irqreturn_t
1184 e100nw_interrupt(int irq, void *dev_id)
1185 {
1186 struct net_device *dev = (struct net_device *)dev_id;
1187 struct net_local *np = netdev_priv(dev);
1188 unsigned long irqbits = *R_IRQ_MASK0_RD;
1189
1190 /* check for underrun irq */
1191 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
1192 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1193 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1194 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1195 np->stats.tx_errors++;
1196 D(printk("ethernet receiver underrun!\n"));
1197 }
1198
1199 /* check for overrun irq */
1200 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
1201 update_rx_stats(&np->stats); /* this will ack the irq */
1202 D(printk("ethernet receiver overrun!\n"));
1203 }
1204 /* check for excessive collision irq */
1205 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
1206 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1207 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1208 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1209 np->stats.tx_errors++;
1210 D(printk("ethernet excessive collisions!\n"));
1211 }
1212 return IRQ_HANDLED;
1213 }
1214
1215 /* We have a good packet(s), get it/them out of the buffers. */
1216 static void
1217 e100_rx(struct net_device *dev)
1218 {
1219 struct sk_buff *skb;
1220 int length = 0;
1221 struct net_local *np = netdev_priv(dev);
1222 unsigned char *skb_data_ptr;
1223 #ifdef ETHDEBUG
1224 int i;
1225 #endif
1226 etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */
1227 spin_lock(&np->led_lock);
1228 if (!led_active && time_after(jiffies, led_next_time)) {
1229 /* light the network leds depending on the current speed. */
1230 e100_set_network_leds(NETWORK_ACTIVITY);
1231
1232 /* Set the earliest time we may clear the LED */
1233 led_next_time = jiffies + NET_FLASH_TIME;
1234 led_active = 1;
1235 mod_timer(&clear_led_timer, jiffies + HZ/10);
1236 }
1237 spin_unlock(&np->led_lock);
1238
1239 length = myNextRxDesc->descr.hw_len - 4;
1240 np->stats.rx_bytes += length;
1241
1242 #ifdef ETHDEBUG
1243 printk("Got a packet of length %d:\n", length);
1244 /* dump the first bytes in the packet */
1245 skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf);
1246 for (i = 0; i < 8; i++) {
1247 printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
1248 skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
1249 skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
1250 skb_data_ptr += 8;
1251 }
1252 #endif
1253
1254 if (length < RX_COPYBREAK) {
1255 /* Small packet, copy data */
1256 skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
1257 if (!skb) {
1258 np->stats.rx_errors++;
1259 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1260 goto update_nextrxdesc;
1261 }
1262
1263 skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
1264 skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
1265
1266 #ifdef ETHDEBUG
1267 printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
1268 skb->head, skb->data, skb_tail_pointer(skb),
1269 skb_end_pointer(skb));
1270 printk("copying packet to 0x%x.\n", skb_data_ptr);
1271 #endif
1272
1273 memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length);
1274 }
1275 else {
1276 /* Large packet, send directly to upper layers and allocate new
1277 * memory (aligned to cache line boundary to avoid bug).
1278 * Before sending the skb to upper layers we must make sure
1279 * that skb->data points to the aligned start of the packet.
1280 */
1281 int align;
1282 struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
1283 if (!new_skb) {
1284 np->stats.rx_errors++;
1285 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1286 goto update_nextrxdesc;
1287 }
1288 skb = myNextRxDesc->skb;
1289 align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
1290 skb_put(skb, length + align);
1291 skb_pull(skb, align); /* Remove alignment bytes */
1292 myNextRxDesc->skb = new_skb;
1293 myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data));
1294 }
1295
1296 skb->protocol = eth_type_trans(skb, dev);
1297
1298 /* Send the packet to the upper layers */
1299 netif_rx(skb);
1300
1301 update_nextrxdesc:
1302 /* Prepare for next packet */
1303 myNextRxDesc->descr.status = 0;
1304 prevRxDesc = myNextRxDesc;
1305 myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
1306
1307 rx_queue_len++;
1308
1309 /* Check if descriptors should be returned */
1310 if (rx_queue_len == RX_QUEUE_THRESHOLD) {
1311 flush_etrax_cache();
1312 prevRxDesc->descr.ctrl |= d_eol;
1313 myLastRxDesc->descr.ctrl &= ~d_eol;
1314 myLastRxDesc = prevRxDesc;
1315 rx_queue_len = 0;
1316 }
1317 }
1318
1319 /* The inverse routine to net_open(). */
1320 static int
1321 e100_close(struct net_device *dev)
1322 {
1323 struct net_local *np = netdev_priv(dev);
1324
1325 printk(KERN_INFO "Closing %s.\n", dev->name);
1326
1327 netif_stop_queue(dev);
1328
1329 *R_IRQ_MASK0_CLR =
1330 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
1331 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
1332 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
1333
1334 *R_IRQ_MASK2_CLR =
1335 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
1336 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
1337 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
1338 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
1339
1340 /* Stop the receiver and the transmitter */
1341
1342 RESET_DMA(NETWORK_TX_DMA_NBR);
1343 RESET_DMA(NETWORK_RX_DMA_NBR);
1344
1345 /* Flush the Tx and disable Rx here. */
1346
1347 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
1348 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
1349 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
1350
1351 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
1352 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
1353
1354 /* Update the statistics here. */
1355
1356 update_rx_stats(&np->stats);
1357 update_tx_stats(&np->stats);
1358
1359 /* Stop speed/duplex timers */
1360 del_timer(&speed_timer);
1361 del_timer(&duplex_timer);
1362
1363 return 0;
1364 }
1365
1366 static int
1367 e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1368 {
1369 struct mii_ioctl_data *data = if_mii(ifr);
1370 struct net_local *np = netdev_priv(dev);
1371 int rc = 0;
1372 int old_autoneg;
1373
1374 spin_lock(&np->lock); /* Preempt protection */
1375 switch (cmd) {
1376 /* The ioctls below should be considered obsolete but are */
1377 /* still present for compatability with old scripts/apps */
1378 case SET_ETH_SPEED_10: /* 10 Mbps */
1379 e100_set_speed(dev, 10);
1380 break;
1381 case SET_ETH_SPEED_100: /* 100 Mbps */
1382 e100_set_speed(dev, 100);
1383 break;
1384 case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */
1385 e100_set_speed(dev, 0);
1386 break;
1387 case SET_ETH_DUPLEX_HALF: /* Half duplex */
1388 e100_set_duplex(dev, half);
1389 break;
1390 case SET_ETH_DUPLEX_FULL: /* Full duplex */
1391 e100_set_duplex(dev, full);
1392 break;
1393 case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */
1394 e100_set_duplex(dev, autoneg);
1395 break;
1396 case SET_ETH_AUTONEG:
1397 old_autoneg = autoneg_normal;
1398 autoneg_normal = *(int*)data;
1399 if (autoneg_normal != old_autoneg)
1400 e100_negotiate(dev);
1401 break;
1402 default:
1403 rc = generic_mii_ioctl(&np->mii_if, if_mii(ifr),
1404 cmd, NULL);
1405 break;
1406 }
1407 spin_unlock(&np->lock);
1408 return rc;
1409 }
1410
1411 static int e100_get_settings(struct net_device *dev,
1412 struct ethtool_cmd *cmd)
1413 {
1414 struct net_local *np = netdev_priv(dev);
1415 int err;
1416
1417 spin_lock_irq(&np->lock);
1418 err = mii_ethtool_gset(&np->mii_if, cmd);
1419 spin_unlock_irq(&np->lock);
1420
1421 /* The PHY may support 1000baseT, but the Etrax100 does not. */
1422 cmd->supported &= ~(SUPPORTED_1000baseT_Half
1423 | SUPPORTED_1000baseT_Full);
1424 return err;
1425 }
1426
1427 static int e100_set_settings(struct net_device *dev,
1428 struct ethtool_cmd *ecmd)
1429 {
1430 if (ecmd->autoneg == AUTONEG_ENABLE) {
1431 e100_set_duplex(dev, autoneg);
1432 e100_set_speed(dev, 0);
1433 } else {
1434 e100_set_duplex(dev, ecmd->duplex == DUPLEX_HALF ? half : full);
1435 e100_set_speed(dev, ecmd->speed == SPEED_10 ? 10: 100);
1436 }
1437
1438 return 0;
1439 }
1440
1441 static void e100_get_drvinfo(struct net_device *dev,
1442 struct ethtool_drvinfo *info)
1443 {
1444 strncpy(info->driver, "ETRAX 100LX", sizeof(info->driver) - 1);
1445 strncpy(info->version, "$Revision: 1.31 $", sizeof(info->version) - 1);
1446 strncpy(info->fw_version, "N/A", sizeof(info->fw_version) - 1);
1447 strncpy(info->bus_info, "N/A", sizeof(info->bus_info) - 1);
1448 }
1449
1450 static int e100_nway_reset(struct net_device *dev)
1451 {
1452 if (current_duplex == autoneg && current_speed_selection == 0)
1453 e100_negotiate(dev);
1454 return 0;
1455 }
1456
1457 static const struct ethtool_ops e100_ethtool_ops = {
1458 .get_settings = e100_get_settings,
1459 .set_settings = e100_set_settings,
1460 .get_drvinfo = e100_get_drvinfo,
1461 .nway_reset = e100_nway_reset,
1462 .get_link = ethtool_op_get_link,
1463 };
1464
1465 static int
1466 e100_set_config(struct net_device *dev, struct ifmap *map)
1467 {
1468 struct net_local *np = netdev_priv(dev);
1469
1470 spin_lock(&np->lock); /* Preempt protection */
1471
1472 switch(map->port) {
1473 case IF_PORT_UNKNOWN:
1474 /* Use autoneg */
1475 e100_set_speed(dev, 0);
1476 e100_set_duplex(dev, autoneg);
1477 break;
1478 case IF_PORT_10BASET:
1479 e100_set_speed(dev, 10);
1480 e100_set_duplex(dev, autoneg);
1481 break;
1482 case IF_PORT_100BASET:
1483 case IF_PORT_100BASETX:
1484 e100_set_speed(dev, 100);
1485 e100_set_duplex(dev, autoneg);
1486 break;
1487 case IF_PORT_100BASEFX:
1488 case IF_PORT_10BASE2:
1489 case IF_PORT_AUI:
1490 spin_unlock(&np->lock);
1491 return -EOPNOTSUPP;
1492 break;
1493 default:
1494 printk(KERN_ERR "%s: Invalid media selected", dev->name);
1495 spin_unlock(&np->lock);
1496 return -EINVAL;
1497 }
1498 spin_unlock(&np->lock);
1499 return 0;
1500 }
1501
1502 static void
1503 update_rx_stats(struct net_device_stats *es)
1504 {
1505 unsigned long r = *R_REC_COUNTERS;
1506 /* update stats relevant to reception errors */
1507 es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
1508 es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
1509 es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
1510 es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
1511 }
1512
1513 static void
1514 update_tx_stats(struct net_device_stats *es)
1515 {
1516 unsigned long r = *R_TR_COUNTERS;
1517 /* update stats relevant to transmission errors */
1518 es->collisions +=
1519 IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
1520 IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
1521 }
1522
1523 /*
1524 * Get the current statistics.
1525 * This may be called with the card open or closed.
1526 */
1527 static struct net_device_stats *
1528 e100_get_stats(struct net_device *dev)
1529 {
1530 struct net_local *lp = netdev_priv(dev);
1531 unsigned long flags;
1532
1533 spin_lock_irqsave(&lp->lock, flags);
1534
1535 update_rx_stats(&lp->stats);
1536 update_tx_stats(&lp->stats);
1537
1538 spin_unlock_irqrestore(&lp->lock, flags);
1539 return &lp->stats;
1540 }
1541
1542 /*
1543 * Set or clear the multicast filter for this adaptor.
1544 * num_addrs == -1 Promiscuous mode, receive all packets
1545 * num_addrs == 0 Normal mode, clear multicast list
1546 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1547 * and do best-effort filtering.
1548 */
1549 static void
1550 set_multicast_list(struct net_device *dev)
1551 {
1552 struct net_local *lp = netdev_priv(dev);
1553 int num_addr = dev->mc_count;
1554 unsigned long int lo_bits;
1555 unsigned long int hi_bits;
1556
1557 spin_lock(&lp->lock);
1558 if (dev->flags & IFF_PROMISC) {
1559 /* promiscuous mode */
1560 lo_bits = 0xfffffffful;
1561 hi_bits = 0xfffffffful;
1562
1563 /* Enable individual receive */
1564 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);
1565 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1566 } else if (dev->flags & IFF_ALLMULTI) {
1567 /* enable all multicasts */
1568 lo_bits = 0xfffffffful;
1569 hi_bits = 0xfffffffful;
1570
1571 /* Disable individual receive */
1572 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1573 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1574 } else if (num_addr == 0) {
1575 /* Normal, clear the mc list */
1576 lo_bits = 0x00000000ul;
1577 hi_bits = 0x00000000ul;
1578
1579 /* Disable individual receive */
1580 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1581 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1582 } else {
1583 /* MC mode, receive normal and MC packets */
1584 char hash_ix;
1585 struct dev_mc_list *dmi = dev->mc_list;
1586 int i;
1587 char *baddr;
1588
1589 lo_bits = 0x00000000ul;
1590 hi_bits = 0x00000000ul;
1591 for (i = 0; i < num_addr; i++) {
1592 /* Calculate the hash index for the GA registers */
1593
1594 hash_ix = 0;
1595 baddr = dmi->dmi_addr;
1596 hash_ix ^= (*baddr) & 0x3f;
1597 hash_ix ^= ((*baddr) >> 6) & 0x03;
1598 ++baddr;
1599 hash_ix ^= ((*baddr) << 2) & 0x03c;
1600 hash_ix ^= ((*baddr) >> 4) & 0xf;
1601 ++baddr;
1602 hash_ix ^= ((*baddr) << 4) & 0x30;
1603 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1604 ++baddr;
1605 hash_ix ^= (*baddr) & 0x3f;
1606 hash_ix ^= ((*baddr) >> 6) & 0x03;
1607 ++baddr;
1608 hash_ix ^= ((*baddr) << 2) & 0x03c;
1609 hash_ix ^= ((*baddr) >> 4) & 0xf;
1610 ++baddr;
1611 hash_ix ^= ((*baddr) << 4) & 0x30;
1612 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1613
1614 hash_ix &= 0x3f;
1615
1616 if (hash_ix >= 32) {
1617 hi_bits |= (1 << (hash_ix-32));
1618 } else {
1619 lo_bits |= (1 << hash_ix);
1620 }
1621 dmi = dmi->next;
1622 }
1623 /* Disable individual receive */
1624 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1625 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1626 }
1627 *R_NETWORK_GA_0 = lo_bits;
1628 *R_NETWORK_GA_1 = hi_bits;
1629 spin_unlock(&lp->lock);
1630 }
1631
1632 void
1633 e100_hardware_send_packet(struct net_local *np, char *buf, int length)
1634 {
1635 D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
1636
1637 spin_lock(&np->led_lock);
1638 if (!led_active && time_after(jiffies, led_next_time)) {
1639 /* light the network leds depending on the current speed. */
1640 e100_set_network_leds(NETWORK_ACTIVITY);
1641
1642 /* Set the earliest time we may clear the LED */
1643 led_next_time = jiffies + NET_FLASH_TIME;
1644 led_active = 1;
1645 mod_timer(&clear_led_timer, jiffies + HZ/10);
1646 }
1647 spin_unlock(&np->led_lock);
1648
1649 /* configure the tx dma descriptor */
1650 myNextTxDesc->descr.sw_len = length;
1651 myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
1652 myNextTxDesc->descr.buf = virt_to_phys(buf);
1653
1654 /* Move end of list */
1655 myLastTxDesc->descr.ctrl &= ~d_eol;
1656 myLastTxDesc = myNextTxDesc;
1657
1658 /* Restart DMA channel */
1659 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
1660 }
1661
1662 static void
1663 e100_clear_network_leds(unsigned long dummy)
1664 {
1665 struct net_device *dev = (struct net_device *)dummy;
1666 struct net_local *np = netdev_priv(dev);
1667
1668 spin_lock(&np->led_lock);
1669
1670 if (led_active && time_after(jiffies, led_next_time)) {
1671 e100_set_network_leds(NO_NETWORK_ACTIVITY);
1672
1673 /* Set the earliest time we may set the LED */
1674 led_next_time = jiffies + NET_FLASH_PAUSE;
1675 led_active = 0;
1676 }
1677
1678 spin_unlock(&np->led_lock);
1679 }
1680
1681 static void
1682 e100_set_network_leds(int active)
1683 {
1684 #if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
1685 int light_leds = (active == NO_NETWORK_ACTIVITY);
1686 #elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
1687 int light_leds = (active == NETWORK_ACTIVITY);
1688 #else
1689 #error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
1690 #endif
1691
1692 if (!current_speed) {
1693 /* Make LED red, link is down */
1694 #if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION)
1695 CRIS_LED_NETWORK_SET(CRIS_LED_RED);
1696 #else
1697 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1698 #endif
1699 } else if (light_leds) {
1700 if (current_speed == 10) {
1701 CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE);
1702 } else {
1703 CRIS_LED_NETWORK_SET(CRIS_LED_GREEN);
1704 }
1705 } else {
1706 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1707 }
1708 }
1709
1710 #ifdef CONFIG_NET_POLL_CONTROLLER
1711 static void
1712 e100_netpoll(struct net_device* netdev)
1713 {
1714 e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev, NULL);
1715 }
1716 #endif
1717
1718 static int
1719 etrax_init_module(void)
1720 {
1721 return etrax_ethernet_init();
1722 }
1723
1724 static int __init
1725 e100_boot_setup(char* str)
1726 {
1727 struct sockaddr sa = {0};
1728 int i;
1729
1730 /* Parse the colon separated Ethernet station address */
1731 for (i = 0; i < ETH_ALEN; i++) {
1732 unsigned int tmp;
1733 if (sscanf(str + 3*i, "%2x", &tmp) != 1) {
1734 printk(KERN_WARNING "Malformed station address");
1735 return 0;
1736 }
1737 sa.sa_data[i] = (char)tmp;
1738 }
1739
1740 default_mac = sa;
1741 return 1;
1742 }
1743
1744 __setup("etrax100_eth=", e100_boot_setup);
1745
1746 module_init(etrax_init_module);
linux-next