drivers/net/ixgbe/ixgbe_fcoe.c

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2009 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28
  29 #include "ixgbe.h"
  30 #include <linux/if_ether.h>
  31 #include <scsi/scsi_cmnd.h>
  32 #include <scsi/scsi_device.h>
  33 #include <scsi/fc/fc_fs.h>
  34 #include <scsi/fc/fc_fcoe.h>
  35 #include <scsi/libfc.h>
  36 #include <scsi/libfcoe.h>
  37
  38 /**
  39  * ixgbe_rx_is_fcoe - check the rx desc for incoming pkt type
  40  * @rx_desc: advanced rx descriptor
  41  *
  42  * Returns : true if it is FCoE pkt
  43  */
  44 static inline bool ixgbe_rx_is_fcoe(union ixgbe_adv_rx_desc *rx_desc)
  45 {
  46         u16 p;
  47
  48         p = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info);
  49         if (p & IXGBE_RXDADV_PKTTYPE_ETQF) {
  50                 p &= IXGBE_RXDADV_PKTTYPE_ETQF_MASK;
  51                 p >>= IXGBE_RXDADV_PKTTYPE_ETQF_SHIFT;
  52                 return p == IXGBE_ETQF_FILTER_FCOE;
  53         }
  54         return false;
  55 }
  56
  57 /**
  58  * ixgbe_fcoe_clear_ddp - clear the given ddp context
  59  * @ddp - ptr to the ixgbe_fcoe_ddp
  60  *
  61  * Returns : none
  62  *
  63  */
  64 static inline void ixgbe_fcoe_clear_ddp(struct ixgbe_fcoe_ddp *ddp)
  65 {
  66         ddp->len = 0;
  67         ddp->err = 0;
  68         ddp->udl = NULL;
  69         ddp->udp = 0UL;
  70         ddp->sgl = NULL;
  71         ddp->sgc = 0;
  72 }
  73
  74 /**
  75  * ixgbe_fcoe_ddp_put - free the ddp context for a given xid
  76  * @netdev: the corresponding net_device
  77  * @xid: the xid that corresponding ddp will be freed
  78  *
  79  * This is the implementation of net_device_ops.ndo_fcoe_ddp_done
  80  * and it is expected to be called by ULD, i.e., FCP layer of libfc
  81  * to release the corresponding ddp context when the I/O is done.
  82  *
  83  * Returns : data length already ddp-ed in bytes
  84  */
  85 int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid)
  86 {
  87         int len = 0;
  88         struct ixgbe_fcoe *fcoe;
  89         struct ixgbe_adapter *adapter;
  90         struct ixgbe_fcoe_ddp *ddp;
  91
  92         if (!netdev)
  93                 goto out_ddp_put;
  94
  95         if (xid >= IXGBE_FCOE_DDP_MAX)
  96                 goto out_ddp_put;
  97
  98         adapter = netdev_priv(netdev);
  99         fcoe = &adapter->fcoe;
 100         ddp = &fcoe->ddp[xid];
 101         if (!ddp->udl)
 102                 goto out_ddp_put;
 103
 104         len = ddp->len;
 105         /* if there an error, force to invalidate ddp context */
 106         if (ddp->err) {
 107                 spin_lock_bh(&fcoe->lock);
 108                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLT, 0);
 109                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCFLTRW,
 110                                 (xid | IXGBE_FCFLTRW_WE));
 111                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCBUFF, 0);
 112                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCDMARW,
 113                                 (xid | IXGBE_FCDMARW_WE));
 114                 spin_unlock_bh(&fcoe->lock);
 115         }
 116         if (ddp->sgl)
 117                 pci_unmap_sg(adapter->pdev, ddp->sgl, ddp->sgc,
 118                              DMA_FROM_DEVICE);
 119         pci_pool_free(fcoe->pool, ddp->udl, ddp->udp);
 120         ixgbe_fcoe_clear_ddp(ddp);
 121
 122 out_ddp_put:
 123         return len;
 124 }
 125
 126 /**
 127  * ixgbe_fcoe_ddp_get - called to set up ddp context
 128  * @netdev: the corresponding net_device
 129  * @xid: the exchange id requesting ddp
 130  * @sgl: the scatter-gather list for this request
 131  * @sgc: the number of scatter-gather items
 132  *
 133  * This is the implementation of net_device_ops.ndo_fcoe_ddp_setup
 134  * and is expected to be called from ULD, e.g., FCP layer of libfc
 135  * to set up ddp for the corresponding xid of the given sglist for
 136  * the corresponding I/O.
 137  *
 138  * Returns : 1 for success and 0 for no ddp
 139  */
 140 int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
 141                        struct scatterlist *sgl, unsigned int sgc)
 142 {
 143         struct ixgbe_adapter *adapter;
 144         struct ixgbe_hw *hw;
 145         struct ixgbe_fcoe *fcoe;
 146         struct ixgbe_fcoe_ddp *ddp;
 147         struct scatterlist *sg;
 148         unsigned int i, j, dmacount;
 149         unsigned int len;
 150         static const unsigned int bufflen = 4096;
 151         unsigned int firstoff = 0;
 152         unsigned int lastsize;
 153         unsigned int thisoff = 0;
 154         unsigned int thislen = 0;
 155         u32 fcbuff, fcdmarw, fcfltrw;
 156         dma_addr_t addr;
 157
 158         if (!netdev || !sgl)
 159                 return 0;
 160
 161         adapter = netdev_priv(netdev);
 162         if (xid >= IXGBE_FCOE_DDP_MAX) {
 163                 DPRINTK(DRV, WARNING, "xid=0x%x out-of-range\n", xid);
 164                 return 0;
 165         }
 166
 167         fcoe = &adapter->fcoe;
 168         if (!fcoe->pool) {
 169                 DPRINTK(DRV, WARNING, "xid=0x%x no ddp pool for fcoe\n", xid);
 170                 return 0;
 171         }
 172
 173         ddp = &fcoe->ddp[xid];
 174         if (ddp->sgl) {
 175                 DPRINTK(DRV, ERR, "xid 0x%x w/ non-null sgl=%p nents=%d\n",
 176                         xid, ddp->sgl, ddp->sgc);
 177                 return 0;
 178         }
 179         ixgbe_fcoe_clear_ddp(ddp);
 180
 181         /* setup dma from scsi command sgl */
 182         dmacount = pci_map_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
 183         if (dmacount == 0) {
 184                 DPRINTK(DRV, ERR, "xid 0x%x DMA map error\n", xid);
 185                 return 0;
 186         }
 187
 188         /* alloc the udl from our ddp pool */
 189         ddp->udl = pci_pool_alloc(fcoe->pool, GFP_KERNEL, &ddp->udp);
 190         if (!ddp->udl) {
 191                 DPRINTK(DRV, ERR, "failed allocated ddp context\n");
 192                 goto out_noddp_unmap;
 193         }
 194         ddp->sgl = sgl;
 195         ddp->sgc = sgc;
 196
 197         j = 0;
 198         for_each_sg(sgl, sg, dmacount, i) {
 199                 addr = sg_dma_address(sg);
 200                 len = sg_dma_len(sg);
 201                 while (len) {
 202                         /* get the offset of length of current buffer */
 203                         thisoff = addr & ((dma_addr_t)bufflen - 1);
 204                         thislen = min((bufflen - thisoff), len);
 205                         /*
 206                          * all but the 1st buffer (j == 0)
 207                          * must be aligned on bufflen
 208                          */
 209                         if ((j != 0) && (thisoff))
 210                                 goto out_noddp_free;
 211                         /*
 212                          * all but the last buffer
 213                          * ((i == (dmacount - 1)) && (thislen == len))
 214                          * must end at bufflen
 215                          */
 216                         if (((i != (dmacount - 1)) || (thislen != len))
 217                             && ((thislen + thisoff) != bufflen))
 218                                 goto out_noddp_free;
 219
 220                         ddp->udl[j] = (u64)(addr - thisoff);
 221                         /* only the first buffer may have none-zero offset */
 222                         if (j == 0)
 223                                 firstoff = thisoff;
 224                         len -= thislen;
 225                         addr += thislen;
 226                         j++;
 227                         /* max number of buffers allowed in one DDP context */
 228                         if (j > IXGBE_BUFFCNT_MAX) {
 229                                 DPRINTK(DRV, ERR, "xid=%x:%d,%d,%d:addr=%llx "
 230                                         "not enough descriptors\n",
 231                                         xid, i, j, dmacount, (u64)addr);
 232                                 goto out_noddp_free;
 233                         }
 234                 }
 235         }
 236         /* only the last buffer may have non-full bufflen */
 237         lastsize = thisoff + thislen;
 238
 239         fcbuff = (IXGBE_FCBUFF_4KB << IXGBE_FCBUFF_BUFFSIZE_SHIFT);
 240         fcbuff |= (j << IXGBE_FCBUFF_BUFFCNT_SHIFT);
 241         fcbuff |= (firstoff << IXGBE_FCBUFF_OFFSET_SHIFT);
 242         fcbuff |= (IXGBE_FCBUFF_VALID);
 243
 244         fcdmarw = xid;
 245         fcdmarw |= IXGBE_FCDMARW_WE;
 246         fcdmarw |= (lastsize << IXGBE_FCDMARW_LASTSIZE_SHIFT);
 247
 248         fcfltrw = xid;
 249         fcfltrw |= IXGBE_FCFLTRW_WE;
 250
 251         /* program DMA context */
 252         hw = &adapter->hw;
 253         spin_lock_bh(&fcoe->lock);
 254         IXGBE_WRITE_REG(hw, IXGBE_FCPTRL, ddp->udp & DMA_BIT_MASK(32));
 255         IXGBE_WRITE_REG(hw, IXGBE_FCPTRH, (u64)ddp->udp >> 32);
 256         IXGBE_WRITE_REG(hw, IXGBE_FCBUFF, fcbuff);
 257         IXGBE_WRITE_REG(hw, IXGBE_FCDMARW, fcdmarw);
 258         /* program filter context */
 259         IXGBE_WRITE_REG(hw, IXGBE_FCPARAM, 0);
 260         IXGBE_WRITE_REG(hw, IXGBE_FCFLT, IXGBE_FCFLT_VALID);
 261         IXGBE_WRITE_REG(hw, IXGBE_FCFLTRW, fcfltrw);
 262         spin_unlock_bh(&fcoe->lock);
 263
 264         return 1;
 265
 266 out_noddp_free:
 267         pci_pool_free(fcoe->pool, ddp->udl, ddp->udp);
 268         ixgbe_fcoe_clear_ddp(ddp);
 269
 270 out_noddp_unmap:
 271         pci_unmap_sg(adapter->pdev, sgl, sgc, DMA_FROM_DEVICE);
 272         return 0;
 273 }
 274
 275 /**
 276  * ixgbe_fcoe_ddp - check ddp status and mark it done
 277  * @adapter: ixgbe adapter
 278  * @rx_desc: advanced rx descriptor
 279  * @skb: the skb holding the received data
 280  *
 281  * This checks ddp status.
 282  *
 283  * Returns : < 0 indicates an error or not a FCiE ddp, 0 indicates
 284  * not passing the skb to ULD, > 0 indicates is the length of data
 285  * being ddped.
 286  */
 287 int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
 288                    union ixgbe_adv_rx_desc *rx_desc,
 289                    struct sk_buff *skb)
 290 {
 291         u16 xid;
 292         u32 sterr, fceofe, fcerr, fcstat;
 293         int rc = -EINVAL;
 294         struct ixgbe_fcoe *fcoe;
 295         struct ixgbe_fcoe_ddp *ddp;
 296         struct fc_frame_header *fh;
 297
 298         if (!ixgbe_rx_is_fcoe(rx_desc))
 299                 goto ddp_out;
 300
 301         skb->ip_summed = CHECKSUM_UNNECESSARY;
 302         sterr = le32_to_cpu(rx_desc->wb.upper.status_error);
 303         fcerr = (sterr & IXGBE_RXDADV_ERR_FCERR);
 304         fceofe = (sterr & IXGBE_RXDADV_ERR_FCEOFE);
 305         if (fcerr == IXGBE_FCERR_BADCRC)
 306                 skb->ip_summed = CHECKSUM_NONE;
 307
 308         skb_reset_network_header(skb);
 309         skb_set_transport_header(skb, skb_network_offset(skb) +
 310                                  sizeof(struct fcoe_hdr));
 311         fh = (struct fc_frame_header *)skb_transport_header(skb);
 312         xid =  be16_to_cpu(fh->fh_ox_id);
 313         if (xid >= IXGBE_FCOE_DDP_MAX)
 314                 goto ddp_out;
 315
 316         fcoe = &adapter->fcoe;
 317         ddp = &fcoe->ddp[xid];
 318         if (!ddp->udl)
 319                 goto ddp_out;
 320
 321         ddp->err = (fcerr | fceofe);
 322         if (ddp->err)
 323                 goto ddp_out;
 324
 325         fcstat = (sterr & IXGBE_RXDADV_STAT_FCSTAT);
 326         if (fcstat) {
 327                 /* update length of DDPed data */
 328                 ddp->len = le32_to_cpu(rx_desc->wb.lower.hi_dword.rss);
 329                 /* unmap the sg list when FCP_RSP is received */
 330                 if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_FCPRSP) {
 331                         pci_unmap_sg(adapter->pdev, ddp->sgl,
 332                                      ddp->sgc, DMA_FROM_DEVICE);
 333                         ddp->sgl = NULL;
 334                         ddp->sgc = 0;
 335                 }
 336                 /* return 0 to bypass going to ULD for DDPed data */
 337                 if (fcstat == IXGBE_RXDADV_STAT_FCSTAT_DDP)
 338                         rc = 0;
 339                 else
 340                         rc = ddp->len;
 341         }
 342
 343 ddp_out:
 344         return rc;
 345 }
 346
 347 /**
 348  * ixgbe_fso - ixgbe FCoE Sequence Offload (FSO)
 349  * @adapter: ixgbe adapter
 350  * @tx_ring: tx desc ring
 351  * @skb: associated skb
 352  * @tx_flags: tx flags
 353  * @hdr_len: hdr_len to be returned
 354  *
 355  * This sets up large send offload for FCoE
 356  *
 357  * Returns : 0 indicates no FSO, > 0 for FSO, < 0 for error
 358  */
 359 int ixgbe_fso(struct ixgbe_adapter *adapter,
 360               struct ixgbe_ring *tx_ring, struct sk_buff *skb,
 361               u32 tx_flags, u8 *hdr_len)
 362 {
 363         u8 sof, eof;
 364         u32 vlan_macip_lens;
 365         u32 fcoe_sof_eof;
 366         u32 type_tucmd;
 367         u32 mss_l4len_idx;
 368         int mss = 0;
 369         unsigned int i;
 370         struct ixgbe_tx_buffer *tx_buffer_info;
 371         struct ixgbe_adv_tx_context_desc *context_desc;
 372         struct fc_frame_header *fh;
 373
 374         if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_type != SKB_GSO_FCOE)) {
 375                 DPRINTK(DRV, ERR, "Wrong gso type %d:expecting SKB_GSO_FCOE\n",
 376                         skb_shinfo(skb)->gso_type);
 377                 return -EINVAL;
 378         }
 379
 380         /* resets the header to point fcoe/fc */
 381         skb_set_network_header(skb, skb->mac_len);
 382         skb_set_transport_header(skb, skb->mac_len +
 383                                  sizeof(struct fcoe_hdr));
 384
 385         /* sets up SOF and ORIS */
 386         fcoe_sof_eof = 0;
 387         sof = ((struct fcoe_hdr *)skb_network_header(skb))->fcoe_sof;
 388         switch (sof) {
 389         case FC_SOF_I2:
 390                 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIS;
 391                 break;
 392         case FC_SOF_I3:
 393                 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF;
 394                 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIS;
 395                 break;
 396         case FC_SOF_N2:
 397                 break;
 398         case FC_SOF_N3:
 399                 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_SOF;
 400                 break;
 401         default:
 402                 DPRINTK(DRV, WARNING, "unknown sof = 0x%x\n", sof);
 403                 return -EINVAL;
 404         }
 405
 406         /* the first byte of the last dword is EOF */
 407         skb_copy_bits(skb, skb->len - 4, &eof, 1);
 408         /* sets up EOF and ORIE */
 409         switch (eof) {
 410         case FC_EOF_N:
 411                 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
 412                 break;
 413         case FC_EOF_T:
 414                 /* lso needs ORIE */
 415                 if (skb_is_gso(skb)) {
 416                         fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_N;
 417                         fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_ORIE;
 418                 } else {
 419                         fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_T;
 420                 }
 421                 break;
 422         case FC_EOF_NI:
 423                 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_NI;
 424                 break;
 425         case FC_EOF_A:
 426                 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_EOF_A;
 427                 break;
 428         default:
 429                 DPRINTK(DRV, WARNING, "unknown eof = 0x%x\n", eof);
 430                 return -EINVAL;
 431         }
 432
 433         /* sets up PARINC indicating data offset */
 434         fh = (struct fc_frame_header *)skb_transport_header(skb);
 435         if (fh->fh_f_ctl[2] & FC_FC_REL_OFF)
 436                 fcoe_sof_eof |= IXGBE_ADVTXD_FCOEF_PARINC;
 437
 438         /* hdr_len includes fc_hdr if FCoE lso is enabled */
 439         *hdr_len = sizeof(struct fcoe_crc_eof);
 440         if (skb_is_gso(skb))
 441                 *hdr_len += (skb_transport_offset(skb) +
 442                              sizeof(struct fc_frame_header));
 443         /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
 444         vlan_macip_lens = (skb_transport_offset(skb) +
 445                           sizeof(struct fc_frame_header));
 446         vlan_macip_lens |= ((skb_transport_offset(skb) - 4)
 447                            << IXGBE_ADVTXD_MACLEN_SHIFT);
 448         vlan_macip_lens |= (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
 449
 450         /* type_tycmd and mss: set TUCMD.FCoE to enable offload */
 451         type_tucmd = IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT |
 452                      IXGBE_ADVTXT_TUCMD_FCOE;
 453         if (skb_is_gso(skb))
 454                 mss = skb_shinfo(skb)->gso_size;
 455         /* mss_l4len_id: use 1 for FSO as TSO, no need for L4LEN */
 456         mss_l4len_idx = (mss << IXGBE_ADVTXD_MSS_SHIFT) |
 457                         (1 << IXGBE_ADVTXD_IDX_SHIFT);
 458
 459         /* write context desc */
 460         i = tx_ring->next_to_use;
 461         context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
 462         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
 463         context_desc->seqnum_seed       = cpu_to_le32(fcoe_sof_eof);
 464         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
 465         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
 466
 467         tx_buffer_info = &tx_ring->tx_buffer_info[i];
 468         tx_buffer_info->time_stamp = jiffies;
 469         tx_buffer_info->next_to_watch = i;
 470
 471         i++;
 472         if (i == tx_ring->count)
 473                 i = 0;
 474         tx_ring->next_to_use = i;
 475
 476         return skb_is_gso(skb);
 477 }
 478
 479 /**
 480  * ixgbe_configure_fcoe - configures registers for fcoe at start
 481  * @adapter: ptr to ixgbe adapter
 482  *
 483  * This sets up FCoE related registers
 484  *
 485  * Returns : none
 486  */
 487 void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter)
 488 {
 489         int i, fcoe_q, fcoe_i;
 490         struct ixgbe_hw *hw = &adapter->hw;
 491         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
 492         struct ixgbe_ring_feature *f = &adapter->ring_feature[RING_F_FCOE];
 493
 494         /* create the pool for ddp if not created yet */
 495         if (!fcoe->pool) {
 496                 /* allocate ddp pool */
 497                 fcoe->pool = pci_pool_create("ixgbe_fcoe_ddp",
 498                                              adapter->pdev, IXGBE_FCPTR_MAX,
 499                                              IXGBE_FCPTR_ALIGN, PAGE_SIZE);
 500                 if (!fcoe->pool)
 501                         DPRINTK(DRV, ERR,
 502                                 "failed to allocated FCoE DDP pool\n");
 503
 504                 spin_lock_init(&fcoe->lock);
 505         }
 506
 507         /* Enable L2 eth type filter for FCoE */
 508         IXGBE_WRITE_REG(hw, IXGBE_ETQF(IXGBE_ETQF_FILTER_FCOE),
 509                         (ETH_P_FCOE | IXGBE_ETQF_FCOE | IXGBE_ETQF_FILTER_EN));
 510         if (adapter->ring_feature[RING_F_FCOE].indices) {
 511                 /* Use multiple rx queues for FCoE by redirection table */
 512                 for (i = 0; i < IXGBE_FCRETA_SIZE; i++) {
 513                         fcoe_i = f->mask + i % f->indices;
 514                         fcoe_i &= IXGBE_FCRETA_ENTRY_MASK;
 515                         fcoe_q = adapter->rx_ring[fcoe_i].reg_idx;
 516                         IXGBE_WRITE_REG(hw, IXGBE_FCRETA(i), fcoe_q);
 517                 }
 518                 IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, IXGBE_FCRECTL_ENA);
 519                 IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE), 0);
 520         } else  {
 521                 /* Use single rx queue for FCoE */
 522                 fcoe_i = f->mask;
 523                 fcoe_q = adapter->rx_ring[fcoe_i].reg_idx;
 524                 IXGBE_WRITE_REG(hw, IXGBE_FCRECTL, 0);
 525                 IXGBE_WRITE_REG(hw, IXGBE_ETQS(IXGBE_ETQF_FILTER_FCOE),
 526                                 IXGBE_ETQS_QUEUE_EN |
 527                                 (fcoe_q << IXGBE_ETQS_RX_QUEUE_SHIFT));
 528         }
 529
 530         IXGBE_WRITE_REG(hw, IXGBE_FCRXCTRL,
 531                         IXGBE_FCRXCTRL_FCOELLI |
 532                         IXGBE_FCRXCTRL_FCCRCBO |
 533                         (FC_FCOE_VER << IXGBE_FCRXCTRL_FCOEVER_SHIFT));
 534 }
 535
 536 /**
 537  * ixgbe_cleanup_fcoe - release all fcoe ddp context resources
 538  * @adapter : ixgbe adapter
 539  *
 540  * Cleans up outstanding ddp context resources
 541  *
 542  * Returns : none
 543  */
 544 void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter)
 545 {
 546         int i;
 547         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
 548
 549         /* release ddp resource */
 550         if (fcoe->pool) {
 551                 for (i = 0; i < IXGBE_FCOE_DDP_MAX; i++)
 552                         ixgbe_fcoe_ddp_put(adapter->netdev, i);
 553                 pci_pool_destroy(fcoe->pool);
 554                 fcoe->pool = NULL;
 555         }
 556 }