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ath5k: fix values for bus error bits in ISR2
[linux-2.6/next.git] / drivers / net / ni65.c
blob81a061785898e13baa3f4ff9a232253c43da0834
1 /*
2 * ni6510 (am7990 'lance' chip) driver for Linux-net-3
3 * BETAcode v0.71 (96/09/29) for 2.0.0 (or later)
4 * copyrights (c) 1994,1995,1996 by M.Hipp
5 *
6 * This driver can handle the old ni6510 board and the newer ni6510
7 * EtherBlaster. (probably it also works with every full NE2100
8 * compatible card)
9 *
10 * driver probes: io: 0x360,0x300,0x320,0x340 / dma: 3,5,6,7
11 *
12 * This is an extension to the Linux operating system, and is covered by the
13 * same GNU General Public License that covers the Linux-kernel.
14 *
15 * comments/bugs/suggestions can be sent to:
16 * Michael Hipp
17 * email: hippm@informatik.uni-tuebingen.de
18 *
19 * sources:
20 * some things are from the 'ni6510-packet-driver for dos by Russ Nelson'
21 * and from the original drivers by D.Becker
22 *
23 * known problems:
24 * - on some PCI boards (including my own) the card/board/ISA-bridge has
25 * problems with bus master DMA. This results in lotsa overruns.
26 * It may help to '#define RCV_PARANOIA_CHECK' or try to #undef
27 * the XMT and RCV_VIA_SKB option .. this reduces driver performance.
28 * Or just play with your BIOS options to optimize ISA-DMA access.
29 * Maybe you also wanna play with the LOW_PERFORAMCE and MID_PERFORMANCE
30 * defines -> please report me your experience then
31 * - Harald reported for ASUS SP3G mainboards, that you should use
32 * the 'optimal settings' from the user's manual on page 3-12!
33 *
34 * credits:
35 * thanx to Jason Sullivan for sending me a ni6510 card!
36 * lot of debug runs with ASUS SP3G Boards (Intel Saturn) by Harald Koenig
37 *
38 * simple performance test: (486DX-33/Ni6510-EB receives from 486DX4-100/Ni6510-EB)
39 * average: FTP -> 8384421 bytes received in 8.5 seconds
40 * (no RCV_VIA_SKB,no XMT_VIA_SKB,PARANOIA_CHECK,4 XMIT BUFS, 8 RCV_BUFFS)
41 * peak: FTP -> 8384421 bytes received in 7.5 seconds
42 * (RCV_VIA_SKB,XMT_VIA_SKB,no PARANOIA_CHECK,1(!) XMIT BUF, 16 RCV BUFFS)
43 */
44
45 /*
46 * 99.Jun.8: added support for /proc/net/dev byte count for xosview (HK)
47 * 96.Sept.29: virt_to_bus stuff added for new memory modell
48 * 96.April.29: Added Harald Koenig's Patches (MH)
49 * 96.April.13: enhanced error handling .. more tests (MH)
50 * 96.April.5/6: a lot of performance tests. Got it stable now (hopefully) (MH)
51 * 96.April.1: (no joke ;) .. added EtherBlaster and Module support (MH)
52 * 96.Feb.19: fixed a few bugs .. cleanups .. tested for 1.3.66 (MH)
53 * hopefully no more 16MB limit
54 *
55 * 95.Nov.18: multicast tweaked (AC).
56 *
57 * 94.Aug.22: changes in xmit_intr (ack more than one xmitted-packet), ni65_send_packet (p->lock) (MH)
58 *
59 * 94.July.16: fixed bugs in recv_skb and skb-alloc stuff (MH)
60 */
61
62 #include <linux/kernel.h>
63 #include <linux/string.h>
64 #include <linux/errno.h>
65 #include <linux/ioport.h>
66 #include <linux/slab.h>
67 #include <linux/interrupt.h>
68 #include <linux/delay.h>
69 #include <linux/init.h>
70 #include <linux/netdevice.h>
71 #include <linux/etherdevice.h>
72 #include <linux/skbuff.h>
73 #include <linux/module.h>
74 #include <linux/bitops.h>
75
76 #include <asm/io.h>
77 #include <asm/dma.h>
78
79 #include "ni65.h"
80
81 /*
82 * the current setting allows an acceptable performance
83 * for 'RCV_PARANOIA_CHECK' read the 'known problems' part in
84 * the header of this file
85 * 'invert' the defines for max. performance. This may cause DMA problems
86 * on some boards (e.g on my ASUS SP3G)
87 */
88 #undef XMT_VIA_SKB
89 #undef RCV_VIA_SKB
90 #define RCV_PARANOIA_CHECK
91
92 #define MID_PERFORMANCE
93
94 #if defined( LOW_PERFORMANCE )
95 static int isa0=7,isa1=7,csr80=0x0c10;
96 #elif defined( MID_PERFORMANCE )
97 static int isa0=5,isa1=5,csr80=0x2810;
98 #else /* high performance */
99 static int isa0=4,isa1=4,csr80=0x0017;
100 #endif
101
102 /*
103 * a few card/vendor specific defines
104 */
105 #define NI65_ID0 0x00
106 #define NI65_ID1 0x55
107 #define NI65_EB_ID0 0x52
108 #define NI65_EB_ID1 0x44
109 #define NE2100_ID0 0x57
110 #define NE2100_ID1 0x57
111
112 #define PORT p->cmdr_addr
113
114 /*
115 * buffer configuration
116 */
117 #if 1
118 #define RMDNUM 16
119 #define RMDNUMMASK 0x80000000
120 #else
121 #define RMDNUM 8
122 #define RMDNUMMASK 0x60000000 /* log2(RMDNUM)<<29 */
123 #endif
124
125 #if 0
126 #define TMDNUM 1
127 #define TMDNUMMASK 0x00000000
128 #else
129 #define TMDNUM 4
130 #define TMDNUMMASK 0x40000000 /* log2(TMDNUM)<<29 */
131 #endif
132
133 /* slightly oversized */
134 #define R_BUF_SIZE 1544
135 #define T_BUF_SIZE 1544
136
137 /*
138 * lance register defines
139 */
140 #define L_DATAREG 0x00
141 #define L_ADDRREG 0x02
142 #define L_RESET 0x04
143 #define L_CONFIG 0x05
144 #define L_BUSIF 0x06
145
146 /*
147 * to access the lance/am7990-regs, you have to write
148 * reg-number into L_ADDRREG, then you can access it using L_DATAREG
149 */
150 #define CSR0 0x00
151 #define CSR1 0x01
152 #define CSR2 0x02
153 #define CSR3 0x03
154
155 #define INIT_RING_BEFORE_START 0x1
156 #define FULL_RESET_ON_ERROR 0x2
157
158 #if 0
159 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
160 outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
161 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
162 inw(PORT+L_DATAREG))
163 #if 0
164 #define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
165 #else
166 #define writedatareg(val) { writereg(val,CSR0); }
167 #endif
168 #else
169 #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
170 #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
171 #define writedatareg(val) { writereg(val,CSR0); }
172 #endif
173
174 static unsigned char ni_vendor[] = { 0x02,0x07,0x01 };
175
176 static struct card {
177 unsigned char id0,id1;
178 short id_offset;
179 short total_size;
180 short cmd_offset;
181 short addr_offset;
182 unsigned char *vendor_id;
183 char *cardname;
184 unsigned long config;
185 } cards[] = {
186 {
187 .id0 = NI65_ID0,
188 .id1 = NI65_ID1,
189 .id_offset = 0x0e,
190 .total_size = 0x10,
191 .cmd_offset = 0x0,
192 .addr_offset = 0x8,
193 .vendor_id = ni_vendor,
194 .cardname = "ni6510",
195 .config = 0x1,
196 },
197 {
198 .id0 = NI65_EB_ID0,
199 .id1 = NI65_EB_ID1,
200 .id_offset = 0x0e,
201 .total_size = 0x18,
202 .cmd_offset = 0x10,
203 .addr_offset = 0x0,
204 .vendor_id = ni_vendor,
205 .cardname = "ni6510 EtherBlaster",
206 .config = 0x2,
207 },
208 {
209 .id0 = NE2100_ID0,
210 .id1 = NE2100_ID1,
211 .id_offset = 0x0e,
212 .total_size = 0x18,
213 .cmd_offset = 0x10,
214 .addr_offset = 0x0,
215 .vendor_id = NULL,
216 .cardname = "generic NE2100",
217 .config = 0x0,
218 },
219 };
220 #define NUM_CARDS 3
221
222 struct priv
223 {
224 struct rmd rmdhead[RMDNUM];
225 struct tmd tmdhead[TMDNUM];
226 struct init_block ib;
227 int rmdnum;
228 int tmdnum,tmdlast;
229 #ifdef RCV_VIA_SKB
230 struct sk_buff *recv_skb[RMDNUM];
231 #else
232 void *recvbounce[RMDNUM];
233 #endif
234 #ifdef XMT_VIA_SKB
235 struct sk_buff *tmd_skb[TMDNUM];
236 #endif
237 void *tmdbounce[TMDNUM];
238 int tmdbouncenum;
239 int lock,xmit_queued;
240
241 void *self;
242 int cmdr_addr;
243 int cardno;
244 int features;
245 spinlock_t ring_lock;
246 };
247
248 static int ni65_probe1(struct net_device *dev,int);
249 static irqreturn_t ni65_interrupt(int irq, void * dev_id);
250 static void ni65_recv_intr(struct net_device *dev,int);
251 static void ni65_xmit_intr(struct net_device *dev,int);
252 static int ni65_open(struct net_device *dev);
253 static int ni65_lance_reinit(struct net_device *dev);
254 static void ni65_init_lance(struct priv *p,unsigned char*,int,int);
255 static int ni65_send_packet(struct sk_buff *skb, struct net_device *dev);
256 static void ni65_timeout(struct net_device *dev);
257 static int ni65_close(struct net_device *dev);
258 static int ni65_alloc_buffer(struct net_device *dev);
259 static void ni65_free_buffer(struct priv *p);
260 static void set_multicast_list(struct net_device *dev);
261
262 static int irqtab[] __initdata = { 9,12,15,5 }; /* irq config-translate */
263 static int dmatab[] __initdata = { 0,3,5,6,7 }; /* dma config-translate and autodetect */
264
265 static int debuglevel = 1;
266
267 /*
268 * set 'performance' registers .. we must STOP lance for that
269 */
270 static void ni65_set_performance(struct priv *p)
271 {
272 writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */
273
274 if( !(cards[p->cardno].config & 0x02) )
275 return;
276
277 outw(80,PORT+L_ADDRREG);
278 if(inw(PORT+L_ADDRREG) != 80)
279 return;
280
281 writereg( (csr80 & 0x3fff) ,80); /* FIFO watermarks */
282 outw(0,PORT+L_ADDRREG);
283 outw((short)isa0,PORT+L_BUSIF); /* write ISA 0: DMA_R : isa0 * 50ns */
284 outw(1,PORT+L_ADDRREG);
285 outw((short)isa1,PORT+L_BUSIF); /* write ISA 1: DMA_W : isa1 * 50ns */
286
287 outw(CSR0,PORT+L_ADDRREG); /* switch back to CSR0 */
288 }
289
290 /*
291 * open interface (up)
292 */
293 static int ni65_open(struct net_device *dev)
294 {
295 struct priv *p = dev->ml_priv;
296 int irqval = request_irq(dev->irq, &ni65_interrupt,0,
297 cards[p->cardno].cardname,dev);
298 if (irqval) {
299 printk(KERN_ERR "%s: unable to get IRQ %d (irqval=%d).\n",
300 dev->name,dev->irq, irqval);
301 return -EAGAIN;
302 }
303
304 if(ni65_lance_reinit(dev))
305 {
306 netif_start_queue(dev);
307 return 0;
308 }
309 else
310 {
311 free_irq(dev->irq,dev);
312 return -EAGAIN;
313 }
314 }
315
316 /*
317 * close interface (down)
318 */
319 static int ni65_close(struct net_device *dev)
320 {
321 struct priv *p = dev->ml_priv;
322
323 netif_stop_queue(dev);
324
325 outw(inw(PORT+L_RESET),PORT+L_RESET); /* that's the hard way */
326
327 #ifdef XMT_VIA_SKB
328 {
329 int i;
330 for(i=0;i<TMDNUM;i++)
331 {
332 if(p->tmd_skb[i]) {
333 dev_kfree_skb(p->tmd_skb[i]);
334 p->tmd_skb[i] = NULL;
335 }
336 }
337 }
338 #endif
339 free_irq(dev->irq,dev);
340 return 0;
341 }
342
343 static void cleanup_card(struct net_device *dev)
344 {
345 struct priv *p = dev->ml_priv;
346 disable_dma(dev->dma);
347 free_dma(dev->dma);
348 release_region(dev->base_addr, cards[p->cardno].total_size);
349 ni65_free_buffer(p);
350 }
351
352 /* set: io,irq,dma or set it when calling insmod */
353 static int irq;
354 static int io;
355 static int dma;
356
357 /*
358 * Probe The Card (not the lance-chip)
359 */
360 struct net_device * __init ni65_probe(int unit)
361 {
362 struct net_device *dev = alloc_etherdev(0);
363 static int ports[] = {0x360,0x300,0x320,0x340, 0};
364 int *port;
365 int err = 0;
366
367 if (!dev)
368 return ERR_PTR(-ENOMEM);
369
370 if (unit >= 0) {
371 sprintf(dev->name, "eth%d", unit);
372 netdev_boot_setup_check(dev);
373 irq = dev->irq;
374 dma = dev->dma;
375 } else {
376 dev->base_addr = io;
377 }
378
379 if (dev->base_addr > 0x1ff) { /* Check a single specified location. */
380 err = ni65_probe1(dev, dev->base_addr);
381 } else if (dev->base_addr > 0) { /* Don't probe at all. */
382 err = -ENXIO;
383 } else {
384 for (port = ports; *port && ni65_probe1(dev, *port); port++)
385 ;
386 if (!*port)
387 err = -ENODEV;
388 }
389 if (err)
390 goto out;
391
392 err = register_netdev(dev);
393 if (err)
394 goto out1;
395 return dev;
396 out1:
397 cleanup_card(dev);
398 out:
399 free_netdev(dev);
400 return ERR_PTR(err);
401 }
402
403 static const struct net_device_ops ni65_netdev_ops = {
404 .ndo_open = ni65_open,
405 .ndo_stop = ni65_close,
406 .ndo_start_xmit = ni65_send_packet,
407 .ndo_tx_timeout = ni65_timeout,
408 .ndo_set_multicast_list = set_multicast_list,
409 .ndo_change_mtu = eth_change_mtu,
410 .ndo_set_mac_address = eth_mac_addr,
411 .ndo_validate_addr = eth_validate_addr,
412 };
413
414 /*
415 * this is the real card probe ..
416 */
417 static int __init ni65_probe1(struct net_device *dev,int ioaddr)
418 {
419 int i,j;
420 struct priv *p;
421 unsigned long flags;
422
423 dev->irq = irq;
424 dev->dma = dma;
425
426 for(i=0;i<NUM_CARDS;i++) {
427 if(!request_region(ioaddr, cards[i].total_size, cards[i].cardname))
428 continue;
429 if(cards[i].id_offset >= 0) {
430 if(inb(ioaddr+cards[i].id_offset+0) != cards[i].id0 ||
431 inb(ioaddr+cards[i].id_offset+1) != cards[i].id1) {
432 release_region(ioaddr, cards[i].total_size);
433 continue;
434 }
435 }
436 if(cards[i].vendor_id) {
437 for(j=0;j<3;j++)
438 if(inb(ioaddr+cards[i].addr_offset+j) != cards[i].vendor_id[j]) {
439 release_region(ioaddr, cards[i].total_size);
440 continue;
441 }
442 }
443 break;
444 }
445 if(i == NUM_CARDS)
446 return -ENODEV;
447
448 for(j=0;j<6;j++)
449 dev->dev_addr[j] = inb(ioaddr+cards[i].addr_offset+j);
450
451 if( (j=ni65_alloc_buffer(dev)) < 0) {
452 release_region(ioaddr, cards[i].total_size);
453 return j;
454 }
455 p = dev->ml_priv;
456 p->cmdr_addr = ioaddr + cards[i].cmd_offset;
457 p->cardno = i;
458 spin_lock_init(&p->ring_lock);
459
460 printk(KERN_INFO "%s: %s found at %#3x, ", dev->name, cards[p->cardno].cardname , ioaddr);
461
462 outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
463 if( (j=readreg(CSR0)) != 0x4) {
464 printk("failed.\n");
465 printk(KERN_ERR "%s: Can't RESET card: %04x\n", dev->name, j);
466 ni65_free_buffer(p);
467 release_region(ioaddr, cards[p->cardno].total_size);
468 return -EAGAIN;
469 }
470
471 outw(88,PORT+L_ADDRREG);
472 if(inw(PORT+L_ADDRREG) == 88) {
473 unsigned long v;
474 v = inw(PORT+L_DATAREG);
475 v <<= 16;
476 outw(89,PORT+L_ADDRREG);
477 v |= inw(PORT+L_DATAREG);
478 printk("Version %#08lx, ",v);
479 p->features = INIT_RING_BEFORE_START;
480 }
481 else {
482 printk("ancient LANCE, ");
483 p->features = 0x0;
484 }
485
486 if(test_bit(0,&cards[i].config)) {
487 dev->irq = irqtab[(inw(ioaddr+L_CONFIG)>>2)&3];
488 dev->dma = dmatab[inw(ioaddr+L_CONFIG)&3];
489 printk("IRQ %d (from card), DMA %d (from card).\n",dev->irq,dev->dma);
490 }
491 else {
492 if(dev->dma == 0) {
493 /* 'stuck test' from lance.c */
494 unsigned long dma_channels =
495 ((inb(DMA1_STAT_REG) >> 4) & 0x0f)
496 | (inb(DMA2_STAT_REG) & 0xf0);
497 for(i=1;i<5;i++) {
498 int dma = dmatab[i];
499 if(test_bit(dma,&dma_channels) || request_dma(dma,"ni6510"))
500 continue;
501
502 flags=claim_dma_lock();
503 disable_dma(dma);
504 set_dma_mode(dma,DMA_MODE_CASCADE);
505 enable_dma(dma);
506 release_dma_lock(flags);
507
508 ni65_init_lance(p,dev->dev_addr,0,0); /* trigger memory access */
509
510 flags=claim_dma_lock();
511 disable_dma(dma);
512 free_dma(dma);
513 release_dma_lock(flags);
514
515 if(readreg(CSR0) & CSR0_IDON)
516 break;
517 }
518 if(i == 5) {
519 printk("failed.\n");
520 printk(KERN_ERR "%s: Can't detect DMA channel!\n", dev->name);
521 ni65_free_buffer(p);
522 release_region(ioaddr, cards[p->cardno].total_size);
523 return -EAGAIN;
524 }
525 dev->dma = dmatab[i];
526 printk("DMA %d (autodetected), ",dev->dma);
527 }
528 else
529 printk("DMA %d (assigned), ",dev->dma);
530
531 if(dev->irq < 2)
532 {
533 unsigned long irq_mask;
534
535 ni65_init_lance(p,dev->dev_addr,0,0);
536 irq_mask = probe_irq_on();
537 writereg(CSR0_INIT|CSR0_INEA,CSR0); /* trigger interrupt */
538 msleep(20);
539 dev->irq = probe_irq_off(irq_mask);
540 if(!dev->irq)
541 {
542 printk("Failed to detect IRQ line!\n");
543 ni65_free_buffer(p);
544 release_region(ioaddr, cards[p->cardno].total_size);
545 return -EAGAIN;
546 }
547 printk("IRQ %d (autodetected).\n",dev->irq);
548 }
549 else
550 printk("IRQ %d (assigned).\n",dev->irq);
551 }
552
553 if(request_dma(dev->dma, cards[p->cardno].cardname ) != 0)
554 {
555 printk(KERN_ERR "%s: Can't request dma-channel %d\n",dev->name,(int) dev->dma);
556 ni65_free_buffer(p);
557 release_region(ioaddr, cards[p->cardno].total_size);
558 return -EAGAIN;
559 }
560
561 dev->base_addr = ioaddr;
562 dev->netdev_ops = &ni65_netdev_ops;
563 dev->watchdog_timeo = HZ/2;
564
565 return 0; /* everything is OK */
566 }
567
568 /*
569 * set lance register and trigger init
570 */
571 static void ni65_init_lance(struct priv *p,unsigned char *daddr,int filter,int mode)
572 {
573 int i;
574 u32 pib;
575
576 writereg(CSR0_CLRALL|CSR0_STOP,CSR0);
577
578 for(i=0;i<6;i++)
579 p->ib.eaddr[i] = daddr[i];
580
581 for(i=0;i<8;i++)
582 p->ib.filter[i] = filter;
583 p->ib.mode = mode;
584
585 p->ib.trp = (u32) isa_virt_to_bus(p->tmdhead) | TMDNUMMASK;
586 p->ib.rrp = (u32) isa_virt_to_bus(p->rmdhead) | RMDNUMMASK;
587 writereg(0,CSR3); /* busmaster/no word-swap */
588 pib = (u32) isa_virt_to_bus(&p->ib);
589 writereg(pib & 0xffff,CSR1);
590 writereg(pib >> 16,CSR2);
591
592 writereg(CSR0_INIT,CSR0); /* this changes L_ADDRREG to CSR0 */
593
594 for(i=0;i<32;i++)
595 {
596 mdelay(4);
597 if(inw(PORT+L_DATAREG) & (CSR0_IDON | CSR0_MERR) )
598 break; /* init ok ? */
599 }
600 }
601
602 /*
603 * allocate memory area and check the 16MB border
604 */
605 static void *ni65_alloc_mem(struct net_device *dev,char *what,int size,int type)
606 {
607 struct sk_buff *skb=NULL;
608 unsigned char *ptr;
609 void *ret;
610
611 if(type) {
612 ret = skb = alloc_skb(2+16+size,GFP_KERNEL|GFP_DMA);
613 if(!skb) {
614 printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev->name,what);
615 return NULL;
616 }
617 skb_reserve(skb,2+16);
618 skb_put(skb,R_BUF_SIZE); /* grab the whole space .. (not necessary) */
619 ptr = skb->data;
620 }
621 else {
622 ret = ptr = kmalloc(T_BUF_SIZE,GFP_KERNEL | GFP_DMA);
623 if(!ret) {
624 printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev->name,what);
625 return NULL;
626 }
627 }
628 if( (u32) virt_to_phys(ptr+size) > 0x1000000) {
629 printk(KERN_WARNING "%s: unable to allocate %s memory in lower 16MB!\n",dev->name,what);
630 if(type)
631 kfree_skb(skb);
632 else
633 kfree(ptr);
634 return NULL;
635 }
636 return ret;
637 }
638
639 /*
640 * allocate all memory structures .. send/recv buffers etc ...
641 */
642 static int ni65_alloc_buffer(struct net_device *dev)
643 {
644 unsigned char *ptr;
645 struct priv *p;
646 int i;
647
648 /*
649 * we need 8-aligned memory ..
650 */
651 ptr = ni65_alloc_mem(dev,"BUFFER",sizeof(struct priv)+8,0);
652 if(!ptr)
653 return -ENOMEM;
654
655 p = dev->ml_priv = (struct priv *) (((unsigned long) ptr + 7) & ~0x7);
656 memset((char *)p, 0, sizeof(struct priv));
657 p->self = ptr;
658
659 for(i=0;i<TMDNUM;i++)
660 {
661 #ifdef XMT_VIA_SKB
662 p->tmd_skb[i] = NULL;
663 #endif
664 p->tmdbounce[i] = ni65_alloc_mem(dev,"XMIT",T_BUF_SIZE,0);
665 if(!p->tmdbounce[i]) {
666 ni65_free_buffer(p);
667 return -ENOMEM;
668 }
669 }
670
671 for(i=0;i<RMDNUM;i++)
672 {
673 #ifdef RCV_VIA_SKB
674 p->recv_skb[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,1);
675 if(!p->recv_skb[i]) {
676 ni65_free_buffer(p);
677 return -ENOMEM;
678 }
679 #else
680 p->recvbounce[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,0);
681 if(!p->recvbounce[i]) {
682 ni65_free_buffer(p);
683 return -ENOMEM;
684 }
685 #endif
686 }
687
688 return 0; /* everything is OK */
689 }
690
691 /*
692 * free buffers and private struct
693 */
694 static void ni65_free_buffer(struct priv *p)
695 {
696 int i;
697
698 if(!p)
699 return;
700
701 for(i=0;i<TMDNUM;i++) {
702 kfree(p->tmdbounce[i]);
703 #ifdef XMT_VIA_SKB
704 if(p->tmd_skb[i])
705 dev_kfree_skb(p->tmd_skb[i]);
706 #endif
707 }
708
709 for(i=0;i<RMDNUM;i++)
710 {
711 #ifdef RCV_VIA_SKB
712 if(p->recv_skb[i])
713 dev_kfree_skb(p->recv_skb[i]);
714 #else
715 kfree(p->recvbounce[i]);
716 #endif
717 }
718 kfree(p->self);
719 }
720
721
722 /*
723 * stop and (re)start lance .. e.g after an error
724 */
725 static void ni65_stop_start(struct net_device *dev,struct priv *p)
726 {
727 int csr0 = CSR0_INEA;
728
729 writedatareg(CSR0_STOP);
730
731 if(debuglevel > 1)
732 printk(KERN_DEBUG "ni65_stop_start\n");
733
734 if(p->features & INIT_RING_BEFORE_START) {
735 int i;
736 #ifdef XMT_VIA_SKB
737 struct sk_buff *skb_save[TMDNUM];
738 #endif
739 unsigned long buffer[TMDNUM];
740 short blen[TMDNUM];
741
742 if(p->xmit_queued) {
743 while(1) {
744 if((p->tmdhead[p->tmdlast].u.s.status & XMIT_OWN))
745 break;
746 p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
747 if(p->tmdlast == p->tmdnum)
748 break;
749 }
750 }
751
752 for(i=0;i<TMDNUM;i++) {
753 struct tmd *tmdp = p->tmdhead + i;
754 #ifdef XMT_VIA_SKB
755 skb_save[i] = p->tmd_skb[i];
756 #endif
757 buffer[i] = (u32) isa_bus_to_virt(tmdp->u.buffer);
758 blen[i] = tmdp->blen;
759 tmdp->u.s.status = 0x0;
760 }
761
762 for(i=0;i<RMDNUM;i++) {
763 struct rmd *rmdp = p->rmdhead + i;
764 rmdp->u.s.status = RCV_OWN;
765 }
766 p->tmdnum = p->xmit_queued = 0;
767 writedatareg(CSR0_STRT | csr0);
768
769 for(i=0;i<TMDNUM;i++) {
770 int num = (i + p->tmdlast) & (TMDNUM-1);
771 p->tmdhead[i].u.buffer = (u32) isa_virt_to_bus((char *)buffer[num]); /* status is part of buffer field */
772 p->tmdhead[i].blen = blen[num];
773 if(p->tmdhead[i].u.s.status & XMIT_OWN) {
774 p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
775 p->xmit_queued = 1;
776 writedatareg(CSR0_TDMD | CSR0_INEA | csr0);
777 }
778 #ifdef XMT_VIA_SKB
779 p->tmd_skb[i] = skb_save[num];
780 #endif
781 }
782 p->rmdnum = p->tmdlast = 0;
783 if(!p->lock)
784 if (p->tmdnum || !p->xmit_queued)
785 netif_wake_queue(dev);
786 dev->trans_start = jiffies;
787 }
788 else
789 writedatareg(CSR0_STRT | csr0);
790 }
791
792 /*
793 * init lance (write init-values .. init-buffers) (open-helper)
794 */
795 static int ni65_lance_reinit(struct net_device *dev)
796 {
797 int i;
798 struct priv *p = dev->ml_priv;
799 unsigned long flags;
800
801 p->lock = 0;
802 p->xmit_queued = 0;
803
804 flags=claim_dma_lock();
805 disable_dma(dev->dma); /* I've never worked with dma, but we do it like the packetdriver */
806 set_dma_mode(dev->dma,DMA_MODE_CASCADE);
807 enable_dma(dev->dma);
808 release_dma_lock(flags);
809
810 outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
811 if( (i=readreg(CSR0) ) != 0x4)
812 {
813 printk(KERN_ERR "%s: can't RESET %s card: %04x\n",dev->name,
814 cards[p->cardno].cardname,(int) i);
815 flags=claim_dma_lock();
816 disable_dma(dev->dma);
817 release_dma_lock(flags);
818 return 0;
819 }
820
821 p->rmdnum = p->tmdnum = p->tmdlast = p->tmdbouncenum = 0;
822 for(i=0;i<TMDNUM;i++)
823 {
824 struct tmd *tmdp = p->tmdhead + i;
825 #ifdef XMT_VIA_SKB
826 if(p->tmd_skb[i]) {
827 dev_kfree_skb(p->tmd_skb[i]);
828 p->tmd_skb[i] = NULL;
829 }
830 #endif
831 tmdp->u.buffer = 0x0;
832 tmdp->u.s.status = XMIT_START | XMIT_END;
833 tmdp->blen = tmdp->status2 = 0;
834 }
835
836 for(i=0;i<RMDNUM;i++)
837 {
838 struct rmd *rmdp = p->rmdhead + i;
839 #ifdef RCV_VIA_SKB
840 rmdp->u.buffer = (u32) isa_virt_to_bus(p->recv_skb[i]->data);
841 #else
842 rmdp->u.buffer = (u32) isa_virt_to_bus(p->recvbounce[i]);
843 #endif
844 rmdp->blen = -(R_BUF_SIZE-8);
845 rmdp->mlen = 0;
846 rmdp->u.s.status = RCV_OWN;
847 }
848
849 if(dev->flags & IFF_PROMISC)
850 ni65_init_lance(p,dev->dev_addr,0x00,M_PROM);
851 else if(dev->mc_count || dev->flags & IFF_ALLMULTI)
852 ni65_init_lance(p,dev->dev_addr,0xff,0x0);
853 else
854 ni65_init_lance(p,dev->dev_addr,0x00,0x00);
855
856 /*
857 * ni65_set_lance_mem() sets L_ADDRREG to CSR0
858 * NOW, WE WILL NEVER CHANGE THE L_ADDRREG, CSR0 IS ALWAYS SELECTED
859 */
860
861 if(inw(PORT+L_DATAREG) & CSR0_IDON) {
862 ni65_set_performance(p);
863 /* init OK: start lance , enable interrupts */
864 writedatareg(CSR0_CLRALL | CSR0_INEA | CSR0_STRT);
865 return 1; /* ->OK */
866 }
867 printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev->name,(int) inw(PORT+L_DATAREG));
868 flags=claim_dma_lock();
869 disable_dma(dev->dma);
870 release_dma_lock(flags);
871 return 0; /* ->Error */
872 }
873
874 /*
875 * interrupt handler
876 */
877 static irqreturn_t ni65_interrupt(int irq, void * dev_id)
878 {
879 int csr0 = 0;
880 struct net_device *dev = dev_id;
881 struct priv *p;
882 int bcnt = 32;
883
884 p = dev->ml_priv;
885
886 spin_lock(&p->ring_lock);
887
888 while(--bcnt) {
889 csr0 = inw(PORT+L_DATAREG);
890
891 #if 0
892 writedatareg( (csr0 & CSR0_CLRALL) ); /* ack interrupts, disable int. */
893 #else
894 writedatareg( (csr0 & CSR0_CLRALL) | CSR0_INEA ); /* ack interrupts, interrupts enabled */
895 #endif
896
897 if(!(csr0 & (CSR0_ERR | CSR0_RINT | CSR0_TINT)))
898 break;
899
900 if(csr0 & CSR0_RINT) /* RECV-int? */
901 ni65_recv_intr(dev,csr0);
902 if(csr0 & CSR0_TINT) /* XMIT-int? */
903 ni65_xmit_intr(dev,csr0);
904
905 if(csr0 & CSR0_ERR)
906 {
907 if(debuglevel > 1)
908 printk(KERN_ERR "%s: general error: %04x.\n",dev->name,csr0);
909 if(csr0 & CSR0_BABL)
910 dev->stats.tx_errors++;
911 if(csr0 & CSR0_MISS) {
912 int i;
913 for(i=0;i<RMDNUM;i++)
914 printk("%02x ",p->rmdhead[i].u.s.status);
915 printk("\n");
916 dev->stats.rx_errors++;
917 }
918 if(csr0 & CSR0_MERR) {
919 if(debuglevel > 1)
920 printk(KERN_ERR "%s: Ooops .. memory error: %04x.\n",dev->name,csr0);
921 ni65_stop_start(dev,p);
922 }
923 }
924 }
925
926 #ifdef RCV_PARANOIA_CHECK
927 {
928 int j;
929 for(j=0;j<RMDNUM;j++)
930 {
931 int i, num2;
932 for(i=RMDNUM-1;i>0;i--) {
933 num2 = (p->rmdnum + i) & (RMDNUM-1);
934 if(!(p->rmdhead[num2].u.s.status & RCV_OWN))
935 break;
936 }
937
938 if(i) {
939 int k, num1;
940 for(k=0;k<RMDNUM;k++) {
941 num1 = (p->rmdnum + k) & (RMDNUM-1);
942 if(!(p->rmdhead[num1].u.s.status & RCV_OWN))
943 break;
944 }
945 if(!k)
946 break;
947
948 if(debuglevel > 0)
949 {
950 char buf[256],*buf1;
951 buf1 = buf;
952 for(k=0;k<RMDNUM;k++) {
953 sprintf(buf1,"%02x ",(p->rmdhead[k].u.s.status)); /* & RCV_OWN) ); */
954 buf1 += 3;
955 }
956 *buf1 = 0;
957 printk(KERN_ERR "%s: Ooops, receive ring corrupted %2d %2d | %s\n",dev->name,p->rmdnum,i,buf);
958 }
959
960 p->rmdnum = num1;
961 ni65_recv_intr(dev,csr0);
962 if((p->rmdhead[num2].u.s.status & RCV_OWN))
963 break; /* ok, we are 'in sync' again */
964 }
965 else
966 break;
967 }
968 }
969 #endif
970
971 if( (csr0 & (CSR0_RXON | CSR0_TXON)) != (CSR0_RXON | CSR0_TXON) ) {
972 printk(KERN_DEBUG "%s: RX or TX was offline -> restart\n",dev->name);
973 ni65_stop_start(dev,p);
974 }
975 else
976 writedatareg(CSR0_INEA);
977
978 spin_unlock(&p->ring_lock);
979 return IRQ_HANDLED;
980 }
981
982 /*
983 * We have received an Xmit-Interrupt ..
984 * send a new packet if necessary
985 */
986 static void ni65_xmit_intr(struct net_device *dev,int csr0)
987 {
988 struct priv *p = dev->ml_priv;
989
990 while(p->xmit_queued)
991 {
992 struct tmd *tmdp = p->tmdhead + p->tmdlast;
993 int tmdstat = tmdp->u.s.status;
994
995 if(tmdstat & XMIT_OWN)
996 break;
997
998 if(tmdstat & XMIT_ERR)
999 {
1000 #if 0
1001 if(tmdp->status2 & XMIT_TDRMASK && debuglevel > 3)
1002 printk(KERN_ERR "%s: tdr-problems (e.g. no resistor)\n",dev->name);
1003 #endif
1004 /* checking some errors */
1005 if(tmdp->status2 & XMIT_RTRY)
1006 dev->stats.tx_aborted_errors++;
1007 if(tmdp->status2 & XMIT_LCAR)
1008 dev->stats.tx_carrier_errors++;
1009 if(tmdp->status2 & (XMIT_BUFF | XMIT_UFLO )) {
1010 /* this stops the xmitter */
1011 dev->stats.tx_fifo_errors++;
1012 if(debuglevel > 0)
1013 printk(KERN_ERR "%s: Xmit FIFO/BUFF error\n",dev->name);
1014 if(p->features & INIT_RING_BEFORE_START) {
1015 tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END; /* test: resend this frame */
1016 ni65_stop_start(dev,p);
1017 break; /* no more Xmit processing .. */
1018 }
1019 else
1020 ni65_stop_start(dev,p);
1021 }
1022 if(debuglevel > 2)
1023 printk(KERN_ERR "%s: xmit-error: %04x %02x-%04x\n",dev->name,csr0,(int) tmdstat,(int) tmdp->status2);
1024 if(!(csr0 & CSR0_BABL)) /* don't count errors twice */
1025 dev->stats.tx_errors++;
1026 tmdp->status2 = 0;
1027 }
1028 else {
1029 dev->stats.tx_bytes -= (short)(tmdp->blen);
1030 dev->stats.tx_packets++;
1031 }
1032
1033 #ifdef XMT_VIA_SKB
1034 if(p->tmd_skb[p->tmdlast]) {
1035 dev_kfree_skb_irq(p->tmd_skb[p->tmdlast]);
1036 p->tmd_skb[p->tmdlast] = NULL;
1037 }
1038 #endif
1039
1040 p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
1041 if(p->tmdlast == p->tmdnum)
1042 p->xmit_queued = 0;
1043 }
1044 netif_wake_queue(dev);
1045 }
1046
1047 /*
1048 * We have received a packet
1049 */
1050 static void ni65_recv_intr(struct net_device *dev,int csr0)
1051 {
1052 struct rmd *rmdp;
1053 int rmdstat,len;
1054 int cnt=0;
1055 struct priv *p = dev->ml_priv;
1056
1057 rmdp = p->rmdhead + p->rmdnum;
1058 while(!( (rmdstat = rmdp->u.s.status) & RCV_OWN))
1059 {
1060 cnt++;
1061 if( (rmdstat & (RCV_START | RCV_END | RCV_ERR)) != (RCV_START | RCV_END) ) /* error or oversized? */
1062 {
1063 if(!(rmdstat & RCV_ERR)) {
1064 if(rmdstat & RCV_START)
1065 {
1066 dev->stats.rx_length_errors++;
1067 printk(KERN_ERR "%s: recv, packet too long: %d\n",dev->name,rmdp->mlen & 0x0fff);
1068 }
1069 }
1070 else {
1071 if(debuglevel > 2)
1072 printk(KERN_ERR "%s: receive-error: %04x, lance-status: %04x/%04x\n",
1073 dev->name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) );
1074 if(rmdstat & RCV_FRAM)
1075 dev->stats.rx_frame_errors++;
1076 if(rmdstat & RCV_OFLO)
1077 dev->stats.rx_over_errors++;
1078 if(rmdstat & RCV_CRC)
1079 dev->stats.rx_crc_errors++;
1080 if(rmdstat & RCV_BUF_ERR)
1081 dev->stats.rx_fifo_errors++;
1082 }
1083 if(!(csr0 & CSR0_MISS)) /* don't count errors twice */
1084 dev->stats.rx_errors++;
1085 }
1086 else if( (len = (rmdp->mlen & 0x0fff) - 4) >= 60)
1087 {
1088 #ifdef RCV_VIA_SKB
1089 struct sk_buff *skb = alloc_skb(R_BUF_SIZE+2+16,GFP_ATOMIC);
1090 if (skb)
1091 skb_reserve(skb,16);
1092 #else
1093 struct sk_buff *skb = dev_alloc_skb(len+2);
1094 #endif
1095 if(skb)
1096 {
1097 skb_reserve(skb,2);
1098 #ifdef RCV_VIA_SKB
1099 if( (unsigned long) (skb->data + R_BUF_SIZE) > 0x1000000) {
1100 skb_put(skb,len);
1101 skb_copy_to_linear_data(skb, (unsigned char *)(p->recv_skb[p->rmdnum]->data),len);
1102 }
1103 else {
1104 struct sk_buff *skb1 = p->recv_skb[p->rmdnum];
1105 skb_put(skb,R_BUF_SIZE);
1106 p->recv_skb[p->rmdnum] = skb;
1107 rmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
1108 skb = skb1;
1109 skb_trim(skb,len);
1110 }
1111 #else
1112 skb_put(skb,len);
1113 skb_copy_to_linear_data(skb, (unsigned char *) p->recvbounce[p->rmdnum],len);
1114 #endif
1115 dev->stats.rx_packets++;
1116 dev->stats.rx_bytes += len;
1117 skb->protocol=eth_type_trans(skb,dev);
1118 netif_rx(skb);
1119 }
1120 else
1121 {
1122 printk(KERN_ERR "%s: can't alloc new sk_buff\n",dev->name);
1123 dev->stats.rx_dropped++;
1124 }
1125 }
1126 else {
1127 printk(KERN_INFO "%s: received runt packet\n",dev->name);
1128 dev->stats.rx_errors++;
1129 }
1130 rmdp->blen = -(R_BUF_SIZE-8);
1131 rmdp->mlen = 0;
1132 rmdp->u.s.status = RCV_OWN; /* change owner */
1133 p->rmdnum = (p->rmdnum + 1) & (RMDNUM-1);
1134 rmdp = p->rmdhead + p->rmdnum;
1135 }
1136 }
1137
1138 /*
1139 * kick xmitter ..
1140 */
1141
1142 static void ni65_timeout(struct net_device *dev)
1143 {
1144 int i;
1145 struct priv *p = dev->ml_priv;
1146
1147 printk(KERN_ERR "%s: xmitter timed out, try to restart!\n",dev->name);
1148 for(i=0;i<TMDNUM;i++)
1149 printk("%02x ",p->tmdhead[i].u.s.status);
1150 printk("\n");
1151 ni65_lance_reinit(dev);
1152 dev->trans_start = jiffies;
1153 netif_wake_queue(dev);
1154 }
1155
1156 /*
1157 * Send a packet
1158 */
1159
1160 static int ni65_send_packet(struct sk_buff *skb, struct net_device *dev)
1161 {
1162 struct priv *p = dev->ml_priv;
1163
1164 netif_stop_queue(dev);
1165
1166 if (test_and_set_bit(0, (void*)&p->lock)) {
1167 printk(KERN_ERR "%s: Queue was locked.\n", dev->name);
1168 return NETDEV_TX_BUSY;
1169 }
1170
1171 {
1172 short len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
1173 struct tmd *tmdp;
1174 unsigned long flags;
1175
1176 #ifdef XMT_VIA_SKB
1177 if( (unsigned long) (skb->data + skb->len) > 0x1000000) {
1178 #endif
1179
1180 skb_copy_from_linear_data(skb, p->tmdbounce[p->tmdbouncenum],
1181 skb->len > T_BUF_SIZE ? T_BUF_SIZE :
1182 skb->len);
1183 if (len > skb->len)
1184 memset((char *)p->tmdbounce[p->tmdbouncenum]+skb->len, 0, len-skb->len);
1185 dev_kfree_skb (skb);
1186
1187 spin_lock_irqsave(&p->ring_lock, flags);
1188 tmdp = p->tmdhead + p->tmdnum;
1189 tmdp->u.buffer = (u32) isa_virt_to_bus(p->tmdbounce[p->tmdbouncenum]);
1190 p->tmdbouncenum = (p->tmdbouncenum + 1) & (TMDNUM - 1);
1191
1192 #ifdef XMT_VIA_SKB
1193 }
1194 else {
1195 spin_lock_irqsave(&p->ring_lock, flags);
1196
1197 tmdp = p->tmdhead + p->tmdnum;
1198 tmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
1199 p->tmd_skb[p->tmdnum] = skb;
1200 }
1201 #endif
1202 tmdp->blen = -len;
1203
1204 tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END;
1205 writedatareg(CSR0_TDMD | CSR0_INEA); /* enable xmit & interrupt */
1206
1207 p->xmit_queued = 1;
1208 p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
1209
1210 if(p->tmdnum != p->tmdlast)
1211 netif_wake_queue(dev);
1212
1213 p->lock = 0;
1214 dev->trans_start = jiffies;
1215
1216 spin_unlock_irqrestore(&p->ring_lock, flags);
1217 }
1218
1219 return NETDEV_TX_OK;
1220 }
1221
1222 static void set_multicast_list(struct net_device *dev)
1223 {
1224 if(!ni65_lance_reinit(dev))
1225 printk(KERN_ERR "%s: Can't switch card into MC mode!\n",dev->name);
1226 netif_wake_queue(dev);
1227 }
1228
1229 #ifdef MODULE
1230 static struct net_device *dev_ni65;
1231
1232 module_param(irq, int, 0);
1233 module_param(io, int, 0);
1234 module_param(dma, int, 0);
1235 MODULE_PARM_DESC(irq, "ni6510 IRQ number (ignored for some cards)");
1236 MODULE_PARM_DESC(io, "ni6510 I/O base address");
1237 MODULE_PARM_DESC(dma, "ni6510 ISA DMA channel (ignored for some cards)");
1238
1239 int __init init_module(void)
1240 {
1241 dev_ni65 = ni65_probe(-1);
1242 return IS_ERR(dev_ni65) ? PTR_ERR(dev_ni65) : 0;
1243 }
1244
1245 void __exit cleanup_module(void)
1246 {
1247 unregister_netdev(dev_ni65);
1248 cleanup_card(dev_ni65);
1249 free_netdev(dev_ni65);
1250 }
1251 #endif /* MODULE */
1252
1253 MODULE_LICENSE("GPL");
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