arch/arm/boot/dts/prima2-cb.dts

   1 /dts-v1/;
   2 / {
   3         model = "SiRF Prima2 eVB";
   4         compatible = "sirf,prima2-cb", "sirf,prima2";
   5         #address-cells = <1>;
   6         #size-cells = <1>;
   7         interrupt-parent = <&intc>;
   8
   9         memory {
  10                 reg = <0x00000000 0x20000000>;
  11         };
  12
  13         chosen {
  14                 bootargs = "mem=512M real_root=/dev/mmcblk0p2 console=ttyS0 panel=1 bootsplash=true bpp=16 androidboot.console=ttyS1";
  15                 linux,stdout-path = &uart1;
  16         };
  17
  18         cpus {
  19                 #address-cells = <1>;
  20                 #size-cells = <0>;
  21
  22                 cpu@0 {
  23                         reg = <0x0>;
  24                         d-cache-line-size = <32>;
  25                         i-cache-line-size = <32>;
  26                         d-cache-size = <32768>;
  27                         i-cache-size = <32768>;
  28                         /* from bootloader */
  29                         timebase-frequency = <0>;
  30                         bus-frequency = <0>;
  31                         clock-frequency = <0>;
  32                 };
  33         };
  34
  35         axi {
  36                 compatible = "simple-bus";
  37                 #address-cells = <1>;
  38                 #size-cells = <1>;
  39                 ranges = <0x40000000 0x40000000 0x80000000>;
  40
  41                 l2-cache-controller@80040000 {
  42                         compatible = "arm,pl310-cache";
  43                         reg = <0x80040000 0x1000>;
  44                         interrupts = <59>;
  45                 };
  46
  47                 intc: interrupt-controller@80020000 {
  48                         #interrupt-cells = <1>;
  49                         interrupt-controller;
  50                         compatible = "sirf,prima2-intc";
  51                         reg = <0x80020000 0x1000>;
  52                 };
  53
  54                 sys-iobg {
  55                         compatible = "simple-bus";
  56                         #address-cells = <1>;
  57                         #size-cells = <1>;
  58                         ranges = <0x88000000 0x88000000 0x40000>;
  59
  60                         clock-controller@88000000 {
  61                                 compatible = "sirf,prima2-clkc";
  62                                 reg = <0x88000000 0x1000>;
  63                                 interrupts = <3>;
  64                         };
  65
  66                         reset-controller@88010000 {
  67                                 compatible = "sirf,prima2-rstc";
  68                                 reg = <0x88010000 0x1000>;
  69                         };
  70                 };
  71
  72                 mem-iobg {
  73                         compatible = "simple-bus";
  74                         #address-cells = <1>;
  75                         #size-cells = <1>;
  76                         ranges = <0x90000000 0x90000000 0x10000>;
  77
  78                         memory-controller@90000000 {
  79                                 compatible = "sirf,prima2-memc";
  80                                 reg = <0x90000000 0x10000>;
  81                                 interrupts = <27>;
  82                         };
  83                 };
  84
  85                 disp-iobg {
  86                         compatible = "simple-bus";
  87                         #address-cells = <1>;
  88                         #size-cells = <1>;
  89                         ranges = <0x90010000 0x90010000 0x30000>;
  90
  91                         display@90010000 {
  92                                 compatible = "sirf,prima2-lcd";
  93                                 reg = <0x90010000 0x20000>;
  94                                 interrupts = <30>;
  95                         };
  96
  97                         vpp@90020000 {
  98                                 compatible = "sirf,prima2-vpp";
  99                                 reg = <0x90020000 0x10000>;
 100                                 interrupts = <31>;
 101                         };
 102                 };
 103
 104                 graphics-iobg {
 105                         compatible = "simple-bus";
 106                         #address-cells = <1>;
 107                         #size-cells = <1>;
 108                         ranges = <0x98000000 0x98000000 0x8000000>;
 109
 110                         graphics@98000000 {
 111                                 compatible = "powervr,sgx531";
 112                                 reg = <0x98000000 0x8000000>;
 113                                 interrupts = <6>;
 114                         };
 115                 };
 116
 117                 multimedia-iobg {
 118                         compatible = "simple-bus";
 119                         #address-cells = <1>;
 120                         #size-cells = <1>;
 121                         ranges = <0xa0000000 0xa0000000 0x8000000>;
 122
 123                         multimedia@a0000000 {
 124                                 compatible = "sirf,prima2-video-codec";
 125                                 reg = <0xa0000000 0x8000000>;
 126                                 interrupts = <5>;
 127                         };
 128                 };
 129
 130                 dsp-iobg {
 131                         compatible = "simple-bus";
 132                         #address-cells = <1>;
 133                         #size-cells = <1>;
 134                         ranges = <0xa8000000 0xa8000000 0x2000000>;
 135
 136                         dspif@a8000000 {
 137                                 compatible = "sirf,prima2-dspif";
 138                                 reg = <0xa8000000 0x10000>;
 139                                 interrupts = <9>;
 140                         };
 141
 142                         gps@a8010000 {
 143                                 compatible = "sirf,prima2-gps";
 144                                 reg = <0xa8010000 0x10000>;
 145                                 interrupts = <7>;
 146                         };
 147
 148                         dsp@a9000000 {
 149                                 compatible = "sirf,prima2-dsp";
 150                                 reg = <0xa9000000 0x1000000>;
 151                                 interrupts = <8>;
 152                         };
 153                 };
 154
 155                 peri-iobg {
 156                         compatible = "simple-bus";
 157                         #address-cells = <1>;
 158                         #size-cells = <1>;
 159                         ranges = <0xb0000000 0xb0000000 0x180000>;
 160
 161                         timer@b0020000 {
 162                                 compatible = "sirf,prima2-tick";
 163                                 reg = <0xb0020000 0x1000>;
 164                                 interrupts = <0>;
 165                         };
 166
 167                         nand@b0030000 {
 168                                 compatible = "sirf,prima2-nand";
 169                                 reg = <0xb0030000 0x10000>;
 170                                 interrupts = <41>;
 171                         };
 172
 173                         audio@b0040000 {
 174                                 compatible = "sirf,prima2-audio";
 175                                 reg = <0xb0040000 0x10000>;
 176                                 interrupts = <35>;
 177                         };
 178
 179                         uart0: uart@b0050000 {
 180                                 cell-index = <0>;
 181                                 compatible = "sirf,prima2-uart";
 182                                 reg = <0xb0050000 0x10000>;
 183                                 interrupts = <17>;
 184                         };
 185
 186                         uart1: uart@b0060000 {
 187                                 cell-index = <1>;
 188                                 compatible = "sirf,prima2-uart";
 189                                 reg = <0xb0060000 0x10000>;
 190                                 interrupts = <18>;
 191                         };
 192
 193                         uart2: uart@b0070000 {
 194                                 cell-index = <2>;
 195                                 compatible = "sirf,prima2-uart";
 196                                 reg = <0xb0070000 0x10000>;
 197                                 interrupts = <19>;
 198                         };
 199
 200                         usp0: usp@b0080000 {
 201                                 cell-index = <0>;
 202                                 compatible = "sirf,prima2-usp";
 203                                 reg = <0xb0080000 0x10000>;
 204                                 interrupts = <20>;
 205                         };
 206
 207                         usp1: usp@b0090000 {
 208                                 cell-index = <1>;
 209                                 compatible = "sirf,prima2-usp";
 210                                 reg = <0xb0090000 0x10000>;
 211                                 interrupts = <21>;
 212                         };
 213
 214                         usp2: usp@b00a0000 {
 215                                 cell-index = <2>;
 216                                 compatible = "sirf,prima2-usp";
 217                                 reg = <0xb00a0000 0x10000>;
 218                                 interrupts = <22>;
 219                         };
 220
 221                         dmac0: dma-controller@b00b0000 {
 222                                 cell-index = <0>;
 223                                 compatible = "sirf,prima2-dmac";
 224                                 reg = <0xb00b0000 0x10000>;
 225                                 interrupts = <12>;
 226                         };
 227
 228                         dmac1: dma-controller@b0160000 {
 229                                 cell-index = <1>;
 230                                 compatible = "sirf,prima2-dmac";
 231                                 reg = <0xb0160000 0x10000>;
 232                                 interrupts = <13>;
 233                         };
 234
 235                         vip@b00C0000 {
 236                                 compatible = "sirf,prima2-vip";
 237                                 reg = <0xb00C0000 0x10000>;
 238                         };
 239
 240                         spi0: spi@b00d0000 {
 241                                 cell-index = <0>;
 242                                 compatible = "sirf,prima2-spi";
 243                                 reg = <0xb00d0000 0x10000>;
 244                                 interrupts = <15>;
 245                         };
 246
 247                         spi1: spi@b0170000 {
 248                                 cell-index = <1>;
 249                                 compatible = "sirf,prima2-spi";
 250                                 reg = <0xb0170000 0x10000>;
 251                                 interrupts = <16>;
 252                         };
 253
 254                         i2c0: i2c@b00e0000 {
 255                                 cell-index = <0>;
 256                                 compatible = "sirf,prima2-i2c";
 257                                 reg = <0xb00e0000 0x10000>;
 258                                 interrupts = <24>;
 259                         };
 260
 261                         i2c1: i2c@b00f0000 {
 262                                 cell-index = <1>;
 263                                 compatible = "sirf,prima2-i2c";
 264                                 reg = <0xb00f0000 0x10000>;
 265                                 interrupts = <25>;
 266                         };
 267
 268                         tsc@b0110000 {
 269                                 compatible = "sirf,prima2-tsc";
 270                                 reg = <0xb0110000 0x10000>;
 271                                 interrupts = <33>;
 272                         };
 273
 274                         gpio: gpio-controller@b0120000 {
 275                                 #gpio-cells = <2>;
 276                                 #interrupt-cells = <2>;
 277                                 compatible = "sirf,prima2-gpio";
 278                                 reg = <0xb0120000 0x10000>;
 279                                 gpio-controller;
 280                                 interrupt-controller;
 281                         };
 282
 283                         pwm@b0130000 {
 284                                 compatible = "sirf,prima2-pwm";
 285                                 reg = <0xb0130000 0x10000>;
 286                         };
 287
 288                         efusesys@b0140000 {
 289                                 compatible = "sirf,prima2-efuse";
 290                                 reg = <0xb0140000 0x10000>;
 291                         };
 292
 293                         pulsec@b0150000 {
 294                                 compatible = "sirf,prima2-pulsec";
 295                                 reg = <0xb0150000 0x10000>;
 296                                 interrupts = <48>;
 297                         };
 298
 299                         pci-iobg {
 300                                 compatible = "sirf,prima2-pciiobg", "simple-bus";
 301                                 #address-cells = <1>;
 302                                 #size-cells = <1>;
 303                                 ranges = <0x56000000 0x56000000 0x1b00000>;
 304
 305                                 sd0: sdhci@56000000 {
 306                                         cell-index = <0>;
 307                                         compatible = "sirf,prima2-sdhc";
 308                                         reg = <0x56000000 0x100000>;
 309                                         interrupts = <38>;
 310                                 };
 311
 312                                 sd1: sdhci@56100000 {
 313                                         cell-index = <1>;
 314                                         compatible = "sirf,prima2-sdhc";
 315                                         reg = <0x56100000 0x100000>;
 316                                         interrupts = <38>;
 317                                 };
 318
 319                                 sd2: sdhci@56200000 {
 320                                         cell-index = <2>;
 321                                         compatible = "sirf,prima2-sdhc";
 322                                         reg = <0x56200000 0x100000>;
 323                                         interrupts = <23>;
 324                                 };
 325
 326                                 sd3: sdhci@56300000 {
 327                                         cell-index = <3>;
 328                                         compatible = "sirf,prima2-sdhc";
 329                                         reg = <0x56300000 0x100000>;
 330                                         interrupts = <23>;
 331                                 };
 332
 333                                 sd4: sdhci@56400000 {
 334                                         cell-index = <4>;
 335                                         compatible = "sirf,prima2-sdhc";
 336                                         reg = <0x56400000 0x100000>;
 337                                         interrupts = <39>;
 338                                 };
 339
 340                                 sd5: sdhci@56500000 {
 341                                         cell-index = <5>;
 342                                         compatible = "sirf,prima2-sdhc";
 343                                         reg = <0x56500000 0x100000>;
 344                                         interrupts = <39>;
 345                                 };
 346
 347                                 pci-copy@57900000 {
 348                                         compatible = "sirf,prima2-pcicp";
 349                                         reg = <0x57900000 0x100000>;
 350                                         interrupts = <40>;
 351                                 };
 352
 353                                 rom-interface@57a00000 {
 354                                         compatible = "sirf,prima2-romif";
 355                                         reg = <0x57a00000 0x100000>;
 356                                 };
 357                         };
 358                 };
 359
 360                 rtc-iobg {
 361                         compatible = "sirf,prima2-rtciobg", "simple-bus";
 362                         #address-cells = <1>;
 363                         #size-cells = <1>;
 364                         reg = <0x80030000 0x10000>;
 365
 366                         gpsrtc@1000 {
 367                                 compatible = "sirf,prima2-gpsrtc";
 368                                 reg = <0x1000 0x1000>;
 369                                 interrupts = <55 56 57>;
 370                         };
 371
 372                         sysrtc@2000 {
 373                                 compatible = "sirf,prima2-sysrtc";
 374                                 reg = <0x2000 0x1000>;
 375                                 interrupts = <52 53 54>;
 376                         };
 377
 378                         pwrc@3000 {
 379                                 compatible = "sirf,prima2-pwrc";
 380                                 reg = <0x3000 0x1000>;
 381                                 interrupts = <32>;
 382                         };
 383                 };
 384
 385                 uus-iobg {
 386                         compatible = "simple-bus";
 387                         #address-cells = <1>;
 388                         #size-cells = <1>;
 389                         ranges = <0xb8000000 0xb8000000 0x40000>;
 390
 391                         usb0: usb@b00e0000 {
 392                                 compatible = "chipidea,ci13611a-prima2";
 393                                 reg = <0xb8000000 0x10000>;
 394                                 interrupts = <10>;
 395                         };
 396
 397                         usb1: usb@b00f0000 {
 398                                 compatible = "chipidea,ci13611a-prima2";
 399                                 reg = <0xb8010000 0x10000>;
 400                                 interrupts = <11>;
 401                         };
 402
 403                         sata@b00f0000 {
 404                                 compatible = "synopsys,dwc-ahsata";
 405                                 reg = <0xb8020000 0x10000>;
 406                                 interrupts = <37>;
 407                         };
 408
 409                         security@b00f0000 {
 410                                 compatible = "sirf,prima2-security";
 411                                 reg = <0xb8030000 0x10000>;
 412                                 interrupts = <42>;
 413                         };
 414                 };
 415         };
 416 };