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Merge remote-tracking branch 's5p/for-next'
[linux-2.6/next.git] / arch / arm / mach-at91 / at91rm9200_devices.c
blob978be950035acb0f9fd4b21c19a3f6e6f11521af
1 /*
2 * arch/arm/mach-at91/at91rm9200_devices.c
3 *
4 * Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
5 * Copyright (C) 2005 David Brownell
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13 #include <asm/mach/arch.h>
14 #include <asm/mach/map.h>
15
16 #include <linux/dma-mapping.h>
17 #include <linux/gpio.h>
18 #include <linux/platform_device.h>
19 #include <linux/i2c-gpio.h>
20
21 #include <mach/board.h>
22 #include <mach/at91rm9200.h>
23 #include <mach/at91rm9200_mc.h>
24
25 #include "generic.h"
26
27
28 /* --------------------------------------------------------------------
29 * USB Host
30 * -------------------------------------------------------------------- */
31
32 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
33 static u64 ohci_dmamask = DMA_BIT_MASK(32);
34 static struct at91_usbh_data usbh_data;
35
36 static struct resource usbh_resources[] = {
37 [0] = {
38 .start = AT91RM9200_UHP_BASE,
39 .end = AT91RM9200_UHP_BASE + SZ_1M - 1,
40 .flags = IORESOURCE_MEM,
41 },
42 [1] = {
43 .start = AT91RM9200_ID_UHP,
44 .end = AT91RM9200_ID_UHP,
45 .flags = IORESOURCE_IRQ,
46 },
47 };
48
49 static struct platform_device at91rm9200_usbh_device = {
50 .name = "at91_ohci",
51 .id = -1,
52 .dev = {
53 .dma_mask = &ohci_dmamask,
54 .coherent_dma_mask = DMA_BIT_MASK(32),
55 .platform_data = &usbh_data,
56 },
57 .resource = usbh_resources,
58 .num_resources = ARRAY_SIZE(usbh_resources),
59 };
60
61 void __init at91_add_device_usbh(struct at91_usbh_data *data)
62 {
63 if (!data)
64 return;
65
66 usbh_data = *data;
67 platform_device_register(&at91rm9200_usbh_device);
68 }
69 #else
70 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
71 #endif
72
73
74 /* --------------------------------------------------------------------
75 * USB Device (Gadget)
76 * -------------------------------------------------------------------- */
77
78 #ifdef CONFIG_USB_GADGET_AT91
79 static struct at91_udc_data udc_data;
80
81 static struct resource udc_resources[] = {
82 [0] = {
83 .start = AT91RM9200_BASE_UDP,
84 .end = AT91RM9200_BASE_UDP + SZ_16K - 1,
85 .flags = IORESOURCE_MEM,
86 },
87 [1] = {
88 .start = AT91RM9200_ID_UDP,
89 .end = AT91RM9200_ID_UDP,
90 .flags = IORESOURCE_IRQ,
91 },
92 };
93
94 static struct platform_device at91rm9200_udc_device = {
95 .name = "at91_udc",
96 .id = -1,
97 .dev = {
98 .platform_data = &udc_data,
99 },
100 .resource = udc_resources,
101 .num_resources = ARRAY_SIZE(udc_resources),
102 };
103
104 void __init at91_add_device_udc(struct at91_udc_data *data)
105 {
106 if (!data)
107 return;
108
109 if (data->vbus_pin) {
110 at91_set_gpio_input(data->vbus_pin, 0);
111 at91_set_deglitch(data->vbus_pin, 1);
112 }
113 if (data->pullup_pin)
114 at91_set_gpio_output(data->pullup_pin, 0);
115
116 udc_data = *data;
117 platform_device_register(&at91rm9200_udc_device);
118 }
119 #else
120 void __init at91_add_device_udc(struct at91_udc_data *data) {}
121 #endif
122
123
124 /* --------------------------------------------------------------------
125 * Ethernet
126 * -------------------------------------------------------------------- */
127
128 #if defined(CONFIG_ARM_AT91_ETHER) || defined(CONFIG_ARM_AT91_ETHER_MODULE)
129 static u64 eth_dmamask = DMA_BIT_MASK(32);
130 static struct at91_eth_data eth_data;
131
132 static struct resource eth_resources[] = {
133 [0] = {
134 .start = AT91_VA_BASE_EMAC,
135 .end = AT91_VA_BASE_EMAC + SZ_16K - 1,
136 .flags = IORESOURCE_MEM,
137 },
138 [1] = {
139 .start = AT91RM9200_ID_EMAC,
140 .end = AT91RM9200_ID_EMAC,
141 .flags = IORESOURCE_IRQ,
142 },
143 };
144
145 static struct platform_device at91rm9200_eth_device = {
146 .name = "at91_ether",
147 .id = -1,
148 .dev = {
149 .dma_mask = &eth_dmamask,
150 .coherent_dma_mask = DMA_BIT_MASK(32),
151 .platform_data = &eth_data,
152 },
153 .resource = eth_resources,
154 .num_resources = ARRAY_SIZE(eth_resources),
155 };
156
157 void __init at91_add_device_eth(struct at91_eth_data *data)
158 {
159 if (!data)
160 return;
161
162 if (data->phy_irq_pin) {
163 at91_set_gpio_input(data->phy_irq_pin, 0);
164 at91_set_deglitch(data->phy_irq_pin, 1);
165 }
166
167 /* Pins used for MII and RMII */
168 at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */
169 at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */
170 at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */
171 at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
172 at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
173 at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */
174 at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */
175 at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */
176 at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */
177 at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */
178
179 if (!data->is_rmii) {
180 at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */
181 at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */
182 at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */
183 at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */
184 at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */
185 at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */
186 at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */
187 at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */
188 }
189
190 eth_data = *data;
191 platform_device_register(&at91rm9200_eth_device);
192 }
193 #else
194 void __init at91_add_device_eth(struct at91_eth_data *data) {}
195 #endif
196
197
198 /* --------------------------------------------------------------------
199 * Compact Flash / PCMCIA
200 * -------------------------------------------------------------------- */
201
202 #if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE)
203 static struct at91_cf_data cf_data;
204
205 #define CF_BASE AT91_CHIPSELECT_4
206
207 static struct resource cf_resources[] = {
208 [0] = {
209 .start = CF_BASE,
210 /* ties up CS4, CS5 and CS6 */
211 .end = CF_BASE + (0x30000000 - 1),
212 .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT,
213 },
214 };
215
216 static struct platform_device at91rm9200_cf_device = {
217 .name = "at91_cf",
218 .id = -1,
219 .dev = {
220 .platform_data = &cf_data,
221 },
222 .resource = cf_resources,
223 .num_resources = ARRAY_SIZE(cf_resources),
224 };
225
226 void __init at91_add_device_cf(struct at91_cf_data *data)
227 {
228 unsigned int csa;
229
230 if (!data)
231 return;
232
233 data->chipselect = 4; /* can only use EBI ChipSelect 4 */
234
235 /* CF takes over CS4, CS5, CS6 */
236 csa = at91_sys_read(AT91_EBI_CSA);
237 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS4A_SMC_COMPACTFLASH);
238
239 /*
240 * Static memory controller timing adjustments.
241 * REVISIT: these timings are in terms of MCK cycles, so
242 * when MCK changes (cpufreq etc) so must these values...
243 */
244 at91_sys_write(AT91_SMC_CSR(4),
245 AT91_SMC_ACSS_STD
246 | AT91_SMC_DBW_16
247 | AT91_SMC_BAT
248 | AT91_SMC_WSEN
249 | AT91_SMC_NWS_(32) /* wait states */
250 | AT91_SMC_RWSETUP_(6) /* setup time */
251 | AT91_SMC_RWHOLD_(4) /* hold time */
252 );
253
254 /* input/irq */
255 if (data->irq_pin) {
256 at91_set_gpio_input(data->irq_pin, 1);
257 at91_set_deglitch(data->irq_pin, 1);
258 }
259 at91_set_gpio_input(data->det_pin, 1);
260 at91_set_deglitch(data->det_pin, 1);
261
262 /* outputs, initially off */
263 if (data->vcc_pin)
264 at91_set_gpio_output(data->vcc_pin, 0);
265 at91_set_gpio_output(data->rst_pin, 0);
266
267 /* force poweron defaults for these pins ... */
268 at91_set_A_periph(AT91_PIN_PC9, 0); /* A25/CFRNW */
269 at91_set_A_periph(AT91_PIN_PC10, 0); /* NCS4/CFCS */
270 at91_set_A_periph(AT91_PIN_PC11, 0); /* NCS5/CFCE1 */
271 at91_set_A_periph(AT91_PIN_PC12, 0); /* NCS6/CFCE2 */
272
273 /* nWAIT is _not_ a default setting */
274 at91_set_A_periph(AT91_PIN_PC6, 1); /* nWAIT */
275
276 cf_data = *data;
277 platform_device_register(&at91rm9200_cf_device);
278 }
279 #else
280 void __init at91_add_device_cf(struct at91_cf_data *data) {}
281 #endif
282
283
284 /* --------------------------------------------------------------------
285 * MMC / SD
286 * -------------------------------------------------------------------- */
287
288 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
289 static u64 mmc_dmamask = DMA_BIT_MASK(32);
290 static struct at91_mmc_data mmc_data;
291
292 static struct resource mmc_resources[] = {
293 [0] = {
294 .start = AT91RM9200_BASE_MCI,
295 .end = AT91RM9200_BASE_MCI + SZ_16K - 1,
296 .flags = IORESOURCE_MEM,
297 },
298 [1] = {
299 .start = AT91RM9200_ID_MCI,
300 .end = AT91RM9200_ID_MCI,
301 .flags = IORESOURCE_IRQ,
302 },
303 };
304
305 static struct platform_device at91rm9200_mmc_device = {
306 .name = "at91_mci",
307 .id = -1,
308 .dev = {
309 .dma_mask = &mmc_dmamask,
310 .coherent_dma_mask = DMA_BIT_MASK(32),
311 .platform_data = &mmc_data,
312 },
313 .resource = mmc_resources,
314 .num_resources = ARRAY_SIZE(mmc_resources),
315 };
316
317 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
318 {
319 if (!data)
320 return;
321
322 /* input/irq */
323 if (data->det_pin) {
324 at91_set_gpio_input(data->det_pin, 1);
325 at91_set_deglitch(data->det_pin, 1);
326 }
327 if (data->wp_pin)
328 at91_set_gpio_input(data->wp_pin, 1);
329 if (data->vcc_pin)
330 at91_set_gpio_output(data->vcc_pin, 0);
331
332 /* CLK */
333 at91_set_A_periph(AT91_PIN_PA27, 0);
334
335 if (data->slot_b) {
336 /* CMD */
337 at91_set_B_periph(AT91_PIN_PA8, 1);
338
339 /* DAT0, maybe DAT1..DAT3 */
340 at91_set_B_periph(AT91_PIN_PA9, 1);
341 if (data->wire4) {
342 at91_set_B_periph(AT91_PIN_PA10, 1);
343 at91_set_B_periph(AT91_PIN_PA11, 1);
344 at91_set_B_periph(AT91_PIN_PA12, 1);
345 }
346 } else {
347 /* CMD */
348 at91_set_A_periph(AT91_PIN_PA28, 1);
349
350 /* DAT0, maybe DAT1..DAT3 */
351 at91_set_A_periph(AT91_PIN_PA29, 1);
352 if (data->wire4) {
353 at91_set_B_periph(AT91_PIN_PB3, 1);
354 at91_set_B_periph(AT91_PIN_PB4, 1);
355 at91_set_B_periph(AT91_PIN_PB5, 1);
356 }
357 }
358
359 mmc_data = *data;
360 platform_device_register(&at91rm9200_mmc_device);
361 }
362 #else
363 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
364 #endif
365
366
367 /* --------------------------------------------------------------------
368 * NAND / SmartMedia
369 * -------------------------------------------------------------------- */
370
371 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
372 static struct atmel_nand_data nand_data;
373
374 #define NAND_BASE AT91_CHIPSELECT_3
375
376 static struct resource nand_resources[] = {
377 {
378 .start = NAND_BASE,
379 .end = NAND_BASE + SZ_256M - 1,
380 .flags = IORESOURCE_MEM,
381 }
382 };
383
384 static struct platform_device at91rm9200_nand_device = {
385 .name = "atmel_nand",
386 .id = -1,
387 .dev = {
388 .platform_data = &nand_data,
389 },
390 .resource = nand_resources,
391 .num_resources = ARRAY_SIZE(nand_resources),
392 };
393
394 void __init at91_add_device_nand(struct atmel_nand_data *data)
395 {
396 unsigned int csa;
397
398 if (!data)
399 return;
400
401 /* enable the address range of CS3 */
402 csa = at91_sys_read(AT91_EBI_CSA);
403 at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
404
405 /* set the bus interface characteristics */
406 at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
407 | AT91_SMC_NWS_(5)
408 | AT91_SMC_TDF_(1)
409 | AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */
410 | AT91_SMC_RWHOLD_(1) /* tDH Data Hold Time 20 - ns */
411 );
412
413 /* enable pin */
414 if (data->enable_pin)
415 at91_set_gpio_output(data->enable_pin, 1);
416
417 /* ready/busy pin */
418 if (data->rdy_pin)
419 at91_set_gpio_input(data->rdy_pin, 1);
420
421 /* card detect pin */
422 if (data->det_pin)
423 at91_set_gpio_input(data->det_pin, 1);
424
425 at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
426 at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
427
428 nand_data = *data;
429 platform_device_register(&at91rm9200_nand_device);
430 }
431 #else
432 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
433 #endif
434
435
436 /* --------------------------------------------------------------------
437 * TWI (i2c)
438 * -------------------------------------------------------------------- */
439
440 /*
441 * Prefer the GPIO code since the TWI controller isn't robust
442 * (gets overruns and underruns under load) and can only issue
443 * repeated STARTs in one scenario (the driver doesn't yet handle them).
444 */
445 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
446
447 static struct i2c_gpio_platform_data pdata = {
448 .sda_pin = AT91_PIN_PA25,
449 .sda_is_open_drain = 1,
450 .scl_pin = AT91_PIN_PA26,
451 .scl_is_open_drain = 1,
452 .udelay = 2, /* ~100 kHz */
453 };
454
455 static struct platform_device at91rm9200_twi_device = {
456 .name = "i2c-gpio",
457 .id = -1,
458 .dev.platform_data = &pdata,
459 };
460
461 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
462 {
463 at91_set_GPIO_periph(AT91_PIN_PA25, 1); /* TWD (SDA) */
464 at91_set_multi_drive(AT91_PIN_PA25, 1);
465
466 at91_set_GPIO_periph(AT91_PIN_PA26, 1); /* TWCK (SCL) */
467 at91_set_multi_drive(AT91_PIN_PA26, 1);
468
469 i2c_register_board_info(0, devices, nr_devices);
470 platform_device_register(&at91rm9200_twi_device);
471 }
472
473 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
474
475 static struct resource twi_resources[] = {
476 [0] = {
477 .start = AT91RM9200_BASE_TWI,
478 .end = AT91RM9200_BASE_TWI + SZ_16K - 1,
479 .flags = IORESOURCE_MEM,
480 },
481 [1] = {
482 .start = AT91RM9200_ID_TWI,
483 .end = AT91RM9200_ID_TWI,
484 .flags = IORESOURCE_IRQ,
485 },
486 };
487
488 static struct platform_device at91rm9200_twi_device = {
489 .name = "at91_i2c",
490 .id = -1,
491 .resource = twi_resources,
492 .num_resources = ARRAY_SIZE(twi_resources),
493 };
494
495 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
496 {
497 /* pins used for TWI interface */
498 at91_set_A_periph(AT91_PIN_PA25, 0); /* TWD */
499 at91_set_multi_drive(AT91_PIN_PA25, 1);
500
501 at91_set_A_periph(AT91_PIN_PA26, 0); /* TWCK */
502 at91_set_multi_drive(AT91_PIN_PA26, 1);
503
504 i2c_register_board_info(0, devices, nr_devices);
505 platform_device_register(&at91rm9200_twi_device);
506 }
507 #else
508 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
509 #endif
510
511
512 /* --------------------------------------------------------------------
513 * SPI
514 * -------------------------------------------------------------------- */
515
516 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
517 static u64 spi_dmamask = DMA_BIT_MASK(32);
518
519 static struct resource spi_resources[] = {
520 [0] = {
521 .start = AT91RM9200_BASE_SPI,
522 .end = AT91RM9200_BASE_SPI + SZ_16K - 1,
523 .flags = IORESOURCE_MEM,
524 },
525 [1] = {
526 .start = AT91RM9200_ID_SPI,
527 .end = AT91RM9200_ID_SPI,
528 .flags = IORESOURCE_IRQ,
529 },
530 };
531
532 static struct platform_device at91rm9200_spi_device = {
533 .name = "atmel_spi",
534 .id = 0,
535 .dev = {
536 .dma_mask = &spi_dmamask,
537 .coherent_dma_mask = DMA_BIT_MASK(32),
538 },
539 .resource = spi_resources,
540 .num_resources = ARRAY_SIZE(spi_resources),
541 };
542
543 static const unsigned spi_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
544
545 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
546 {
547 int i;
548 unsigned long cs_pin;
549
550 at91_set_A_periph(AT91_PIN_PA0, 0); /* MISO */
551 at91_set_A_periph(AT91_PIN_PA1, 0); /* MOSI */
552 at91_set_A_periph(AT91_PIN_PA2, 0); /* SPCK */
553
554 /* Enable SPI chip-selects */
555 for (i = 0; i < nr_devices; i++) {
556 if (devices[i].controller_data)
557 cs_pin = (unsigned long) devices[i].controller_data;
558 else
559 cs_pin = spi_standard_cs[devices[i].chip_select];
560
561 if (devices[i].chip_select == 0) /* for CS0 errata */
562 at91_set_A_periph(cs_pin, 0);
563 else
564 at91_set_gpio_output(cs_pin, 1);
565
566
567 /* pass chip-select pin to driver */
568 devices[i].controller_data = (void *) cs_pin;
569 }
570
571 spi_register_board_info(devices, nr_devices);
572 platform_device_register(&at91rm9200_spi_device);
573 }
574 #else
575 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
576 #endif
577
578
579 /* --------------------------------------------------------------------
580 * Timer/Counter blocks
581 * -------------------------------------------------------------------- */
582
583 #ifdef CONFIG_ATMEL_TCLIB
584
585 static struct resource tcb0_resources[] = {
586 [0] = {
587 .start = AT91RM9200_BASE_TCB0,
588 .end = AT91RM9200_BASE_TCB0 + SZ_16K - 1,
589 .flags = IORESOURCE_MEM,
590 },
591 [1] = {
592 .start = AT91RM9200_ID_TC0,
593 .end = AT91RM9200_ID_TC0,
594 .flags = IORESOURCE_IRQ,
595 },
596 [2] = {
597 .start = AT91RM9200_ID_TC1,
598 .end = AT91RM9200_ID_TC1,
599 .flags = IORESOURCE_IRQ,
600 },
601 [3] = {
602 .start = AT91RM9200_ID_TC2,
603 .end = AT91RM9200_ID_TC2,
604 .flags = IORESOURCE_IRQ,
605 },
606 };
607
608 static struct platform_device at91rm9200_tcb0_device = {
609 .name = "atmel_tcb",
610 .id = 0,
611 .resource = tcb0_resources,
612 .num_resources = ARRAY_SIZE(tcb0_resources),
613 };
614
615 static struct resource tcb1_resources[] = {
616 [0] = {
617 .start = AT91RM9200_BASE_TCB1,
618 .end = AT91RM9200_BASE_TCB1 + SZ_16K - 1,
619 .flags = IORESOURCE_MEM,
620 },
621 [1] = {
622 .start = AT91RM9200_ID_TC3,
623 .end = AT91RM9200_ID_TC3,
624 .flags = IORESOURCE_IRQ,
625 },
626 [2] = {
627 .start = AT91RM9200_ID_TC4,
628 .end = AT91RM9200_ID_TC4,
629 .flags = IORESOURCE_IRQ,
630 },
631 [3] = {
632 .start = AT91RM9200_ID_TC5,
633 .end = AT91RM9200_ID_TC5,
634 .flags = IORESOURCE_IRQ,
635 },
636 };
637
638 static struct platform_device at91rm9200_tcb1_device = {
639 .name = "atmel_tcb",
640 .id = 1,
641 .resource = tcb1_resources,
642 .num_resources = ARRAY_SIZE(tcb1_resources),
643 };
644
645 static void __init at91_add_device_tc(void)
646 {
647 platform_device_register(&at91rm9200_tcb0_device);
648 platform_device_register(&at91rm9200_tcb1_device);
649 }
650 #else
651 static void __init at91_add_device_tc(void) { }
652 #endif
653
654
655 /* --------------------------------------------------------------------
656 * RTC
657 * -------------------------------------------------------------------- */
658
659 #if defined(CONFIG_RTC_DRV_AT91RM9200) || defined(CONFIG_RTC_DRV_AT91RM9200_MODULE)
660 static struct platform_device at91rm9200_rtc_device = {
661 .name = "at91_rtc",
662 .id = -1,
663 .num_resources = 0,
664 };
665
666 static void __init at91_add_device_rtc(void)
667 {
668 platform_device_register(&at91rm9200_rtc_device);
669 }
670 #else
671 static void __init at91_add_device_rtc(void) {}
672 #endif
673
674
675 /* --------------------------------------------------------------------
676 * Watchdog
677 * -------------------------------------------------------------------- */
678
679 #if defined(CONFIG_AT91RM9200_WATCHDOG) || defined(CONFIG_AT91RM9200_WATCHDOG_MODULE)
680 static struct platform_device at91rm9200_wdt_device = {
681 .name = "at91_wdt",
682 .id = -1,
683 .num_resources = 0,
684 };
685
686 static void __init at91_add_device_watchdog(void)
687 {
688 platform_device_register(&at91rm9200_wdt_device);
689 }
690 #else
691 static void __init at91_add_device_watchdog(void) {}
692 #endif
693
694
695 /* --------------------------------------------------------------------
696 * SSC -- Synchronous Serial Controller
697 * -------------------------------------------------------------------- */
698
699 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
700 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
701
702 static struct resource ssc0_resources[] = {
703 [0] = {
704 .start = AT91RM9200_BASE_SSC0,
705 .end = AT91RM9200_BASE_SSC0 + SZ_16K - 1,
706 .flags = IORESOURCE_MEM,
707 },
708 [1] = {
709 .start = AT91RM9200_ID_SSC0,
710 .end = AT91RM9200_ID_SSC0,
711 .flags = IORESOURCE_IRQ,
712 },
713 };
714
715 static struct platform_device at91rm9200_ssc0_device = {
716 .name = "ssc",
717 .id = 0,
718 .dev = {
719 .dma_mask = &ssc0_dmamask,
720 .coherent_dma_mask = DMA_BIT_MASK(32),
721 },
722 .resource = ssc0_resources,
723 .num_resources = ARRAY_SIZE(ssc0_resources),
724 };
725
726 static inline void configure_ssc0_pins(unsigned pins)
727 {
728 if (pins & ATMEL_SSC_TF)
729 at91_set_A_periph(AT91_PIN_PB0, 1);
730 if (pins & ATMEL_SSC_TK)
731 at91_set_A_periph(AT91_PIN_PB1, 1);
732 if (pins & ATMEL_SSC_TD)
733 at91_set_A_periph(AT91_PIN_PB2, 1);
734 if (pins & ATMEL_SSC_RD)
735 at91_set_A_periph(AT91_PIN_PB3, 1);
736 if (pins & ATMEL_SSC_RK)
737 at91_set_A_periph(AT91_PIN_PB4, 1);
738 if (pins & ATMEL_SSC_RF)
739 at91_set_A_periph(AT91_PIN_PB5, 1);
740 }
741
742 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
743
744 static struct resource ssc1_resources[] = {
745 [0] = {
746 .start = AT91RM9200_BASE_SSC1,
747 .end = AT91RM9200_BASE_SSC1 + SZ_16K - 1,
748 .flags = IORESOURCE_MEM,
749 },
750 [1] = {
751 .start = AT91RM9200_ID_SSC1,
752 .end = AT91RM9200_ID_SSC1,
753 .flags = IORESOURCE_IRQ,
754 },
755 };
756
757 static struct platform_device at91rm9200_ssc1_device = {
758 .name = "ssc",
759 .id = 1,
760 .dev = {
761 .dma_mask = &ssc1_dmamask,
762 .coherent_dma_mask = DMA_BIT_MASK(32),
763 },
764 .resource = ssc1_resources,
765 .num_resources = ARRAY_SIZE(ssc1_resources),
766 };
767
768 static inline void configure_ssc1_pins(unsigned pins)
769 {
770 if (pins & ATMEL_SSC_TF)
771 at91_set_A_periph(AT91_PIN_PB6, 1);
772 if (pins & ATMEL_SSC_TK)
773 at91_set_A_periph(AT91_PIN_PB7, 1);
774 if (pins & ATMEL_SSC_TD)
775 at91_set_A_periph(AT91_PIN_PB8, 1);
776 if (pins & ATMEL_SSC_RD)
777 at91_set_A_periph(AT91_PIN_PB9, 1);
778 if (pins & ATMEL_SSC_RK)
779 at91_set_A_periph(AT91_PIN_PB10, 1);
780 if (pins & ATMEL_SSC_RF)
781 at91_set_A_periph(AT91_PIN_PB11, 1);
782 }
783
784 static u64 ssc2_dmamask = DMA_BIT_MASK(32);
785
786 static struct resource ssc2_resources[] = {
787 [0] = {
788 .start = AT91RM9200_BASE_SSC2,
789 .end = AT91RM9200_BASE_SSC2 + SZ_16K - 1,
790 .flags = IORESOURCE_MEM,
791 },
792 [1] = {
793 .start = AT91RM9200_ID_SSC2,
794 .end = AT91RM9200_ID_SSC2,
795 .flags = IORESOURCE_IRQ,
796 },
797 };
798
799 static struct platform_device at91rm9200_ssc2_device = {
800 .name = "ssc",
801 .id = 2,
802 .dev = {
803 .dma_mask = &ssc2_dmamask,
804 .coherent_dma_mask = DMA_BIT_MASK(32),
805 },
806 .resource = ssc2_resources,
807 .num_resources = ARRAY_SIZE(ssc2_resources),
808 };
809
810 static inline void configure_ssc2_pins(unsigned pins)
811 {
812 if (pins & ATMEL_SSC_TF)
813 at91_set_A_periph(AT91_PIN_PB12, 1);
814 if (pins & ATMEL_SSC_TK)
815 at91_set_A_periph(AT91_PIN_PB13, 1);
816 if (pins & ATMEL_SSC_TD)
817 at91_set_A_periph(AT91_PIN_PB14, 1);
818 if (pins & ATMEL_SSC_RD)
819 at91_set_A_periph(AT91_PIN_PB15, 1);
820 if (pins & ATMEL_SSC_RK)
821 at91_set_A_periph(AT91_PIN_PB16, 1);
822 if (pins & ATMEL_SSC_RF)
823 at91_set_A_periph(AT91_PIN_PB17, 1);
824 }
825
826 /*
827 * SSC controllers are accessed through library code, instead of any
828 * kind of all-singing/all-dancing driver. For example one could be
829 * used by a particular I2S audio codec's driver, while another one
830 * on the same system might be used by a custom data capture driver.
831 */
832 void __init at91_add_device_ssc(unsigned id, unsigned pins)
833 {
834 struct platform_device *pdev;
835
836 /*
837 * NOTE: caller is responsible for passing information matching
838 * "pins" to whatever will be using each particular controller.
839 */
840 switch (id) {
841 case AT91RM9200_ID_SSC0:
842 pdev = &at91rm9200_ssc0_device;
843 configure_ssc0_pins(pins);
844 break;
845 case AT91RM9200_ID_SSC1:
846 pdev = &at91rm9200_ssc1_device;
847 configure_ssc1_pins(pins);
848 break;
849 case AT91RM9200_ID_SSC2:
850 pdev = &at91rm9200_ssc2_device;
851 configure_ssc2_pins(pins);
852 break;
853 default:
854 return;
855 }
856
857 platform_device_register(pdev);
858 }
859
860 #else
861 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
862 #endif
863
864
865 /* --------------------------------------------------------------------
866 * UART
867 * -------------------------------------------------------------------- */
868
869 #if defined(CONFIG_SERIAL_ATMEL)
870 static struct resource dbgu_resources[] = {
871 [0] = {
872 .start = AT91_VA_BASE_SYS + AT91_DBGU,
873 .end = AT91_VA_BASE_SYS + AT91_DBGU + SZ_512 - 1,
874 .flags = IORESOURCE_MEM,
875 },
876 [1] = {
877 .start = AT91_ID_SYS,
878 .end = AT91_ID_SYS,
879 .flags = IORESOURCE_IRQ,
880 },
881 };
882
883 static struct atmel_uart_data dbgu_data = {
884 .use_dma_tx = 0,
885 .use_dma_rx = 0, /* DBGU not capable of receive DMA */
886 .regs = (void __iomem *)(AT91_VA_BASE_SYS + AT91_DBGU),
887 };
888
889 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
890
891 static struct platform_device at91rm9200_dbgu_device = {
892 .name = "atmel_usart",
893 .id = 0,
894 .dev = {
895 .dma_mask = &dbgu_dmamask,
896 .coherent_dma_mask = DMA_BIT_MASK(32),
897 .platform_data = &dbgu_data,
898 },
899 .resource = dbgu_resources,
900 .num_resources = ARRAY_SIZE(dbgu_resources),
901 };
902
903 static inline void configure_dbgu_pins(void)
904 {
905 at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */
906 at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */
907 }
908
909 static struct resource uart0_resources[] = {
910 [0] = {
911 .start = AT91RM9200_BASE_US0,
912 .end = AT91RM9200_BASE_US0 + SZ_16K - 1,
913 .flags = IORESOURCE_MEM,
914 },
915 [1] = {
916 .start = AT91RM9200_ID_US0,
917 .end = AT91RM9200_ID_US0,
918 .flags = IORESOURCE_IRQ,
919 },
920 };
921
922 static struct atmel_uart_data uart0_data = {
923 .use_dma_tx = 1,
924 .use_dma_rx = 1,
925 };
926
927 static u64 uart0_dmamask = DMA_BIT_MASK(32);
928
929 static struct platform_device at91rm9200_uart0_device = {
930 .name = "atmel_usart",
931 .id = 1,
932 .dev = {
933 .dma_mask = &uart0_dmamask,
934 .coherent_dma_mask = DMA_BIT_MASK(32),
935 .platform_data = &uart0_data,
936 },
937 .resource = uart0_resources,
938 .num_resources = ARRAY_SIZE(uart0_resources),
939 };
940
941 static inline void configure_usart0_pins(unsigned pins)
942 {
943 at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */
944 at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */
945
946 if (pins & ATMEL_UART_CTS)
947 at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */
948
949 if (pins & ATMEL_UART_RTS) {
950 /*
951 * AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
952 * We need to drive the pin manually. Default is off (RTS is active low).
953 */
954 at91_set_gpio_output(AT91_PIN_PA21, 1);
955 }
956 }
957
958 static struct resource uart1_resources[] = {
959 [0] = {
960 .start = AT91RM9200_BASE_US1,
961 .end = AT91RM9200_BASE_US1 + SZ_16K - 1,
962 .flags = IORESOURCE_MEM,
963 },
964 [1] = {
965 .start = AT91RM9200_ID_US1,
966 .end = AT91RM9200_ID_US1,
967 .flags = IORESOURCE_IRQ,
968 },
969 };
970
971 static struct atmel_uart_data uart1_data = {
972 .use_dma_tx = 1,
973 .use_dma_rx = 1,
974 };
975
976 static u64 uart1_dmamask = DMA_BIT_MASK(32);
977
978 static struct platform_device at91rm9200_uart1_device = {
979 .name = "atmel_usart",
980 .id = 2,
981 .dev = {
982 .dma_mask = &uart1_dmamask,
983 .coherent_dma_mask = DMA_BIT_MASK(32),
984 .platform_data = &uart1_data,
985 },
986 .resource = uart1_resources,
987 .num_resources = ARRAY_SIZE(uart1_resources),
988 };
989
990 static inline void configure_usart1_pins(unsigned pins)
991 {
992 at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */
993 at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */
994
995 if (pins & ATMEL_UART_RI)
996 at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */
997 if (pins & ATMEL_UART_DTR)
998 at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */
999 if (pins & ATMEL_UART_DCD)
1000 at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */
1001 if (pins & ATMEL_UART_CTS)
1002 at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */
1003 if (pins & ATMEL_UART_DSR)
1004 at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */
1005 if (pins & ATMEL_UART_RTS)
1006 at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */
1007 }
1008
1009 static struct resource uart2_resources[] = {
1010 [0] = {
1011 .start = AT91RM9200_BASE_US2,
1012 .end = AT91RM9200_BASE_US2 + SZ_16K - 1,
1013 .flags = IORESOURCE_MEM,
1014 },
1015 [1] = {
1016 .start = AT91RM9200_ID_US2,
1017 .end = AT91RM9200_ID_US2,
1018 .flags = IORESOURCE_IRQ,
1019 },
1020 };
1021
1022 static struct atmel_uart_data uart2_data = {
1023 .use_dma_tx = 1,
1024 .use_dma_rx = 1,
1025 };
1026
1027 static u64 uart2_dmamask = DMA_BIT_MASK(32);
1028
1029 static struct platform_device at91rm9200_uart2_device = {
1030 .name = "atmel_usart",
1031 .id = 3,
1032 .dev = {
1033 .dma_mask = &uart2_dmamask,
1034 .coherent_dma_mask = DMA_BIT_MASK(32),
1035 .platform_data = &uart2_data,
1036 },
1037 .resource = uart2_resources,
1038 .num_resources = ARRAY_SIZE(uart2_resources),
1039 };
1040
1041 static inline void configure_usart2_pins(unsigned pins)
1042 {
1043 at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */
1044 at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */
1045
1046 if (pins & ATMEL_UART_CTS)
1047 at91_set_B_periph(AT91_PIN_PA30, 0); /* CTS2 */
1048 if (pins & ATMEL_UART_RTS)
1049 at91_set_B_periph(AT91_PIN_PA31, 0); /* RTS2 */
1050 }
1051
1052 static struct resource uart3_resources[] = {
1053 [0] = {
1054 .start = AT91RM9200_BASE_US3,
1055 .end = AT91RM9200_BASE_US3 + SZ_16K - 1,
1056 .flags = IORESOURCE_MEM,
1057 },
1058 [1] = {
1059 .start = AT91RM9200_ID_US3,
1060 .end = AT91RM9200_ID_US3,
1061 .flags = IORESOURCE_IRQ,
1062 },
1063 };
1064
1065 static struct atmel_uart_data uart3_data = {
1066 .use_dma_tx = 1,
1067 .use_dma_rx = 1,
1068 };
1069
1070 static u64 uart3_dmamask = DMA_BIT_MASK(32);
1071
1072 static struct platform_device at91rm9200_uart3_device = {
1073 .name = "atmel_usart",
1074 .id = 4,
1075 .dev = {
1076 .dma_mask = &uart3_dmamask,
1077 .coherent_dma_mask = DMA_BIT_MASK(32),
1078 .platform_data = &uart3_data,
1079 },
1080 .resource = uart3_resources,
1081 .num_resources = ARRAY_SIZE(uart3_resources),
1082 };
1083
1084 static inline void configure_usart3_pins(unsigned pins)
1085 {
1086 at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
1087 at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
1088
1089 if (pins & ATMEL_UART_CTS)
1090 at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
1091 if (pins & ATMEL_UART_RTS)
1092 at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
1093 }
1094
1095 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
1096 struct platform_device *atmel_default_console_device; /* the serial console device */
1097
1098 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1099 {
1100 struct platform_device *pdev;
1101 struct atmel_uart_data *pdata;
1102
1103 switch (id) {
1104 case 0: /* DBGU */
1105 pdev = &at91rm9200_dbgu_device;
1106 configure_dbgu_pins();
1107 break;
1108 case AT91RM9200_ID_US0:
1109 pdev = &at91rm9200_uart0_device;
1110 configure_usart0_pins(pins);
1111 break;
1112 case AT91RM9200_ID_US1:
1113 pdev = &at91rm9200_uart1_device;
1114 configure_usart1_pins(pins);
1115 break;
1116 case AT91RM9200_ID_US2:
1117 pdev = &at91rm9200_uart2_device;
1118 configure_usart2_pins(pins);
1119 break;
1120 case AT91RM9200_ID_US3:
1121 pdev = &at91rm9200_uart3_device;
1122 configure_usart3_pins(pins);
1123 break;
1124 default:
1125 return;
1126 }
1127 pdata = pdev->dev.platform_data;
1128 pdata->num = portnr; /* update to mapped ID */
1129
1130 if (portnr < ATMEL_MAX_UART)
1131 at91_uarts[portnr] = pdev;
1132 }
1133
1134 void __init at91_set_serial_console(unsigned portnr)
1135 {
1136 if (portnr < ATMEL_MAX_UART) {
1137 atmel_default_console_device = at91_uarts[portnr];
1138 at91rm9200_set_console_clock(at91_uarts[portnr]->id);
1139 }
1140 }
1141
1142 void __init at91_add_device_serial(void)
1143 {
1144 int i;
1145
1146 for (i = 0; i < ATMEL_MAX_UART; i++) {
1147 if (at91_uarts[i])
1148 platform_device_register(at91_uarts[i]);
1149 }
1150
1151 if (!atmel_default_console_device)
1152 printk(KERN_INFO "AT91: No default serial console defined.\n");
1153 }
1154 #else
1155 void __init __deprecated at91_init_serial(struct at91_uart_config *config) {}
1156 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1157 void __init at91_set_serial_console(unsigned portnr) {}
1158 void __init at91_add_device_serial(void) {}
1159 #endif
1160
1161
1162 /* -------------------------------------------------------------------- */
1163
1164 /*
1165 * These devices are always present and don't need any board-specific
1166 * setup.
1167 */
1168 static int __init at91_add_standard_devices(void)
1169 {
1170 at91_add_device_rtc();
1171 at91_add_device_watchdog();
1172 at91_add_device_tc();
1173 return 0;
1174 }
1175
1176 arch_initcall(at91_add_standard_devices);
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