2 * l2 cache initialization for CSR SiRFprimaII
4 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
6 * Licensed under GPLv2 or later.
9 #include <linux/init.h>
10 #include <linux/kernel.h>
12 #include <linux/errno.h>
14 #include <linux/of_address.h>
15 #include <asm/hardware/cache-l2x0.h>
16 #include <mach/memory.h>
18 #define L2X0_ADDR_FILTERING_START 0xC00
19 #define L2X0_ADDR_FILTERING_END 0xC04
21 static struct of_device_id l2x_ids
[] = {
22 { .compatible
= "arm,pl310-cache" },
25 static int __init
sirfsoc_of_l2x_init(void)
27 struct device_node
*np
;
28 void __iomem
*sirfsoc_l2x_base
;
30 np
= of_find_matching_node(NULL
, l2x_ids
);
32 panic("unable to find compatible l2x node in dtb\n");
34 sirfsoc_l2x_base
= of_iomap(np
, 0);
35 if (!sirfsoc_l2x_base
)
36 panic("unable to map l2x cpu registers\n");
40 if (!(readl_relaxed(sirfsoc_l2x_base
+ L2X0_CTRL
) & 1)) {
42 * set the physical memory windows L2 cache will cover
44 writel_relaxed(PLAT_PHYS_OFFSET
+ 1024 * 1024 * 1024,
45 sirfsoc_l2x_base
+ L2X0_ADDR_FILTERING_END
);
46 writel_relaxed(PLAT_PHYS_OFFSET
| 0x1,
47 sirfsoc_l2x_base
+ L2X0_ADDR_FILTERING_START
);
50 sirfsoc_l2x_base
+ L2X0_TAG_LATENCY_CTRL
);
52 sirfsoc_l2x_base
+ L2X0_DATA_LATENCY_CTRL
);
54 l2x0_init((void __iomem
*)sirfsoc_l2x_base
, 0x00040000,
59 early_initcall(sirfsoc_of_l2x_init
);