1 /* linux/arch/arm/plat-s3c64xx/cpu.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/ioport.h>
19 #include <linux/sysdev.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
24 #include <mach/hardware.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
30 #include <plat/regs-serial.h>
33 #include <plat/devs.h>
34 #include <plat/clock.h>
36 #include <mach/s3c6400.h>
37 #include <mach/s3c6410.h>
39 /* table of supported CPUs */
41 static const char name_s3c6400
[] = "S3C6400";
42 static const char name_s3c6410
[] = "S3C6410";
44 static struct cpu_table cpu_ids
[] __initdata
= {
48 .map_io
= s3c6400_map_io
,
49 .init_clocks
= s3c6400_init_clocks
,
50 .init_uarts
= s3c6400_init_uarts
,
56 .map_io
= s3c6410_map_io
,
57 .init_clocks
= s3c6410_init_clocks
,
58 .init_uarts
= s3c6410_init_uarts
,
64 /* minimal IO mapping */
66 /* see notes on uart map in arch/arm/mach-s3c6400/include/mach/debug-macro.S */
67 #define UART_OFFS (S3C_PA_UART & 0xfffff)
69 static struct map_desc s3c_iodesc
[] __initdata
= {
71 .virtual = (unsigned long)S3C_VA_SYS
,
72 .pfn
= __phys_to_pfn(S3C64XX_PA_SYSCON
),
76 .virtual = (unsigned long)S3C_VA_MEM
,
77 .pfn
= __phys_to_pfn(S3C64XX_PA_SROM
),
81 .virtual = (unsigned long)(S3C_VA_UART
+ UART_OFFS
),
82 .pfn
= __phys_to_pfn(S3C_PA_UART
),
86 .virtual = (unsigned long)VA_VIC0
,
87 .pfn
= __phys_to_pfn(S3C64XX_PA_VIC0
),
91 .virtual = (unsigned long)VA_VIC1
,
92 .pfn
= __phys_to_pfn(S3C64XX_PA_VIC1
),
96 .virtual = (unsigned long)S3C_VA_TIMER
,
97 .pfn
= __phys_to_pfn(S3C_PA_TIMER
),
101 .virtual = (unsigned long)S3C64XX_VA_GPIO
,
102 .pfn
= __phys_to_pfn(S3C64XX_PA_GPIO
),
106 .virtual = (unsigned long)S3C64XX_VA_MODEM
,
107 .pfn
= __phys_to_pfn(S3C64XX_PA_MODEM
),
111 .virtual = (unsigned long)S3C_VA_WATCHDOG
,
112 .pfn
= __phys_to_pfn(S3C64XX_PA_WATCHDOG
),
116 .virtual = (unsigned long)S3C_VA_USB_HSPHY
,
117 .pfn
= __phys_to_pfn(S3C64XX_PA_USB_HSPHY
),
124 struct sysdev_class s3c64xx_sysclass
= {
125 .name
= "s3c64xx-core",
128 static struct sys_device s3c64xx_sysdev
= {
129 .cls
= &s3c64xx_sysclass
,
132 /* uart registration process */
134 void __init
s3c6400_common_init_uarts(struct s3c2410_uartcfg
*cfg
, int no
)
136 s3c24xx_init_uartdevs("s3c6400-uart", s3c64xx_uart_resources
, cfg
, no
);
139 /* read cpu identification code */
141 void __init
s3c64xx_init_io(struct map_desc
*mach_desc
, int size
)
143 unsigned long idcode
;
145 /* initialise the io descriptors we need for initialisation */
146 iotable_init(s3c_iodesc
, ARRAY_SIZE(s3c_iodesc
));
147 iotable_init(mach_desc
, size
);
149 idcode
= __raw_readl(S3C_VA_SYS
+ 0x118);
151 /* S3C6400 has the ID register in a different place,
152 * and needs a write before it can be read. */
154 __raw_writel(0x0, S3C_VA_SYS
+ 0xA1C);
155 idcode
= __raw_readl(S3C_VA_SYS
+ 0xA1C);
158 s3c_init_cpu(idcode
, cpu_ids
, ARRAY_SIZE(cpu_ids
));
161 static __init
int s3c64xx_sysdev_init(void)
163 sysdev_class_register(&s3c64xx_sysclass
);
164 return sysdev_register(&s3c64xx_sysdev
);
167 core_initcall(s3c64xx_sysdev_init
);