arch/arm/mach-s3c64xx/irq.c

   1 /* arch/arm/plat-s3c64xx/irq.c
   2  *
   3  * Copyright 2008 Openmoko, Inc.
   4  * Copyright 2008 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * S3C64XX - Interrupt handling
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/serial_core.h>
  18 #include <linux/irq.h>
  19 #include <linux/io.h>
  20
  21 #include <asm/hardware/vic.h>
  22
  23 #include <mach/map.h>
  24 #include <plat/irq-vic-timer.h>
  25 #include <plat/irq-uart.h>
  26 #include <plat/cpu.h>
  27
  28 static struct s3c_uart_irq uart_irqs[] = {
  29         [0] = {
  30                 .regs           = S3C_VA_UART0,
  31                 .base_irq       = IRQ_S3CUART_BASE0,
  32                 .parent_irq     = IRQ_UART0,
  33         },
  34         [1] = {
  35                 .regs           = S3C_VA_UART1,
  36                 .base_irq       = IRQ_S3CUART_BASE1,
  37                 .parent_irq     = IRQ_UART1,
  38         },
  39         [2] = {
  40                 .regs           = S3C_VA_UART2,
  41                 .base_irq       = IRQ_S3CUART_BASE2,
  42                 .parent_irq     = IRQ_UART2,
  43         },
  44         [3] = {
  45                 .regs           = S3C_VA_UART3,
  46                 .base_irq       = IRQ_S3CUART_BASE3,
  47                 .parent_irq     = IRQ_UART3,
  48         },
  49 };
  50
  51 /* setup the sources the vic should advertise resume for, even though it
  52  * is not doing the wake (set_irq_wake needs to be valid) */
  53 #define IRQ_VIC0_RESUME (1 << (IRQ_RTC_TIC - IRQ_VIC0_BASE))
  54 #define IRQ_VIC1_RESUME (1 << (IRQ_RTC_ALARM - IRQ_VIC1_BASE) | \
  55                          1 << (IRQ_PENDN - IRQ_VIC1_BASE) |     \
  56                          1 << (IRQ_HSMMC0 - IRQ_VIC1_BASE) |    \
  57                          1 << (IRQ_HSMMC1 - IRQ_VIC1_BASE) |    \
  58                          1 << (IRQ_HSMMC2 - IRQ_VIC1_BASE))
  59
  60 void __init s3c64xx_init_irq(u32 vic0_valid, u32 vic1_valid)
  61 {
  62         printk(KERN_DEBUG "%s: initialising interrupts\n", __func__);
  63
  64         /* initialise the pair of VICs */
  65         vic_init(VA_VIC0, IRQ_VIC0_BASE, vic0_valid, IRQ_VIC0_RESUME);
  66         vic_init(VA_VIC1, IRQ_VIC1_BASE, vic1_valid, IRQ_VIC1_RESUME);
  67
  68         /* add the timer sub-irqs */
  69         s3c_init_vic_timer_irq(5, IRQ_TIMER0);
  70
  71         s3c_init_uart_irqs(uart_irqs, ARRAY_SIZE(uart_irqs));
  72 }