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Merge remote-tracking branch 's5p/for-next'
[linux-2.6/next.git] / arch / arm / mach-shmobile / board-ap4evb.c
blob9e0856b2f9e9fcc8adb4455267e0ec4964efa56d
1 /*
2 * AP4EVB board support
3 *
4 * Copyright (C) 2010 Magnus Damm
5 * Copyright (C) 2008 Yoshihiro Shimoda
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20 #include <linux/clk.h>
21 #include <linux/kernel.h>
22 #include <linux/init.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/platform_device.h>
26 #include <linux/delay.h>
27 #include <linux/mfd/tmio.h>
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/sh_mobile_sdhi.h>
30 #include <linux/mtd/mtd.h>
31 #include <linux/mtd/partitions.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/mmc/sh_mmcif.h>
34 #include <linux/i2c.h>
35 #include <linux/i2c/tsc2007.h>
36 #include <linux/io.h>
37 #include <linux/smsc911x.h>
38 #include <linux/sh_intc.h>
39 #include <linux/sh_clk.h>
40 #include <linux/gpio.h>
41 #include <linux/input.h>
42 #include <linux/leds.h>
43 #include <linux/input/sh_keysc.h>
44 #include <linux/usb/r8a66597.h>
45
46 #include <media/sh_mobile_ceu.h>
47 #include <media/sh_mobile_csi2.h>
48 #include <media/soc_camera.h>
49
50 #include <sound/sh_fsi.h>
51
52 #include <video/sh_mobile_hdmi.h>
53 #include <video/sh_mobile_lcdc.h>
54 #include <video/sh_mipi_dsi.h>
55
56 #include <mach/common.h>
57 #include <mach/irqs.h>
58 #include <mach/sh7372.h>
59
60 #include <asm/mach-types.h>
61 #include <asm/mach/arch.h>
62 #include <asm/mach/map.h>
63 #include <asm/mach/time.h>
64 #include <asm/setup.h>
65
66 /*
67 * Address Interface BusWidth note
68 * ------------------------------------------------------------------
69 * 0x0000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = ON
70 * 0x0800_0000 user area -
71 * 0x1000_0000 NOR Flash ROM (MCP) 16bit SW7 : bit1 = OFF
72 * 0x1400_0000 Ether (LAN9220) 16bit
73 * 0x1600_0000 user area - cannot use with NAND
74 * 0x1800_0000 user area -
75 * 0x1A00_0000 -
76 * 0x4000_0000 LPDDR2-SDRAM (POP) 32bit
77 */
78
79 /*
80 * NOR Flash ROM
81 *
82 * SW1 | SW2 | SW7 | NOR Flash ROM
83 * bit1 | bit1 bit2 | bit1 | Memory allocation
84 * ------+------------+------+------------------
85 * OFF | ON OFF | ON | Area 0
86 * OFF | ON OFF | OFF | Area 4
87 */
88
89 /*
90 * NAND Flash ROM
91 *
92 * SW1 | SW2 | SW7 | NAND Flash ROM
93 * bit1 | bit1 bit2 | bit2 | Memory allocation
94 * ------+------------+------+------------------
95 * OFF | ON OFF | ON | FCE 0
96 * OFF | ON OFF | OFF | FCE 1
97 */
98
99 /*
100 * SMSC 9220
101 *
102 * SW1 SMSC 9220
103 * -----------------------
104 * ON access disable
105 * OFF access enable
106 */
107
108 /*
109 * LCD / IRQ / KEYSC / IrDA
110 *
111 * IRQ = IRQ26 (TS), IRQ27 (VIO), IRQ28 (QHD-TouchScreen)
112 * LCD = 2nd LCDC (WVGA)
113 *
114 * | SW43 |
115 * SW3 | ON | OFF |
116 * -------------+-----------------------+---------------+
117 * ON | KEY / IrDA | LCD |
118 * OFF | KEY / IrDA / IRQ | IRQ |
119 *
120 *
121 * QHD / WVGA display
122 *
123 * You can choice display type on menuconfig.
124 * Then, check above dip-switch.
125 */
126
127 /*
128 * USB
129 *
130 * J7 : 1-2 MAX3355E VBUS
131 * 2-3 DC 5.0V
132 *
133 * S39: bit2: off
134 */
135
136 /*
137 * FSI/FSMI
138 *
139 * SW41 : ON : SH-Mobile AP4 Audio Mode
140 * : OFF : Bluetooth Audio Mode
141 */
142
143 /*
144 * MMC0/SDHI1 (CN7)
145 *
146 * J22 : select card voltage
147 * 1-2 pin : 1.8v
148 * 2-3 pin : 3.3v
149 *
150 * SW1 | SW33
151 * | bit1 | bit2 | bit3 | bit4
152 * ------------+------+------+------+-------
153 * MMC0 OFF | OFF | ON | ON | X
154 * SDHI1 OFF | ON | X | OFF | ON
155 *
156 * voltage lebel
157 * CN7 : 1.8v
158 * CN12: 3.3v
159 */
160
161 /* MTD */
162 static struct mtd_partition nor_flash_partitions[] = {
163 {
164 .name = "loader",
165 .offset = 0x00000000,
166 .size = 512 * 1024,
167 .mask_flags = MTD_WRITEABLE,
168 },
169 {
170 .name = "bootenv",
171 .offset = MTDPART_OFS_APPEND,
172 .size = 512 * 1024,
173 .mask_flags = MTD_WRITEABLE,
174 },
175 {
176 .name = "kernel_ro",
177 .offset = MTDPART_OFS_APPEND,
178 .size = 8 * 1024 * 1024,
179 .mask_flags = MTD_WRITEABLE,
180 },
181 {
182 .name = "kernel",
183 .offset = MTDPART_OFS_APPEND,
184 .size = 8 * 1024 * 1024,
185 },
186 {
187 .name = "data",
188 .offset = MTDPART_OFS_APPEND,
189 .size = MTDPART_SIZ_FULL,
190 },
191 };
192
193 static struct physmap_flash_data nor_flash_data = {
194 .width = 2,
195 .parts = nor_flash_partitions,
196 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
197 };
198
199 static struct resource nor_flash_resources[] = {
200 [0] = {
201 .start = 0x00000000,
202 .end = 0x08000000 - 1,
203 .flags = IORESOURCE_MEM,
204 }
205 };
206
207 static struct platform_device nor_flash_device = {
208 .name = "physmap-flash",
209 .dev = {
210 .platform_data = &nor_flash_data,
211 },
212 .num_resources = ARRAY_SIZE(nor_flash_resources),
213 .resource = nor_flash_resources,
214 };
215
216 /* SMSC 9220 */
217 static struct resource smc911x_resources[] = {
218 {
219 .start = 0x14000000,
220 .end = 0x16000000 - 1,
221 .flags = IORESOURCE_MEM,
222 }, {
223 .start = evt2irq(0x02c0) /* IRQ6A */,
224 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
225 },
226 };
227
228 static struct smsc911x_platform_config smsc911x_info = {
229 .flags = SMSC911X_USE_16BIT | SMSC911X_SAVE_MAC_ADDRESS,
230 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
231 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
232 };
233
234 static struct platform_device smc911x_device = {
235 .name = "smsc911x",
236 .id = -1,
237 .num_resources = ARRAY_SIZE(smc911x_resources),
238 .resource = smc911x_resources,
239 .dev = {
240 .platform_data = &smsc911x_info,
241 },
242 };
243
244 /*
245 * The card detect pin of the top SD/MMC slot (CN7) is active low and is
246 * connected to GPIO A22 of SH7372 (GPIO_PORT41).
247 */
248 static int slot_cn7_get_cd(struct platform_device *pdev)
249 {
250 return !gpio_get_value(GPIO_PORT41);
251 }
252 /* MERAM */
253 static struct sh_mobile_meram_info meram_info = {
254 .addr_mode = SH_MOBILE_MERAM_MODE1,
255 };
256
257 static struct resource meram_resources[] = {
258 [0] = {
259 .name = "MERAM",
260 .start = 0xe8000000,
261 .end = 0xe81fffff,
262 .flags = IORESOURCE_MEM,
263 },
264 };
265
266 static struct platform_device meram_device = {
267 .name = "sh_mobile_meram",
268 .id = 0,
269 .num_resources = ARRAY_SIZE(meram_resources),
270 .resource = meram_resources,
271 .dev = {
272 .platform_data = &meram_info,
273 },
274 };
275
276 /* SH_MMCIF */
277 static struct resource sh_mmcif_resources[] = {
278 [0] = {
279 .name = "MMCIF",
280 .start = 0xE6BD0000,
281 .end = 0xE6BD00FF,
282 .flags = IORESOURCE_MEM,
283 },
284 [1] = {
285 /* MMC ERR */
286 .start = evt2irq(0x1ac0),
287 .flags = IORESOURCE_IRQ,
288 },
289 [2] = {
290 /* MMC NOR */
291 .start = evt2irq(0x1ae0),
292 .flags = IORESOURCE_IRQ,
293 },
294 };
295
296 static struct sh_mmcif_dma sh_mmcif_dma = {
297 .chan_priv_rx = {
298 .slave_id = SHDMA_SLAVE_MMCIF_RX,
299 },
300 .chan_priv_tx = {
301 .slave_id = SHDMA_SLAVE_MMCIF_TX,
302 },
303 };
304
305 static struct sh_mmcif_plat_data sh_mmcif_plat = {
306 .sup_pclk = 0,
307 .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
308 .caps = MMC_CAP_4_BIT_DATA |
309 MMC_CAP_8_BIT_DATA |
310 MMC_CAP_NEEDS_POLL,
311 .get_cd = slot_cn7_get_cd,
312 .dma = &sh_mmcif_dma,
313 };
314
315 static struct platform_device sh_mmcif_device = {
316 .name = "sh_mmcif",
317 .id = 0,
318 .dev = {
319 .dma_mask = NULL,
320 .coherent_dma_mask = 0xffffffff,
321 .platform_data = &sh_mmcif_plat,
322 },
323 .num_resources = ARRAY_SIZE(sh_mmcif_resources),
324 .resource = sh_mmcif_resources,
325 };
326
327 /* SDHI0 */
328 static struct sh_mobile_sdhi_info sdhi0_info = {
329 .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
330 .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
331 .tmio_caps = MMC_CAP_SDIO_IRQ,
332 };
333
334 static struct resource sdhi0_resources[] = {
335 [0] = {
336 .name = "SDHI0",
337 .start = 0xe6850000,
338 .end = 0xe68500ff,
339 .flags = IORESOURCE_MEM,
340 },
341 [1] = {
342 .start = evt2irq(0x0e00) /* SDHI0_SDHI0I0 */,
343 .flags = IORESOURCE_IRQ,
344 },
345 [2] = {
346 .start = evt2irq(0x0e20) /* SDHI0_SDHI0I1 */,
347 .flags = IORESOURCE_IRQ,
348 },
349 [3] = {
350 .start = evt2irq(0x0e40) /* SDHI0_SDHI0I2 */,
351 .flags = IORESOURCE_IRQ,
352 },
353 };
354
355 static struct platform_device sdhi0_device = {
356 .name = "sh_mobile_sdhi",
357 .num_resources = ARRAY_SIZE(sdhi0_resources),
358 .resource = sdhi0_resources,
359 .id = 0,
360 .dev = {
361 .platform_data = &sdhi0_info,
362 },
363 };
364
365 /* SDHI1 */
366 static struct sh_mobile_sdhi_info sdhi1_info = {
367 .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX,
368 .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX,
369 .tmio_ocr_mask = MMC_VDD_165_195,
370 .tmio_flags = TMIO_MMC_WRPROTECT_DISABLE,
371 .tmio_caps = MMC_CAP_NEEDS_POLL | MMC_CAP_SDIO_IRQ,
372 .get_cd = slot_cn7_get_cd,
373 };
374
375 static struct resource sdhi1_resources[] = {
376 [0] = {
377 .name = "SDHI1",
378 .start = 0xe6860000,
379 .end = 0xe68600ff,
380 .flags = IORESOURCE_MEM,
381 },
382 [1] = {
383 .start = evt2irq(0x0e80), /* SDHI1_SDHI1I0 */
384 .flags = IORESOURCE_IRQ,
385 },
386 [2] = {
387 .start = evt2irq(0x0ea0), /* SDHI1_SDHI1I1 */
388 .flags = IORESOURCE_IRQ,
389 },
390 [3] = {
391 .start = evt2irq(0x0ec0), /* SDHI1_SDHI1I2 */
392 .flags = IORESOURCE_IRQ,
393 },
394 };
395
396 static struct platform_device sdhi1_device = {
397 .name = "sh_mobile_sdhi",
398 .num_resources = ARRAY_SIZE(sdhi1_resources),
399 .resource = sdhi1_resources,
400 .id = 1,
401 .dev = {
402 .platform_data = &sdhi1_info,
403 },
404 };
405
406 /* USB1 */
407 static void usb1_host_port_power(int port, int power)
408 {
409 if (!power) /* only power-on supported for now */
410 return;
411
412 /* set VBOUT/PWEN and EXTLP1 in DVSTCTR */
413 __raw_writew(__raw_readw(0xE68B0008) | 0x600, 0xE68B0008);
414 }
415
416 static struct r8a66597_platdata usb1_host_data = {
417 .on_chip = 1,
418 .port_power = usb1_host_port_power,
419 };
420
421 static struct resource usb1_host_resources[] = {
422 [0] = {
423 .name = "USBHS",
424 .start = 0xE68B0000,
425 .end = 0xE68B00E6 - 1,
426 .flags = IORESOURCE_MEM,
427 },
428 [1] = {
429 .start = evt2irq(0x1ce0) /* USB1_USB1I0 */,
430 .flags = IORESOURCE_IRQ,
431 },
432 };
433
434 static struct platform_device usb1_host_device = {
435 .name = "r8a66597_hcd",
436 .id = 1,
437 .dev = {
438 .dma_mask = NULL, /* not use dma */
439 .coherent_dma_mask = 0xffffffff,
440 .platform_data = &usb1_host_data,
441 },
442 .num_resources = ARRAY_SIZE(usb1_host_resources),
443 .resource = usb1_host_resources,
444 };
445
446 static const struct fb_videomode ap4evb_lcdc_modes[] = {
447 {
448 #ifdef CONFIG_AP4EVB_QHD
449 .name = "R63302(QHD)",
450 .xres = 544,
451 .yres = 961,
452 .left_margin = 72,
453 .right_margin = 600,
454 .hsync_len = 16,
455 .upper_margin = 8,
456 .lower_margin = 8,
457 .vsync_len = 2,
458 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
459 #else
460 .name = "WVGA Panel",
461 .xres = 800,
462 .yres = 480,
463 .left_margin = 220,
464 .right_margin = 110,
465 .hsync_len = 70,
466 .upper_margin = 20,
467 .lower_margin = 5,
468 .vsync_len = 5,
469 .sync = 0,
470 #endif
471 },
472 };
473 static struct sh_mobile_meram_cfg lcd_meram_cfg = {
474 .icb[0] = {
475 .marker_icb = 28,
476 .cache_icb = 24,
477 .meram_offset = 0x0,
478 .meram_size = 0x40,
479 },
480 .icb[1] = {
481 .marker_icb = 29,
482 .cache_icb = 25,
483 .meram_offset = 0x40,
484 .meram_size = 0x40,
485 },
486 };
487
488 static struct sh_mobile_lcdc_info lcdc_info = {
489 .meram_dev = &meram_info,
490 .ch[0] = {
491 .chan = LCDC_CHAN_MAINLCD,
492 .bpp = 16,
493 .lcd_cfg = ap4evb_lcdc_modes,
494 .num_cfg = ARRAY_SIZE(ap4evb_lcdc_modes),
495 .meram_cfg = &lcd_meram_cfg,
496 }
497 };
498
499 static struct resource lcdc_resources[] = {
500 [0] = {
501 .name = "LCDC",
502 .start = 0xfe940000, /* P4-only space */
503 .end = 0xfe943fff,
504 .flags = IORESOURCE_MEM,
505 },
506 [1] = {
507 .start = intcs_evt2irq(0x580),
508 .flags = IORESOURCE_IRQ,
509 },
510 };
511
512 static struct platform_device lcdc_device = {
513 .name = "sh_mobile_lcdc_fb",
514 .num_resources = ARRAY_SIZE(lcdc_resources),
515 .resource = lcdc_resources,
516 .dev = {
517 .platform_data = &lcdc_info,
518 .coherent_dma_mask = ~0,
519 },
520 };
521
522 /*
523 * QHD display
524 */
525 #ifdef CONFIG_AP4EVB_QHD
526
527 /* KEYSC (Needs SW43 set to ON) */
528 static struct sh_keysc_info keysc_info = {
529 .mode = SH_KEYSC_MODE_1,
530 .scan_timing = 3,
531 .delay = 2500,
532 .keycodes = {
533 KEY_0, KEY_1, KEY_2, KEY_3, KEY_4,
534 KEY_5, KEY_6, KEY_7, KEY_8, KEY_9,
535 KEY_A, KEY_B, KEY_C, KEY_D, KEY_E,
536 KEY_F, KEY_G, KEY_H, KEY_I, KEY_J,
537 KEY_K, KEY_L, KEY_M, KEY_N, KEY_O,
538 },
539 };
540
541 static struct resource keysc_resources[] = {
542 [0] = {
543 .name = "KEYSC",
544 .start = 0xe61b0000,
545 .end = 0xe61b0063,
546 .flags = IORESOURCE_MEM,
547 },
548 [1] = {
549 .start = evt2irq(0x0be0), /* KEYSC_KEY */
550 .flags = IORESOURCE_IRQ,
551 },
552 };
553
554 static struct platform_device keysc_device = {
555 .name = "sh_keysc",
556 .id = 0, /* "keysc0" clock */
557 .num_resources = ARRAY_SIZE(keysc_resources),
558 .resource = keysc_resources,
559 .dev = {
560 .platform_data = &keysc_info,
561 },
562 };
563
564 /* MIPI-DSI */
565 static struct resource mipidsi0_resources[] = {
566 [0] = {
567 .start = 0xffc60000,
568 .end = 0xffc63073,
569 .flags = IORESOURCE_MEM,
570 },
571 [1] = {
572 .start = 0xffc68000,
573 .end = 0xffc680ef,
574 .flags = IORESOURCE_MEM,
575 },
576 };
577
578 static struct sh_mipi_dsi_info mipidsi0_info = {
579 .data_format = MIPI_RGB888,
580 .lcd_chan = &lcdc_info.ch[0],
581 .vsynw_offset = 17,
582 };
583
584 static struct platform_device mipidsi0_device = {
585 .name = "sh-mipi-dsi",
586 .num_resources = ARRAY_SIZE(mipidsi0_resources),
587 .resource = mipidsi0_resources,
588 .id = 0,
589 .dev = {
590 .platform_data = &mipidsi0_info,
591 },
592 };
593
594 static struct platform_device *qhd_devices[] __initdata = {
595 &mipidsi0_device,
596 &keysc_device,
597 };
598 #endif /* CONFIG_AP4EVB_QHD */
599
600 /* FSI */
601 #define IRQ_FSI evt2irq(0x1840)
602 static int __fsi_set_rate(struct clk *clk, long rate, int enable)
603 {
604 int ret = 0;
605
606 if (rate <= 0)
607 return ret;
608
609 if (enable) {
610 ret = clk_set_rate(clk, rate);
611 if (0 == ret)
612 ret = clk_enable(clk);
613 } else {
614 clk_disable(clk);
615 }
616
617 return ret;
618 }
619
620 static int __fsi_set_round_rate(struct clk *clk, long rate, int enable)
621 {
622 return __fsi_set_rate(clk, clk_round_rate(clk, rate), enable);
623 }
624
625 static int fsi_ak4642_set_rate(struct device *dev, int rate, int enable)
626 {
627 struct clk *fsia_ick;
628 struct clk *fsiack;
629 int ret = -EIO;
630
631 fsia_ick = clk_get(dev, "icka");
632 if (IS_ERR(fsia_ick))
633 return PTR_ERR(fsia_ick);
634
635 /*
636 * FSIACK is connected to AK4642,
637 * and use external clock pin from it.
638 * it is parent of fsia_ick now.
639 */
640 fsiack = clk_get_parent(fsia_ick);
641 if (!fsiack)
642 goto fsia_ick_out;
643
644 /*
645 * we get 1/1 divided clock by setting same rate to fsiack and fsia_ick
646 *
647 ** FIXME **
648 * Because the freq_table of external clk (fsiack) are all 0,
649 * the return value of clk_round_rate became 0.
650 * So, it use __fsi_set_rate here.
651 */
652 ret = __fsi_set_rate(fsiack, rate, enable);
653 if (ret < 0)
654 goto fsiack_out;
655
656 ret = __fsi_set_round_rate(fsia_ick, rate, enable);
657 if ((ret < 0) && enable)
658 __fsi_set_round_rate(fsiack, rate, 0); /* disable FSI ACK */
659
660 fsiack_out:
661 clk_put(fsiack);
662
663 fsia_ick_out:
664 clk_put(fsia_ick);
665
666 return 0;
667 }
668
669 static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)
670 {
671 struct clk *fsib_clk;
672 struct clk *fdiv_clk = &sh7372_fsidivb_clk;
673 long fsib_rate = 0;
674 long fdiv_rate = 0;
675 int ackmd_bpfmd;
676 int ret;
677
678 switch (rate) {
679 case 44100:
680 fsib_rate = rate * 256;
681 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
682 break;
683 case 48000:
684 fsib_rate = 85428000; /* around 48kHz x 256 x 7 */
685 fdiv_rate = rate * 256;
686 ackmd_bpfmd = SH_FSI_ACKMD_256 | SH_FSI_BPFMD_64;
687 break;
688 default:
689 pr_err("unsupported rate in FSI2 port B\n");
690 return -EINVAL;
691 }
692
693 /* FSI B setting */
694 fsib_clk = clk_get(dev, "ickb");
695 if (IS_ERR(fsib_clk))
696 return -EIO;
697
698 ret = __fsi_set_round_rate(fsib_clk, fsib_rate, enable);
699 if (ret < 0)
700 goto fsi_set_rate_end;
701
702 /* FSI DIV setting */
703 ret = __fsi_set_round_rate(fdiv_clk, fdiv_rate, enable);
704 if (ret < 0) {
705 /* disable FSI B */
706 if (enable)
707 __fsi_set_round_rate(fsib_clk, fsib_rate, 0);
708 goto fsi_set_rate_end;
709 }
710
711 ret = ackmd_bpfmd;
712
713 fsi_set_rate_end:
714 clk_put(fsib_clk);
715 return ret;
716 }
717
718 static int fsi_set_rate(struct device *dev, int is_porta, int rate, int enable)
719 {
720 int ret;
721
722 if (is_porta)
723 ret = fsi_ak4642_set_rate(dev, rate, enable);
724 else
725 ret = fsi_hdmi_set_rate(dev, rate, enable);
726
727 return ret;
728 }
729
730 static struct sh_fsi_platform_info fsi_info = {
731 .porta_flags = SH_FSI_BRS_INV,
732
733 .portb_flags = SH_FSI_BRS_INV |
734 SH_FSI_BRM_INV |
735 SH_FSI_LRS_INV |
736 SH_FSI_FMT_SPDIF,
737 .set_rate = fsi_set_rate,
738 };
739
740 static struct resource fsi_resources[] = {
741 [0] = {
742 .name = "FSI",
743 .start = 0xFE3C0000,
744 .end = 0xFE3C0400 - 1,
745 .flags = IORESOURCE_MEM,
746 },
747 [1] = {
748 .start = IRQ_FSI,
749 .flags = IORESOURCE_IRQ,
750 },
751 };
752
753 static struct platform_device fsi_device = {
754 .name = "sh_fsi2",
755 .id = -1,
756 .num_resources = ARRAY_SIZE(fsi_resources),
757 .resource = fsi_resources,
758 .dev = {
759 .platform_data = &fsi_info,
760 },
761 };
762
763 static struct platform_device fsi_ak4643_device = {
764 .name = "sh_fsi2_a_ak4643",
765 };
766 static struct sh_mobile_meram_cfg hdmi_meram_cfg = {
767 .icb[0] = {
768 .marker_icb = 30,
769 .cache_icb = 26,
770 .meram_offset = 0x80,
771 .meram_size = 0x100,
772 },
773 .icb[1] = {
774 .marker_icb = 31,
775 .cache_icb = 27,
776 .meram_offset = 0x180,
777 .meram_size = 0x100,
778 },
779 };
780
781 static struct sh_mobile_lcdc_info sh_mobile_lcdc1_info = {
782 .clock_source = LCDC_CLK_EXTERNAL,
783 .meram_dev = &meram_info,
784 .ch[0] = {
785 .chan = LCDC_CHAN_MAINLCD,
786 .bpp = 16,
787 .interface_type = RGB24,
788 .clock_divider = 1,
789 .flags = LCDC_FLAGS_DWPOL,
790 .meram_cfg = &hdmi_meram_cfg,
791 }
792 };
793
794 static struct resource lcdc1_resources[] = {
795 [0] = {
796 .name = "LCDC1",
797 .start = 0xfe944000,
798 .end = 0xfe947fff,
799 .flags = IORESOURCE_MEM,
800 },
801 [1] = {
802 .start = intcs_evt2irq(0x1780),
803 .flags = IORESOURCE_IRQ,
804 },
805 };
806
807 static struct platform_device lcdc1_device = {
808 .name = "sh_mobile_lcdc_fb",
809 .num_resources = ARRAY_SIZE(lcdc1_resources),
810 .resource = lcdc1_resources,
811 .id = 1,
812 .dev = {
813 .platform_data = &sh_mobile_lcdc1_info,
814 .coherent_dma_mask = ~0,
815 },
816 };
817
818 static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
819 unsigned long *parent_freq);
820
821
822 static struct sh_mobile_hdmi_info hdmi_info = {
823 .lcd_chan = &sh_mobile_lcdc1_info.ch[0],
824 .lcd_dev = &lcdc1_device.dev,
825 .flags = HDMI_SND_SRC_SPDIF,
826 .clk_optimize_parent = ap4evb_clk_optimize,
827 };
828
829 static struct resource hdmi_resources[] = {
830 [0] = {
831 .name = "HDMI",
832 .start = 0xe6be0000,
833 .end = 0xe6be00ff,
834 .flags = IORESOURCE_MEM,
835 },
836 [1] = {
837 /* There's also an HDMI interrupt on INTCS @ 0x18e0 */
838 .start = evt2irq(0x17e0),
839 .flags = IORESOURCE_IRQ,
840 },
841 };
842
843 static struct platform_device hdmi_device = {
844 .name = "sh-mobile-hdmi",
845 .num_resources = ARRAY_SIZE(hdmi_resources),
846 .resource = hdmi_resources,
847 .id = -1,
848 .dev = {
849 .platform_data = &hdmi_info,
850 },
851 };
852
853 static struct platform_device fsi_hdmi_device = {
854 .name = "sh_fsi2_b_hdmi",
855 };
856
857 static long ap4evb_clk_optimize(unsigned long target, unsigned long *best_freq,
858 unsigned long *parent_freq)
859 {
860 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
861 long error;
862
863 if (IS_ERR(hdmi_ick)) {
864 int ret = PTR_ERR(hdmi_ick);
865 pr_err("Cannot get HDMI ICK: %d\n", ret);
866 return ret;
867 }
868
869 error = clk_round_parent(hdmi_ick, target, best_freq, parent_freq, 1, 64);
870
871 clk_put(hdmi_ick);
872
873 return error;
874 }
875
876 static struct gpio_led ap4evb_leds[] = {
877 {
878 .name = "led4",
879 .gpio = GPIO_PORT185,
880 .default_state = LEDS_GPIO_DEFSTATE_ON,
881 },
882 {
883 .name = "led2",
884 .gpio = GPIO_PORT186,
885 .default_state = LEDS_GPIO_DEFSTATE_ON,
886 },
887 {
888 .name = "led3",
889 .gpio = GPIO_PORT187,
890 .default_state = LEDS_GPIO_DEFSTATE_ON,
891 },
892 {
893 .name = "led1",
894 .gpio = GPIO_PORT188,
895 .default_state = LEDS_GPIO_DEFSTATE_ON,
896 }
897 };
898
899 static struct gpio_led_platform_data ap4evb_leds_pdata = {
900 .num_leds = ARRAY_SIZE(ap4evb_leds),
901 .leds = ap4evb_leds,
902 };
903
904 static struct platform_device leds_device = {
905 .name = "leds-gpio",
906 .id = 0,
907 .dev = {
908 .platform_data = &ap4evb_leds_pdata,
909 },
910 };
911
912 static struct i2c_board_info imx074_info = {
913 I2C_BOARD_INFO("imx074", 0x1a),
914 };
915
916 static struct soc_camera_link imx074_link = {
917 .bus_id = 0,
918 .board_info = &imx074_info,
919 .i2c_adapter_id = 0,
920 .module_name = "imx074",
921 };
922
923 static struct platform_device ap4evb_camera = {
924 .name = "soc-camera-pdrv",
925 .id = 0,
926 .dev = {
927 .platform_data = &imx074_link,
928 },
929 };
930
931 static struct sh_csi2_client_config csi2_clients[] = {
932 {
933 .phy = SH_CSI2_PHY_MAIN,
934 .lanes = 3,
935 .channel = 0,
936 .pdev = &ap4evb_camera,
937 },
938 };
939
940 static struct sh_csi2_pdata csi2_info = {
941 .type = SH_CSI2C,
942 .clients = csi2_clients,
943 .num_clients = ARRAY_SIZE(csi2_clients),
944 .flags = SH_CSI2_ECC | SH_CSI2_CRC,
945 };
946
947 static struct resource csi2_resources[] = {
948 [0] = {
949 .name = "CSI2",
950 .start = 0xffc90000,
951 .end = 0xffc90fff,
952 .flags = IORESOURCE_MEM,
953 },
954 [1] = {
955 .start = intcs_evt2irq(0x17a0),
956 .flags = IORESOURCE_IRQ,
957 },
958 };
959
960 static struct sh_mobile_ceu_companion csi2 = {
961 .id = 0,
962 .num_resources = ARRAY_SIZE(csi2_resources),
963 .resource = csi2_resources,
964 .platform_data = &csi2_info,
965 };
966
967 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
968 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
969 .csi2 = &csi2,
970 };
971
972 static struct resource ceu_resources[] = {
973 [0] = {
974 .name = "CEU",
975 .start = 0xfe910000,
976 .end = 0xfe91009f,
977 .flags = IORESOURCE_MEM,
978 },
979 [1] = {
980 .start = intcs_evt2irq(0x880),
981 .flags = IORESOURCE_IRQ,
982 },
983 [2] = {
984 /* place holder for contiguous memory */
985 },
986 };
987
988 static struct platform_device ceu_device = {
989 .name = "sh_mobile_ceu",
990 .id = 0, /* "ceu0" clock */
991 .num_resources = ARRAY_SIZE(ceu_resources),
992 .resource = ceu_resources,
993 .dev = {
994 .platform_data = &sh_mobile_ceu_info,
995 .coherent_dma_mask = 0xffffffff,
996 },
997 };
998
999 static struct platform_device *ap4evb_devices[] __initdata = {
1000 &leds_device,
1001 &nor_flash_device,
1002 &smc911x_device,
1003 &sdhi0_device,
1004 &sdhi1_device,
1005 &usb1_host_device,
1006 &fsi_device,
1007 &fsi_ak4643_device,
1008 &fsi_hdmi_device,
1009 &sh_mmcif_device,
1010 &lcdc1_device,
1011 &lcdc_device,
1012 &hdmi_device,
1013 &ceu_device,
1014 &ap4evb_camera,
1015 &meram_device,
1016 };
1017
1018 static void __init hdmi_init_pm_clock(void)
1019 {
1020 struct clk *hdmi_ick = clk_get(&hdmi_device.dev, "ick");
1021 int ret;
1022 long rate;
1023
1024 if (IS_ERR(hdmi_ick)) {
1025 ret = PTR_ERR(hdmi_ick);
1026 pr_err("Cannot get HDMI ICK: %d\n", ret);
1027 goto out;
1028 }
1029
1030 ret = clk_set_parent(&sh7372_pllc2_clk, &sh7372_dv_clki_div2_clk);
1031 if (ret < 0) {
1032 pr_err("Cannot set PLLC2 parent: %d, %d users\n", ret, sh7372_pllc2_clk.usecount);
1033 goto out;
1034 }
1035
1036 pr_debug("PLLC2 initial frequency %lu\n", clk_get_rate(&sh7372_pllc2_clk));
1037
1038 rate = clk_round_rate(&sh7372_pllc2_clk, 594000000);
1039 if (rate < 0) {
1040 pr_err("Cannot get suitable rate: %ld\n", rate);
1041 ret = rate;
1042 goto out;
1043 }
1044
1045 ret = clk_set_rate(&sh7372_pllc2_clk, rate);
1046 if (ret < 0) {
1047 pr_err("Cannot set rate %ld: %d\n", rate, ret);
1048 goto out;
1049 }
1050
1051 pr_debug("PLLC2 set frequency %lu\n", rate);
1052
1053 ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk);
1054 if (ret < 0)
1055 pr_err("Cannot set HDMI parent: %d\n", ret);
1056
1057 out:
1058 if (!IS_ERR(hdmi_ick))
1059 clk_put(hdmi_ick);
1060 }
1061
1062 static void __init fsi_init_pm_clock(void)
1063 {
1064 struct clk *fsia_ick;
1065 int ret;
1066
1067 fsia_ick = clk_get(&fsi_device.dev, "icka");
1068 if (IS_ERR(fsia_ick)) {
1069 ret = PTR_ERR(fsia_ick);
1070 pr_err("Cannot get FSI ICK: %d\n", ret);
1071 return;
1072 }
1073
1074 ret = clk_set_parent(fsia_ick, &sh7372_fsiack_clk);
1075 if (ret < 0)
1076 pr_err("Cannot set FSI-A parent: %d\n", ret);
1077
1078 clk_put(fsia_ick);
1079 }
1080
1081 /*
1082 * FIXME !!
1083 *
1084 * gpio_no_direction
1085 * are quick_hack.
1086 *
1087 * current gpio frame work doesn't have
1088 * the method to control only pull up/down/free.
1089 * this function should be replaced by correct gpio function
1090 */
1091 static void __init gpio_no_direction(u32 addr)
1092 {
1093 __raw_writeb(0x00, addr);
1094 }
1095
1096 /* TouchScreen */
1097 #ifdef CONFIG_AP4EVB_QHD
1098 # define GPIO_TSC_IRQ GPIO_FN_IRQ28_123
1099 # define GPIO_TSC_PORT GPIO_PORT123
1100 #else /* WVGA */
1101 # define GPIO_TSC_IRQ GPIO_FN_IRQ7_40
1102 # define GPIO_TSC_PORT GPIO_PORT40
1103 #endif
1104
1105 #define IRQ28 evt2irq(0x3380) /* IRQ28A */
1106 #define IRQ7 evt2irq(0x02e0) /* IRQ7A */
1107 static int ts_get_pendown_state(void)
1108 {
1109 int val;
1110
1111 gpio_free(GPIO_TSC_IRQ);
1112
1113 gpio_request(GPIO_TSC_PORT, NULL);
1114
1115 gpio_direction_input(GPIO_TSC_PORT);
1116
1117 val = gpio_get_value(GPIO_TSC_PORT);
1118
1119 gpio_request(GPIO_TSC_IRQ, NULL);
1120
1121 return !val;
1122 }
1123
1124 static int ts_init(void)
1125 {
1126 gpio_request(GPIO_TSC_IRQ, NULL);
1127
1128 return 0;
1129 }
1130
1131 static struct tsc2007_platform_data tsc2007_info = {
1132 .model = 2007,
1133 .x_plate_ohms = 180,
1134 .get_pendown_state = ts_get_pendown_state,
1135 .init_platform_hw = ts_init,
1136 };
1137
1138 static struct i2c_board_info tsc_device = {
1139 I2C_BOARD_INFO("tsc2007", 0x48),
1140 .type = "tsc2007",
1141 .platform_data = &tsc2007_info,
1142 /*.irq is selected on ap4evb_init */
1143 };
1144
1145 /* I2C */
1146 static struct i2c_board_info i2c0_devices[] = {
1147 {
1148 I2C_BOARD_INFO("ak4643", 0x13),
1149 },
1150 };
1151
1152 static struct i2c_board_info i2c1_devices[] = {
1153 {
1154 I2C_BOARD_INFO("r2025sd", 0x32),
1155 },
1156 };
1157
1158 static struct map_desc ap4evb_io_desc[] __initdata = {
1159 /* create a 1:1 entity map for 0xe6xxxxxx
1160 * used by CPGA, INTC and PFC.
1161 */
1162 {
1163 .virtual = 0xe6000000,
1164 .pfn = __phys_to_pfn(0xe6000000),
1165 .length = 256 << 20,
1166 .type = MT_DEVICE_NONSHARED
1167 },
1168 };
1169
1170 static void __init ap4evb_map_io(void)
1171 {
1172 iotable_init(ap4evb_io_desc, ARRAY_SIZE(ap4evb_io_desc));
1173
1174 /* setup early devices and console here as well */
1175 sh7372_add_early_devices();
1176 shmobile_setup_console();
1177 }
1178
1179 #define GPIO_PORT9CR 0xE6051009
1180 #define GPIO_PORT10CR 0xE605100A
1181 #define USCCR1 0xE6058144
1182 static void __init ap4evb_init(void)
1183 {
1184 u32 srcr4;
1185 struct clk *clk;
1186
1187 sh7372_pinmux_init();
1188
1189 /* enable SCIFA0 */
1190 gpio_request(GPIO_FN_SCIFA0_TXD, NULL);
1191 gpio_request(GPIO_FN_SCIFA0_RXD, NULL);
1192
1193 /* enable SMSC911X */
1194 gpio_request(GPIO_FN_CS5A, NULL);
1195 gpio_request(GPIO_FN_IRQ6_39, NULL);
1196
1197 /* enable Debug switch (S6) */
1198 gpio_request(GPIO_PORT32, NULL);
1199 gpio_request(GPIO_PORT33, NULL);
1200 gpio_request(GPIO_PORT34, NULL);
1201 gpio_request(GPIO_PORT35, NULL);
1202 gpio_direction_input(GPIO_PORT32);
1203 gpio_direction_input(GPIO_PORT33);
1204 gpio_direction_input(GPIO_PORT34);
1205 gpio_direction_input(GPIO_PORT35);
1206 gpio_export(GPIO_PORT32, 0);
1207 gpio_export(GPIO_PORT33, 0);
1208 gpio_export(GPIO_PORT34, 0);
1209 gpio_export(GPIO_PORT35, 0);
1210
1211 /* SDHI0 */
1212 gpio_request(GPIO_FN_SDHICD0, NULL);
1213 gpio_request(GPIO_FN_SDHIWP0, NULL);
1214 gpio_request(GPIO_FN_SDHICMD0, NULL);
1215 gpio_request(GPIO_FN_SDHICLK0, NULL);
1216 gpio_request(GPIO_FN_SDHID0_3, NULL);
1217 gpio_request(GPIO_FN_SDHID0_2, NULL);
1218 gpio_request(GPIO_FN_SDHID0_1, NULL);
1219 gpio_request(GPIO_FN_SDHID0_0, NULL);
1220
1221 /* SDHI1 */
1222 gpio_request(GPIO_FN_SDHICMD1, NULL);
1223 gpio_request(GPIO_FN_SDHICLK1, NULL);
1224 gpio_request(GPIO_FN_SDHID1_3, NULL);
1225 gpio_request(GPIO_FN_SDHID1_2, NULL);
1226 gpio_request(GPIO_FN_SDHID1_1, NULL);
1227 gpio_request(GPIO_FN_SDHID1_0, NULL);
1228
1229 /* MMCIF */
1230 gpio_request(GPIO_FN_MMCD0_0, NULL);
1231 gpio_request(GPIO_FN_MMCD0_1, NULL);
1232 gpio_request(GPIO_FN_MMCD0_2, NULL);
1233 gpio_request(GPIO_FN_MMCD0_3, NULL);
1234 gpio_request(GPIO_FN_MMCD0_4, NULL);
1235 gpio_request(GPIO_FN_MMCD0_5, NULL);
1236 gpio_request(GPIO_FN_MMCD0_6, NULL);
1237 gpio_request(GPIO_FN_MMCD0_7, NULL);
1238 gpio_request(GPIO_FN_MMCCMD0, NULL);
1239 gpio_request(GPIO_FN_MMCCLK0, NULL);
1240
1241 /* USB enable */
1242 gpio_request(GPIO_FN_VBUS0_1, NULL);
1243 gpio_request(GPIO_FN_IDIN_1_18, NULL);
1244 gpio_request(GPIO_FN_PWEN_1_115, NULL);
1245 gpio_request(GPIO_FN_OVCN_1_114, NULL);
1246 gpio_request(GPIO_FN_EXTLP_1, NULL);
1247 gpio_request(GPIO_FN_OVCN2_1, NULL);
1248
1249 /* setup USB phy */
1250 __raw_writew(0x8a0a, 0xE6058130); /* USBCR4 */
1251
1252 /* enable FSI2 port A (ak4643) */
1253 gpio_request(GPIO_FN_FSIAIBT, NULL);
1254 gpio_request(GPIO_FN_FSIAILR, NULL);
1255 gpio_request(GPIO_FN_FSIAISLD, NULL);
1256 gpio_request(GPIO_FN_FSIAOSLD, NULL);
1257 gpio_request(GPIO_PORT161, NULL);
1258 gpio_direction_output(GPIO_PORT161, 0); /* slave */
1259
1260 gpio_request(GPIO_PORT9, NULL);
1261 gpio_request(GPIO_PORT10, NULL);
1262 gpio_no_direction(GPIO_PORT9CR); /* FSIAOBT needs no direction */
1263 gpio_no_direction(GPIO_PORT10CR); /* FSIAOLR needs no direction */
1264
1265 /* card detect pin for MMC slot (CN7) */
1266 gpio_request(GPIO_PORT41, NULL);
1267 gpio_direction_input(GPIO_PORT41);
1268
1269 /* setup FSI2 port B (HDMI) */
1270 gpio_request(GPIO_FN_FSIBCK, NULL);
1271 __raw_writew(__raw_readw(USCCR1) & ~(1 << 6), USCCR1); /* use SPDIF */
1272
1273 /* set SPU2 clock to 119.6 MHz */
1274 clk = clk_get(NULL, "spu_clk");
1275 if (!IS_ERR(clk)) {
1276 clk_set_rate(clk, clk_round_rate(clk, 119600000));
1277 clk_put(clk);
1278 }
1279
1280 /*
1281 * set irq priority, to avoid sound chopping
1282 * when NFS rootfs is used
1283 * FSI(3) > SMSC911X(2)
1284 */
1285 intc_set_priority(IRQ_FSI, 3);
1286
1287 i2c_register_board_info(0, i2c0_devices,
1288 ARRAY_SIZE(i2c0_devices));
1289
1290 i2c_register_board_info(1, i2c1_devices,
1291 ARRAY_SIZE(i2c1_devices));
1292
1293 #ifdef CONFIG_AP4EVB_QHD
1294
1295 /*
1296 * For QHD Panel (MIPI-DSI, CONFIG_AP4EVB_QHD=y) and
1297 * IRQ28 for Touch Panel, set dip switches S3, S43 as OFF, ON.
1298 */
1299
1300 /* enable KEYSC */
1301 gpio_request(GPIO_FN_KEYOUT0, NULL);
1302 gpio_request(GPIO_FN_KEYOUT1, NULL);
1303 gpio_request(GPIO_FN_KEYOUT2, NULL);
1304 gpio_request(GPIO_FN_KEYOUT3, NULL);
1305 gpio_request(GPIO_FN_KEYOUT4, NULL);
1306 gpio_request(GPIO_FN_KEYIN0_136, NULL);
1307 gpio_request(GPIO_FN_KEYIN1_135, NULL);
1308 gpio_request(GPIO_FN_KEYIN2_134, NULL);
1309 gpio_request(GPIO_FN_KEYIN3_133, NULL);
1310 gpio_request(GPIO_FN_KEYIN4, NULL);
1311
1312 /* enable TouchScreen */
1313 irq_set_irq_type(IRQ28, IRQ_TYPE_LEVEL_LOW);
1314
1315 tsc_device.irq = IRQ28;
1316 i2c_register_board_info(1, &tsc_device, 1);
1317
1318 /* LCDC0 */
1319 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
1320 lcdc_info.ch[0].interface_type = RGB24;
1321 lcdc_info.ch[0].clock_divider = 1;
1322 lcdc_info.ch[0].flags = LCDC_FLAGS_DWPOL;
1323 lcdc_info.ch[0].lcd_size_cfg.width = 44;
1324 lcdc_info.ch[0].lcd_size_cfg.height = 79;
1325
1326 platform_add_devices(qhd_devices, ARRAY_SIZE(qhd_devices));
1327
1328 #else
1329 /*
1330 * For WVGA Panel (18-bit RGB, CONFIG_AP4EVB_WVGA=y) and
1331 * IRQ7 for Touch Panel, set dip switches S3, S43 to ON, OFF.
1332 */
1333
1334 gpio_request(GPIO_FN_LCDD17, NULL);
1335 gpio_request(GPIO_FN_LCDD16, NULL);
1336 gpio_request(GPIO_FN_LCDD15, NULL);
1337 gpio_request(GPIO_FN_LCDD14, NULL);
1338 gpio_request(GPIO_FN_LCDD13, NULL);
1339 gpio_request(GPIO_FN_LCDD12, NULL);
1340 gpio_request(GPIO_FN_LCDD11, NULL);
1341 gpio_request(GPIO_FN_LCDD10, NULL);
1342 gpio_request(GPIO_FN_LCDD9, NULL);
1343 gpio_request(GPIO_FN_LCDD8, NULL);
1344 gpio_request(GPIO_FN_LCDD7, NULL);
1345 gpio_request(GPIO_FN_LCDD6, NULL);
1346 gpio_request(GPIO_FN_LCDD5, NULL);
1347 gpio_request(GPIO_FN_LCDD4, NULL);
1348 gpio_request(GPIO_FN_LCDD3, NULL);
1349 gpio_request(GPIO_FN_LCDD2, NULL);
1350 gpio_request(GPIO_FN_LCDD1, NULL);
1351 gpio_request(GPIO_FN_LCDD0, NULL);
1352 gpio_request(GPIO_FN_LCDDISP, NULL);
1353 gpio_request(GPIO_FN_LCDDCK, NULL);
1354
1355 gpio_request(GPIO_PORT189, NULL); /* backlight */
1356 gpio_direction_output(GPIO_PORT189, 1);
1357
1358 gpio_request(GPIO_PORT151, NULL); /* LCDDON */
1359 gpio_direction_output(GPIO_PORT151, 1);
1360
1361 lcdc_info.clock_source = LCDC_CLK_BUS;
1362 lcdc_info.ch[0].interface_type = RGB18;
1363 lcdc_info.ch[0].clock_divider = 3;
1364 lcdc_info.ch[0].flags = 0;
1365 lcdc_info.ch[0].lcd_size_cfg.width = 152;
1366 lcdc_info.ch[0].lcd_size_cfg.height = 91;
1367
1368 /* enable TouchScreen */
1369 irq_set_irq_type(IRQ7, IRQ_TYPE_LEVEL_LOW);
1370
1371 tsc_device.irq = IRQ7;
1372 i2c_register_board_info(0, &tsc_device, 1);
1373 #endif /* CONFIG_AP4EVB_QHD */
1374
1375 /* CEU */
1376
1377 /*
1378 * TODO: reserve memory for V4L2 DMA buffers, when a suitable API
1379 * becomes available
1380 */
1381
1382 /* MIPI-CSI stuff */
1383 gpio_request(GPIO_FN_VIO_CKO, NULL);
1384
1385 clk = clk_get(NULL, "vck1_clk");
1386 if (!IS_ERR(clk)) {
1387 clk_set_rate(clk, clk_round_rate(clk, 13000000));
1388 clk_enable(clk);
1389 clk_put(clk);
1390 }
1391
1392 sh7372_add_standard_devices();
1393
1394 /* HDMI */
1395 gpio_request(GPIO_FN_HDMI_HPD, NULL);
1396 gpio_request(GPIO_FN_HDMI_CEC, NULL);
1397
1398 /* Reset HDMI, must be held at least one EXTALR (32768Hz) period */
1399 #define SRCR4 0xe61580bc
1400 srcr4 = __raw_readl(SRCR4);
1401 __raw_writel(srcr4 | (1 << 13), SRCR4);
1402 udelay(50);
1403 __raw_writel(srcr4 & ~(1 << 13), SRCR4);
1404
1405 platform_add_devices(ap4evb_devices, ARRAY_SIZE(ap4evb_devices));
1406
1407 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc1_device);
1408 sh7372_add_device_to_domain(&sh7372_a4lc, &lcdc_device);
1409 sh7372_add_device_to_domain(&sh7372_a4mp, &fsi_device);
1410
1411 hdmi_init_pm_clock();
1412 fsi_init_pm_clock();
1413 sh7372_pm_init();
1414 pm_clk_add(&fsi_device.dev, "spu2");
1415 }
1416
1417 static void __init ap4evb_timer_init(void)
1418 {
1419 sh7372_clock_init();
1420 shmobile_timer.init();
1421
1422 /* External clock source */
1423 clk_set_rate(&sh7372_dv_clki_clk, 27000000);
1424 }
1425
1426 static struct sys_timer ap4evb_timer = {
1427 .init = ap4evb_timer_init,
1428 };
1429
1430 MACHINE_START(AP4EVB, "ap4evb")
1431 .map_io = ap4evb_map_io,
1432 .init_irq = sh7372_init_irq,
1433 .handle_irq = shmobile_handle_irq_intc,
1434 .init_machine = ap4evb_init,
1435 .timer = &ap4evb_timer,
1436 MACHINE_END
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